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| author | Ville Syrjälä | 2015-08-17 17:05:12 +0200 |
|---|---|---|
| committer | Daniel Vetter | 2015-08-26 09:58:19 +0200 |
| commit | 901c2daf05c8ae6c3f85370fc96b9b6892f5da2d (patch) | |
| tree | a1c77c240e18348ae014ae288f6be855e7daca03 /drivers/gpu/drm/i915/intel_ddi.c | |
| parent | drm/i915/bxt: don't allow cached GEM mappings on A stepping (diff) | |
| download | kernel-qcow2-linux-901c2daf05c8ae6c3f85370fc96b9b6892f5da2d.tar.gz kernel-qcow2-linux-901c2daf05c8ae6c3f85370fc96b9b6892f5da2d.tar.xz kernel-qcow2-linux-901c2daf05c8ae6c3f85370fc96b9b6892f5da2d.zip | |
drm/i915: Put back lane_count into intel_dp and add link_rate too
With MST there won't be a crtc assigned to the main link encoder, so
trying to dig up the pipe_config from there is a recipe for an oops.
Instead store the parameters (lane_count and link_rate) in the encoder,
and use those values during link training etc. Since those parameters
are now assigned only when the link is actually enabled,
.compute_config() won't clobber them as it did before.
Hardware state readout is still bonkers though as we don't transfer the
link parameters from pipe_config intel_dp. We should do that during
encoder sanitation. But since we don't even do a proper job of reading
out the main link encoder state for MST there's littel point in
worrying about this now.
Fixes a regression with MST caused by:
commit 90a6b7b052b1aa17fbb98b049e9c8b7f729c35a7
Author: Ville Syrjälä <ville.syrjala@linux.intel.com>
Date: Mon Jul 6 16:39:15 2015 +0300
drm/i915: Move intel_dp->lane_count into pipe_config
v2: Different apporoach that should keep intel_dp_check_mst_status()
somewhat less oopsy
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reported-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Tested-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_ddi.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_ddi.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c index 56d778f00460..5dff8b7e0f03 100644 --- a/drivers/gpu/drm/i915/intel_ddi.c +++ b/drivers/gpu/drm/i915/intel_ddi.c @@ -728,11 +728,10 @@ void intel_ddi_init_dp_buf_reg(struct intel_encoder *encoder) struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); struct intel_digital_port *intel_dig_port = enc_to_dig_port(&encoder->base); - struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); intel_dp->DP = intel_dig_port->saved_port_bits | DDI_BUF_CTL_ENABLE | DDI_BUF_TRANS_SELECT(0); - intel_dp->DP |= DDI_PORT_WIDTH(crtc->config->lane_count); + intel_dp->DP |= DDI_PORT_WIDTH(intel_dp->lane_count); } static struct intel_encoder * @@ -2314,6 +2313,8 @@ static void intel_ddi_pre_enable(struct intel_encoder *intel_encoder) if (type == INTEL_OUTPUT_DISPLAYPORT || type == INTEL_OUTPUT_EDP) { struct intel_dp *intel_dp = enc_to_intel_dp(encoder); + intel_dp_set_link_params(intel_dp, crtc->config); + intel_ddi_init_dp_buf_reg(intel_encoder); intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON); |