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| author | Rodrigo Vivi | 2017-06-06 22:30:36 +0200 |
|---|---|---|
| committer | Rodrigo Vivi | 2017-06-07 16:29:42 +0200 |
| commit | c7ae7e9ab2078ed987903bc6c308abe57d575a59 (patch) | |
| tree | 70d9798a216ad46a2a8f6d8673bce402c8ddfdd2 /drivers/gpu/drm/i915/intel_device_info.c | |
| parent | drm/i915/cnl: Cannonlake has 4 planes (3 sprites) per pipe (diff) | |
| download | kernel-qcow2-linux-c7ae7e9ab2078ed987903bc6c308abe57d575a59.tar.gz kernel-qcow2-linux-c7ae7e9ab2078ed987903bc6c308abe57d575a59.tar.xz kernel-qcow2-linux-c7ae7e9ab2078ed987903bc6c308abe57d575a59.zip | |
drm/i915/cnl: Configure EU slice power gating.
Cannonlake also supports slice power gating on devices with more
than one slice as SKL. Let's assume that this is the same for SKL+
and exclude BXT only.
v2: Also remove KBL.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1496781040-20888-7-git-send-email-rodrigo.vivi@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_device_info.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_device_info.c | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c index bb89faf45468..91e68fd31c07 100644 --- a/drivers/gpu/drm/i915/intel_device_info.c +++ b/drivers/gpu/drm/i915/intel_device_info.c @@ -184,16 +184,15 @@ static void gen9_sseu_info_init(struct drm_i915_private *dev_priv) DIV_ROUND_UP(sseu->eu_total, sseu_subslice_total(sseu)) : 0; /* - * SKL supports slice power gating on devices with more than + * SKL+ supports slice power gating on devices with more than * one slice, and supports EU power gating on devices with - * more than one EU pair per subslice. BXT supports subslice + * more than one EU pair per subslice. BXT+ supports subslice * power gating on devices with more than one subslice, and * supports EU power gating on devices with more than one EU * pair per subslice. */ sseu->has_slice_pg = - (IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv)) && - hweight8(sseu->slice_mask) > 1; + !IS_GEN9_LP(dev_priv) && hweight8(sseu->slice_mask) > 1; sseu->has_subslice_pg = IS_GEN9_LP(dev_priv) && sseu_subslice_total(sseu) > 1; sseu->has_eu_pg = sseu->eu_per_subslice > 2; |