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| author | Ville Syrjälä | 2018-05-17 19:03:09 +0200 |
|---|---|---|
| committer | Ville Syrjälä | 2018-05-18 16:23:40 +0200 |
| commit | 45101e939ea34c3f0794175845eb946e839e7873 (patch) | |
| tree | a50ef0a22ee9249c1a8ad80a70f53069c0e6b23e /drivers/gpu/drm/i915/intel_dp.c | |
| parent | drm/i915: Rename SNB/IVB CPU eDP signal level funcs (diff) | |
| download | kernel-qcow2-linux-45101e939ea34c3f0794175845eb946e839e7873.tar.gz kernel-qcow2-linux-45101e939ea34c3f0794175845eb946e839e7873.tar.xz kernel-qcow2-linux-45101e939ea34c3f0794175845eb946e839e7873.zip | |
drm/i915: Rename the remaining gen4 references to g4x in the DP code
i965 does not have native DP. Let's rename the remaining gen4 references
in the DP code to g4x.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180517170309.28630-5-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_dp.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_dp.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index cd4c60bfc4c2..102070940095 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -56,7 +56,7 @@ struct dp_link_dpll { struct dpll dpll; }; -static const struct dp_link_dpll gen4_dpll[] = { +static const struct dp_link_dpll g4x_dpll[] = { { 162000, { .p1 = 2, .p2 = 10, .n = 2, .m1 = 23, .m2 = 8 } }, { 270000, @@ -1550,8 +1550,8 @@ intel_dp_set_clock(struct intel_encoder *encoder, int i, count = 0; if (IS_G4X(dev_priv)) { - divisor = gen4_dpll; - count = ARRAY_SIZE(gen4_dpll); + divisor = g4x_dpll; + count = ARRAY_SIZE(g4x_dpll); } else if (HAS_PCH_SPLIT(dev_priv)) { divisor = pch_dpll; count = ARRAY_SIZE(pch_dpll); @@ -3451,7 +3451,7 @@ static uint32_t chv_signal_levels(struct intel_dp *intel_dp) } static uint32_t -gen4_signal_levels(uint8_t train_set) +g4x_signal_levels(uint8_t train_set) { uint32_t signal_levels = 0; @@ -3572,7 +3572,7 @@ intel_dp_set_signal_levels(struct intel_dp *intel_dp) signal_levels = snb_cpu_edp_signal_levels(train_set); mask = EDP_LINK_TRAIN_VOL_EMP_MASK_SNB; } else { - signal_levels = gen4_signal_levels(train_set); + signal_levels = g4x_signal_levels(train_set); mask = DP_VOLTAGE_MASK | DP_PRE_EMPHASIS_MASK; } |