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| author | Ville Syrjälä | 2018-05-17 19:03:08 +0200 |
|---|---|---|
| committer | Ville Syrjälä | 2018-05-18 16:23:40 +0200 |
| commit | 4d82c2b5f09f5b09ac55e557c0436eb4b29c07fe (patch) | |
| tree | 96742e691ff98d403de3757f31681e9029728fba /drivers/gpu/drm/i915/intel_dp.c | |
| parent | drm/i915: Check for IVB instead of gen7 when we think about IVB CPU eDP (diff) | |
| download | kernel-qcow2-linux-4d82c2b5f09f5b09ac55e557c0436eb4b29c07fe.tar.gz kernel-qcow2-linux-4d82c2b5f09f5b09ac55e557c0436eb4b29c07fe.tar.xz kernel-qcow2-linux-4d82c2b5f09f5b09ac55e557c0436eb4b29c07fe.zip | |
drm/i915: Rename SNB/IVB CPU eDP signal level funcs
To make the intent more clear, let's rename the signal level funcs for
the SNB/IVB CPU eDP.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180517170309.28630-4-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_dp.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_dp.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 263e4b1d1db9..cd4c60bfc4c2 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -3488,9 +3488,9 @@ gen4_signal_levels(uint8_t train_set) return signal_levels; } -/* Gen6's DP voltage swing and pre-emphasis control */ +/* SNB CPU eDP voltage swing and pre-emphasis control */ static uint32_t -gen6_edp_signal_levels(uint8_t train_set) +snb_cpu_edp_signal_levels(uint8_t train_set) { int signal_levels = train_set & (DP_TRAIN_VOLTAGE_SWING_MASK | DP_TRAIN_PRE_EMPHASIS_MASK); @@ -3516,9 +3516,9 @@ gen6_edp_signal_levels(uint8_t train_set) } } -/* Gen7's DP voltage swing and pre-emphasis control */ +/* IVB CPU eDP voltage swing and pre-emphasis control */ static uint32_t -gen7_edp_signal_levels(uint8_t train_set) +ivb_cpu_edp_signal_levels(uint8_t train_set) { int signal_levels = train_set & (DP_TRAIN_VOLTAGE_SWING_MASK | DP_TRAIN_PRE_EMPHASIS_MASK); @@ -3566,10 +3566,10 @@ intel_dp_set_signal_levels(struct intel_dp *intel_dp) } else if (IS_VALLEYVIEW(dev_priv)) { signal_levels = vlv_signal_levels(intel_dp); } else if (IS_IVYBRIDGE(dev_priv) && port == PORT_A) { - signal_levels = gen7_edp_signal_levels(train_set); + signal_levels = ivb_cpu_edp_signal_levels(train_set); mask = EDP_LINK_TRAIN_VOL_EMP_MASK_IVB; } else if (IS_GEN6(dev_priv) && port == PORT_A) { - signal_levels = gen6_edp_signal_levels(train_set); + signal_levels = snb_cpu_edp_signal_levels(train_set); mask = EDP_LINK_TRAIN_VOL_EMP_MASK_SNB; } else { signal_levels = gen4_signal_levels(train_set); |