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| author | Ander Conselvan de Oliveira | 2015-10-23 12:01:47 +0200 |
|---|---|---|
| committer | Ander Conselvan de Oliveira | 2015-11-05 14:14:56 +0100 |
| commit | b905a9155db6fd51bfdb7625b7d0c5c3047d49f2 (patch) | |
| tree | 44756241a1bbcfb1b35f8299fcb0b03f4fbf3ac2 /drivers/gpu/drm/i915/intel_dp.c | |
| parent | drm/i915 Call get_adjust_train() from clock recovery and channel eq (diff) | |
| download | kernel-qcow2-linux-b905a9155db6fd51bfdb7625b7d0c5c3047d49f2.tar.gz kernel-qcow2-linux-b905a9155db6fd51bfdb7625b7d0c5c3047d49f2.tar.xz kernel-qcow2-linux-b905a9155db6fd51bfdb7625b7d0c5c3047d49f2.zip | |
drm/i915: Move register write into intel_dp_set_signal_levels()
Move register write from intel_dp_update_link_train() into
intel_dp_set_signal_levels(). This creates a better split between the
i915 specific code and the generic link training part. Note that this
causes an extra register write in intel_dp_reset_link_train(), since
both intel_dp_set_signal_levels() and intel_dp_set_link_train() write
to the DP register.
Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Reviewed-by: Sivakumar Thulasimani <sivakumar.thulasimani@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1445594525-7174-5-git-send-email-ander.conselvan.de.oliveira@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_dp.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_dp.c | 11 |
1 files changed, 4 insertions, 7 deletions
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 37d51d3ab26a..cf9255efa8b1 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -3550,13 +3550,13 @@ gen7_edp_signal_levels(uint8_t train_set) } } -/* Properly updates "DP" with the correct signal levels. */ static void intel_dp_set_signal_levels(struct intel_dp *intel_dp) { struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); enum port port = intel_dig_port->port; struct drm_device *dev = intel_dig_port->base.base.dev; + struct drm_i915_private *dev_priv = to_i915(dev); uint32_t signal_levels, mask = 0; uint8_t train_set = intel_dp->train_set[0]; @@ -3592,6 +3592,9 @@ intel_dp_set_signal_levels(struct intel_dp *intel_dp) DP_TRAIN_PRE_EMPHASIS_SHIFT); intel_dp->DP = (intel_dp->DP & ~mask) | signal_levels; + + I915_WRITE(intel_dp->output_reg, intel_dp->DP); + POSTING_READ(intel_dp->output_reg); } static void @@ -3647,16 +3650,10 @@ intel_dp_reset_link_train(struct intel_dp *intel_dp, static bool intel_dp_update_link_train(struct intel_dp *intel_dp) { - struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); - struct drm_i915_private *dev_priv = - to_i915(intel_dig_port->base.base.dev); int ret; intel_dp_set_signal_levels(intel_dp); - I915_WRITE(intel_dp->output_reg, intel_dp->DP); - POSTING_READ(intel_dp->output_reg); - ret = drm_dp_dpcd_write(&intel_dp->aux, DP_TRAINING_LANE0_SET, intel_dp->train_set, intel_dp->lane_count); |