diff options
| author | Ville Syrjälä | 2016-11-14 18:44:07 +0100 |
|---|---|---|
| committer | Ville Syrjälä | 2016-11-14 19:27:54 +0100 |
| commit | c99f53f7cab9797c2ad5848318c725254be9e400 (patch) | |
| tree | decf45eadf04c511514f2a462e1ead0f255b4fb5 /drivers/gpu/drm/i915/intel_dp.c | |
| parent | drm/i915: Kill dp_encoder_is_mst (diff) | |
| download | kernel-qcow2-linux-c99f53f7cab9797c2ad5848318c725254be9e400.tar.gz kernel-qcow2-linux-c99f53f7cab9797c2ad5848318c725254be9e400.tar.xz kernel-qcow2-linux-c99f53f7cab9797c2ad5848318c725254be9e400.zip | |
drm/i915: Simplify DP port limited color range bit platform checks
Instead of checking for everything not supporting the limited color
range bit in the DP port register, let's check for the one thing
that does have it (g4x).
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Jim Bride <jim.bride@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1479145447-12907-3-git-send-email-ville.syrjala@linux.intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_dp.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_dp.c | 7 |
1 files changed, 2 insertions, 5 deletions
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 56431e04c7a9..a1b0181f42c4 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -1791,9 +1791,7 @@ static void intel_dp_prepare(struct intel_encoder *encoder, trans_dp &= ~TRANS_DP_ENH_FRAMING; I915_WRITE(TRANS_DP_CTL(crtc->pipe), trans_dp); } else { - if (!HAS_PCH_SPLIT(dev_priv) && !IS_VALLEYVIEW(dev_priv) && - !IS_CHERRYVIEW(dev_priv) && - pipe_config->limited_color_range) + if (IS_G4X(dev_priv) && pipe_config->limited_color_range) intel_dp->DP |= DP_COLOR_RANGE_16_235; if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC) @@ -2515,8 +2513,7 @@ static void intel_dp_get_config(struct intel_encoder *encoder, pipe_config->base.adjusted_mode.flags |= flags; - if (!HAS_PCH_SPLIT(dev_priv) && !IS_VALLEYVIEW(dev_priv) && - !IS_CHERRYVIEW(dev_priv) && tmp & DP_COLOR_RANGE_16_235) + if (IS_G4X(dev_priv) && tmp & DP_COLOR_RANGE_16_235) pipe_config->limited_color_range = true; pipe_config->lane_count = |