diff options
| author | Ville Syrjälä | 2015-12-08 18:59:38 +0100 |
|---|---|---|
| committer | Ville Syrjälä | 2016-01-12 14:59:58 +0100 |
| commit | ccb1a8319015d31a51e8206b66ab3aaea07417ba (patch) | |
| tree | ef6b0bf0e2ebefd5319cf0937a61686f43c075a8 /drivers/gpu/drm/i915/intel_dp.c | |
| parent | drm/i915: Check max number of lanes when registering DDI ports (diff) | |
| download | kernel-qcow2-linux-ccb1a8319015d31a51e8206b66ab3aaea07417ba.tar.gz kernel-qcow2-linux-ccb1a8319015d31a51e8206b66ab3aaea07417ba.tar.xz kernel-qcow2-linux-ccb1a8319015d31a51e8206b66ab3aaea07417ba.zip | |
drm/i915: Store max lane count in intel_digital_port
Rather than having open coded checks for the DDI A/E configuration,
just store the max supported lane count in intel_digital_port.
We had an open coded check for DDI A, but not for DDI E. So we may
have been vilating the DDI E max lane count.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_dp.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_dp.c | 13 |
1 files changed, 7 insertions, 6 deletions
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 5332eb7657e1..9e02dd789b86 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -157,14 +157,9 @@ intel_dp_max_link_bw(struct intel_dp *intel_dp) static u8 intel_dp_max_lane_count(struct intel_dp *intel_dp) { struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); - struct drm_device *dev = intel_dig_port->base.base.dev; u8 source_max, sink_max; - source_max = 4; - if (HAS_DDI(dev) && intel_dig_port->port == PORT_A && - (intel_dig_port->saved_port_bits & DDI_A_4_LANES) == 0) - source_max = 2; - + source_max = intel_dig_port->max_lanes; sink_max = drm_dp_max_lane_count(intel_dp->dpcd); return min(source_max, sink_max); @@ -5839,6 +5834,11 @@ intel_dp_init_connector(struct intel_digital_port *intel_dig_port, enum port port = intel_dig_port->port; int type, ret; + if (WARN(intel_dig_port->max_lanes < 1, + "Not enough lanes (%d) for DP on port %c\n", + intel_dig_port->max_lanes, port_name(port))) + return false; + intel_dp->pps_pipe = INVALID_PIPE; /* intel_dp vfuncs */ @@ -6037,6 +6037,7 @@ intel_dp_init(struct drm_device *dev, intel_dig_port->port = port; dev_priv->dig_port_map[port] = intel_encoder; intel_dig_port->dp.output_reg = output_reg; + intel_dig_port->max_lanes = 4; intel_encoder->type = INTEL_OUTPUT_DISPLAYPORT; if (IS_CHERRYVIEW(dev)) { |