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authorMatt Roper2016-05-12 16:05:55 +0200
committerMatt Roper2016-05-13 16:32:11 +0200
commite8f1f02e7125220b99af8047703b63c11a7081d6 (patch)
tree8f6f53b7ce1f148dbaa87c25e11fc0a9564e7ead /drivers/gpu/drm/i915/intel_drv.h
parentdrm/i915: Remove redundant const from function return type (diff)
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drm/i915: Reorganize WM structs/unions in CRTC state
Reorganize the nested structures and unions we have for pipe watermark data in intel_crtc_state so that platform-specific data can be added in a more sensible manner (and save a bit of memory at the same time). The change basically changes the organization from: union { struct intel_pipe_wm ilk; struct intel_pipe_wm skl; } optimal; struct intel_pipe_wm intermediate /* ILK-only */ to union { struct { struct intel_pipe_wm intermediate; struct intel_pipe_wm optimal; } ilk; struct { struct intel_pipe_wm optimal; } skl; } There should be no functional change here, but it will allow us to add more platform-specific fields going forward (and more easily extend to other platform types like VLV). While we're at it, let's move the entire watermark substructure out to its own structure definition to make the code slightly more readable. Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-2-git-send-email-matthew.d.roper@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_drv.h')
-rw-r--r--drivers/gpu/drm/i915/intel_drv.h61
1 files changed, 35 insertions, 26 deletions
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index ab9307555312..0ec4159c920e 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -405,6 +405,40 @@ struct skl_pipe_wm {
uint32_t linetime;
};
+struct intel_crtc_wm_state {
+ union {
+ struct {
+ /*
+ * Intermediate watermarks; these can be
+ * programmed immediately since they satisfy
+ * both the current configuration we're
+ * switching away from and the new
+ * configuration we're switching to.
+ */
+ struct intel_pipe_wm intermediate;
+
+ /*
+ * Optimal watermarks, programmed post-vblank
+ * when this state is committed.
+ */
+ struct intel_pipe_wm optimal;
+ } ilk;
+
+ struct {
+ /* gen9+ only needs 1-step wm programming */
+ struct skl_pipe_wm optimal;
+ } skl;
+ };
+
+ /*
+ * Platforms with two-step watermark programming will need to
+ * update watermark programming post-vblank to switch from the
+ * safe intermediate watermarks to the optimal final
+ * watermarks.
+ */
+ bool need_postvbl_update;
+};
+
struct intel_crtc_state {
struct drm_crtc_state base;
@@ -558,32 +592,7 @@ struct intel_crtc_state {
/* IVB sprite scaling w/a (WaCxSRDisabledForSpriteScaling:ivb) */
bool disable_lp_wm;
- struct {
- /*
- * Optimal watermarks, programmed post-vblank when this state
- * is committed.
- */
- union {
- struct intel_pipe_wm ilk;
- struct skl_pipe_wm skl;
- } optimal;
-
- /*
- * Intermediate watermarks; these can be programmed immediately
- * since they satisfy both the current configuration we're
- * switching away from and the new configuration we're switching
- * to.
- */
- struct intel_pipe_wm intermediate;
-
- /*
- * Platforms with two-step watermark programming will need to
- * update watermark programming post-vblank to switch from the
- * safe intermediate watermarks to the optimal final
- * watermarks.
- */
- bool need_postvbl_update;
- } wm;
+ struct intel_crtc_wm_state wm;
/* Gamma mode programmed on the pipe */
uint32_t gamma_mode;