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| author | Chris Wilson | 2018-05-17 13:56:47 +0200 |
|---|---|---|
| committer | Chris Wilson | 2018-05-17 19:02:02 +0200 |
| commit | 57877b70739a5d49d95bedf94218ba125e8afef3 (patch) | |
| tree | a5ed9f1cb10b55affb18e0d45d191545db60eb63 /drivers/gpu/drm/i915/intel_lrc.c | |
| parent | drm/i915: Clean up DVO pipe select bits (diff) | |
| download | kernel-qcow2-linux-57877b70739a5d49d95bedf94218ba125e8afef3.tar.gz kernel-qcow2-linux-57877b70739a5d49d95bedf94218ba125e8afef3.tar.xz kernel-qcow2-linux-57877b70739a5d49d95bedf94218ba125e8afef3.zip | |
drm/i915/execlists: HWACK checking superseded checking port[0].count
The HWACK bit more generically solves the problem of resubmitting ESLP
while the hardware is still processing the current ELSP write. We no
longer need to check port[0].count itself.
References: ba74cb10c775 ("drm/i915/execlists: Delay writing to ELSP until HW has processed the previous write")
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Michel Thierry <michel.thierry@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180517115647.17205-1-chris@chris-wilson.co.uk
Diffstat (limited to 'drivers/gpu/drm/i915/intel_lrc.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_lrc.c | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c index 493e6bd9e28a..ae5adad7cc63 100644 --- a/drivers/gpu/drm/i915/intel_lrc.c +++ b/drivers/gpu/drm/i915/intel_lrc.c @@ -612,8 +612,6 @@ static bool __execlists_dequeue(struct intel_engine_cs *engine) GEM_BUG_ON(!execlists_is_active(execlists, EXECLISTS_ACTIVE_USER)); GEM_BUG_ON(!port_count(&port[0])); - if (port_count(&port[0]) > 1) - return false; /* * If we write to ELSP a second time before the HW has had |