summaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/i915/intel_pm.c
diff options
context:
space:
mode:
authorTakashi Iwai2012-12-11 11:46:29 +0100
committerDaniel Vetter2012-12-11 12:53:50 +0100
commit335c07b7982eff480afdf8c9b25225511dd07031 (patch)
tree13814c13ad49b68bb1a2d930bad14a30cc5fc241 /drivers/gpu/drm/i915/intel_pm.c
parentdrm/i915: disable cpt phase pointer fdi rx workaround (diff)
downloadkernel-qcow2-linux-335c07b7982eff480afdf8c9b25225511dd07031.tar.gz
kernel-qcow2-linux-335c07b7982eff480afdf8c9b25225511dd07031.tar.xz
kernel-qcow2-linux-335c07b7982eff480afdf8c9b25225511dd07031.zip
drm/i915: Fix shifted screen on top of LVDS on IVY laptop
The commit [23670b322: drm/i915: CPT+ pch transcoder workaround] caused a regression on some HP laptops with IvyBridge. The whole laptop screen is shifted downward for a few pixels constantly. The problem appears only on LVDS while DP and VGA seem unaffected. Also, the problem disappears once when go and back from S3. (S4 resume still shows the same problem.) This patch revives the minimum part the commit above dropped. For fixing this regression, only the setup of CHICKEN2 bit in cpt_init_clock_gating() is needed. Signed-off-by: Takashi Iwai <tiwai@suse.de> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_pm.c')
-rw-r--r--drivers/gpu/drm/i915/intel_pm.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 522ff05e3789..42839fc73499 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3453,6 +3453,11 @@ static void cpt_init_clock_gating(struct drm_device *dev)
I915_WRITE(SOUTH_DSPCLK_GATE_D, PCH_DPLSUNIT_CLOCK_GATE_DISABLE);
I915_WRITE(SOUTH_CHICKEN2, I915_READ(SOUTH_CHICKEN2) |
DPLS_EDP_PPS_FIX_DIS);
+ /* The below fixes the weird display corruption, a few pixels shifted
+ * downward, on (only) LVDS of some HP laptops with IVY.
+ */
+ for_each_pipe(pipe)
+ I915_WRITE(TRANS_CHICKEN2(pipe), TRANS_CHICKEN2_TIMING_OVERRIDE);
/* WADP0ClockGatingDisable */
for_each_pipe(pipe) {
I915_WRITE(TRANS_CHICKEN1(pipe),