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| author | Chris Wilson | 2016-07-01 18:23:17 +0200 |
|---|---|---|
| committer | Chris Wilson | 2016-07-01 21:58:48 +0200 |
| commit | 1b7744e7ba4e4ad17b5910796c9b1ca74063df01 (patch) | |
| tree | 889e223cb84f9279387f7c8140d15a4faad92c17 /drivers/gpu/drm/i915/intel_ringbuffer.h | |
| parent | drm/i915: Spin after waking up for an interrupt (diff) | |
| download | kernel-qcow2-linux-1b7744e7ba4e4ad17b5910796c9b1ca74063df01.tar.gz kernel-qcow2-linux-1b7744e7ba4e4ad17b5910796c9b1ca74063df01.tar.xz kernel-qcow2-linux-1b7744e7ba4e4ad17b5910796c9b1ca74063df01.zip | |
drm/i915: Use HWS for seqno tracking everywhere
By using the same address for storing the HWS on every platform, we can
remove the platform specific vfuncs and reduce the get-seqno routine to
a single read of a cached memory location.
v2: Fix semaphore_passed() to look at the signaling engine (not the
waiter's)
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1467390209-3576-8-git-send-email-chris@chris-wilson.co.uk
Diffstat (limited to 'drivers/gpu/drm/i915/intel_ringbuffer.h')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_ringbuffer.h | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h index 6fd70a56e219..b03931f6dde5 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.h +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h @@ -207,9 +207,6 @@ struct intel_engine_cs { * monotonic, even if not coherent. */ void (*irq_seqno_barrier)(struct intel_engine_cs *ring); - u32 (*get_seqno)(struct intel_engine_cs *ring); - void (*set_seqno)(struct intel_engine_cs *ring, - u32 seqno); int (*dispatch_execbuffer)(struct drm_i915_gem_request *req, u64 offset, u32 length, unsigned dispatch_flags); @@ -485,6 +482,10 @@ int intel_init_blt_ring_buffer(struct drm_device *dev); int intel_init_vebox_ring_buffer(struct drm_device *dev); u64 intel_ring_get_active_head(struct intel_engine_cs *engine); +static inline u32 intel_engine_get_seqno(struct intel_engine_cs *engine) +{ + return intel_read_status_page(engine, I915_GEM_HWS_INDEX); +} int init_workarounds_ring(struct intel_engine_cs *engine); |