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| author | Imre Deak | 2017-06-29 17:36:59 +0200 |
|---|---|---|
| committer | Imre Deak | 2017-07-06 15:29:13 +0200 |
| commit | edfda8e37ae9ec530434c3a014c8f0155a72acbd (patch) | |
| tree | d334a9ef0c24bd6bc5534492256e04af8028261f /drivers/gpu/drm/i915/intel_runtime_pm.c | |
| parent | drm/i915/gen9+: Add 10 us delay after power well 1/AUX IO pw disabling (diff) | |
| download | kernel-qcow2-linux-edfda8e37ae9ec530434c3a014c8f0155a72acbd.tar.gz kernel-qcow2-linux-edfda8e37ae9ec530434c3a014c8f0155a72acbd.tar.xz kernel-qcow2-linux-edfda8e37ae9ec530434c3a014c8f0155a72acbd.zip | |
drm/i915/skl: Don't disable misc IO power well during display uninit
Bspec requires leaving the misc IO power well enabled during display
uninit, so align the code accordingly.
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1498750622-14023-3-git-send-email-imre.deak@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_runtime_pm.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_runtime_pm.c | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c index fd59016191ff..8418879c287a 100644 --- a/drivers/gpu/drm/i915/intel_runtime_pm.c +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c @@ -2694,9 +2694,10 @@ static void skl_display_core_uninit(struct drm_i915_private *dev_priv) mutex_lock(&power_domains->lock); - well = lookup_power_well(dev_priv, SKL_DISP_PW_MISC_IO); - intel_power_well_disable(dev_priv, well); - + /* + * BSpec says to keep the MISC IO power well enabled here, only + * remove our request for power well 1. + */ well = lookup_power_well(dev_priv, SKL_DISP_PW_1); intel_power_well_disable(dev_priv, well); |