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author | Ville Syrjälä | 2016-04-11 15:56:31 +0200 |
---|---|---|
committer | Ville Syrjälä | 2016-04-12 18:09:21 +0200 |
commit | 71b8b41d5b3573ba4e669822d5736226e9bbfa5d (patch) | |
tree | d478f420f00975f51637143853e7df565ef55cda /drivers/gpu | |
parent | drm/i915: Move vlv_init_display_clock_gating() to the display power well (diff) | |
download | kernel-qcow2-linux-71b8b41d5b3573ba4e669822d5736226e9bbfa5d.tar.gz kernel-qcow2-linux-71b8b41d5b3573ba4e669822d5736226e9bbfa5d.tar.xz kernel-qcow2-linux-71b8b41d5b3573ba4e669822d5736226e9bbfa5d.zip |
drm/i915: Move DPINVGTT setup to vlv_display_irq_reset()
DPINVGTT lives inside the disp2d power well so we can't frob it unless
we know the power well is active. Let's this stuff into
vlv_display_irq_reset() which is only called at the right times so that
we don't get unclaimed register access errors.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94164
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1460382992-28728-10-git-send-email-ville.syrjala@linux.intel.com
Reviewed-by: Imre Deak <imre.deak@intel.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/drm/i915/i915_irq.c | 15 |
1 files changed, 5 insertions, 10 deletions
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index df3751323511..247d962afabb 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -3289,6 +3289,11 @@ static void vlv_display_irq_reset(struct drm_i915_private *dev_priv) { enum pipe pipe; + if (IS_CHERRYVIEW(dev_priv)) + I915_WRITE(DPINVGTT, DPINVGTT_STATUS_MASK_CHV); + else + I915_WRITE(DPINVGTT, DPINVGTT_STATUS_MASK); + i915_hotplug_interrupt_update_locked(dev_priv, 0xffffffff, 0); I915_WRITE(PORT_HOTPLUG_STAT, I915_READ(PORT_HOTPLUG_STAT)); @@ -3352,8 +3357,6 @@ static void valleyview_irq_preinstall(struct drm_device *dev) gen5_gt_irq_reset(dev); - I915_WRITE(DPINVGTT, DPINVGTT_STATUS_MASK); - spin_lock_irq(&dev_priv->irq_lock); if (dev_priv->display_irqs_enabled) vlv_display_irq_reset(dev_priv); @@ -3430,8 +3433,6 @@ static void cherryview_irq_preinstall(struct drm_device *dev) GEN5_IRQ_RESET(GEN8_PCU_); - I915_WRITE(DPINVGTT, DPINVGTT_STATUS_MASK_CHV); - spin_lock_irq(&dev_priv->irq_lock); if (dev_priv->display_irqs_enabled) vlv_display_irq_reset(dev_priv); @@ -3717,12 +3718,6 @@ static int valleyview_irq_postinstall(struct drm_device *dev) gen5_gt_irq_postinstall(dev); - /* ack & enable invalid PTE error interrupts */ -#if 0 /* FIXME: add support to irq handler for checking these bits */ - I915_WRITE(DPINVGTT, DPINVGTT_STATUS_MASK); - I915_WRITE(DPINVGTT, DPINVGTT_EN_MASK); -#endif - spin_lock_irq(&dev_priv->irq_lock); if (dev_priv->display_irqs_enabled) vlv_display_irq_postinstall(dev_priv); |