diff options
| author | shemminger@osdl.org | 2005-11-30 20:45:15 +0100 |
|---|---|---|
| committer | Jeff Garzik | 2005-12-01 08:20:20 +0100 |
| commit | 5a5b1ea026572ac0e5e03d7322deb546d60f9e6e (patch) | |
| tree | 11b85e1097a755559ffb49cb263129885d7cfdfc /drivers/net/sky2.h | |
| parent | [PATCH] sky2: improve receive performance (diff) | |
| download | kernel-qcow2-linux-5a5b1ea026572ac0e5e03d7322deb546d60f9e6e.tar.gz kernel-qcow2-linux-5a5b1ea026572ac0e5e03d7322deb546d60f9e6e.tar.xz kernel-qcow2-linux-5a5b1ea026572ac0e5e03d7322deb546d60f9e6e.zip | |
[PATCH] sky2: add Yukon-EC ultra support
Add support for Yukon-EC Ultra chip as implemented in SysKonnect's
driver version 8.26.
Signed-off-by: Stephen Hemminger <shemminger@osdl.org>
Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
Diffstat (limited to 'drivers/net/sky2.h')
| -rw-r--r-- | drivers/net/sky2.h | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/drivers/net/sky2.h b/drivers/net/sky2.h index 629d08f170fd..f836b0322b19 100644 --- a/drivers/net/sky2.h +++ b/drivers/net/sky2.h @@ -309,7 +309,7 @@ enum { Y2_IS_PAR_RX2 | Y2_IS_TCP_TXS2| Y2_IS_TCP_TXA2, Y2_HWE_ALL_MASK = Y2_IS_TIST_OV | Y2_IS_MST_ERR | Y2_IS_IRQ_STAT | - Y2_IS_PCI_EXP | Y2_IS_PCI_NEXP | + Y2_IS_PCI_EXP | Y2_HWE_L1_MASK | Y2_HWE_L2_MASK, }; @@ -346,6 +346,7 @@ enum { CHIP_ID_YUKON_LITE = 0xb1, /* Chip ID for YUKON-Lite (Rev. A1-A3) */ CHIP_ID_YUKON_LP = 0xb2, /* Chip ID for YUKON-LP */ CHIP_ID_YUKON_XL = 0xb3, /* Chip ID for YUKON-2 XL */ + CHIP_ID_YUKON_EC_U = 0xb4, /* Chip ID for YUKON-2 EC Ultra */ CHIP_ID_YUKON_EC = 0xb6, /* Chip ID for YUKON-2 EC */ CHIP_ID_YUKON_FE = 0xb7, /* Chip ID for YUKON-2 FE */ @@ -579,7 +580,8 @@ enum { RX_GMF_FL_MSK = 0x0c4c,/* 32 bit Rx GMAC FIFO Flush Mask */ RX_GMF_FL_THR = 0x0c50,/* 32 bit Rx GMAC FIFO Flush Threshold */ RX_GMF_TR_THR = 0x0c54,/* 32 bit Rx Truncation Threshold (Yukon-2) */ - + RX_GMF_UP_THR = 0x0c58,/* 8 bit Rx Upper Pause Thr (Yukon-EC_U) */ + RX_GMF_LP_THR = 0x0c5a,/* 8 bit Rx Lower Pause Thr (Yukon-EC_U) */ RX_GMF_VLAN = 0x0c5c,/* 32 bit Rx VLAN Type Register (Yukon-2) */ RX_GMF_WP = 0x0c60,/* 32 bit Rx GMAC FIFO Write Pointer */ @@ -1557,6 +1559,9 @@ enum { /* TX_GMF_CTRL_T 32 bit Tx GMAC FIFO Control/Test */ enum { + TX_STFW_DIS = 1<<31,/* Disable Store & Forward (Yukon-EC Ultra) */ + TX_STFW_ENA = 1<<30,/* Enable Store & Forward (Yukon-EC Ultra) */ + TX_VLAN_TAG_ON = 1<<25,/* enable VLAN tagging */ TX_VLAN_TAG_OFF = 1<<24,/* disable VLAN tagging */ |