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| author | Emmanuel Grumbach | 2014-01-20 08:50:29 +0100 |
|---|---|---|
| committer | Emmanuel Grumbach | 2014-01-20 11:32:06 +0100 |
| commit | 23e76d1a516eef416fb5c038791e943fc0916b67 (patch) | |
| tree | 9100f98cf69af0a6421a0c2c1ce35add0295e703 /drivers/net | |
| parent | iwlwifi: mvm: don't use highest rate in VHT MCS Set (diff) | |
| download | kernel-qcow2-linux-23e76d1a516eef416fb5c038791e943fc0916b67.tar.gz kernel-qcow2-linux-23e76d1a516eef416fb5c038791e943fc0916b67.tar.xz kernel-qcow2-linux-23e76d1a516eef416fb5c038791e943fc0916b67.zip | |
iwlwifi: pcie: don't panic on host commands in iwldvm
None of the devices supported by iwldvm have support for
shadow registers. This means that we wake the NIC
when we increment the write pointer on Tx ring.
This happened even before my bad commit mentionned below.
Since my commit below, we wake up the NIC when we put a
host command on the ring regardless of shadow register
support. This means that in iwldvm (when the NIC doesn't
support shadow register), we wake up the NIC twice:
pcie_enqueue_hcmd:
wake up the NIC
iwl_pcie_txq_inc_wr_ptr:
wake up the NIC - no shadow reg support
Since waking up the NIC means that we need to acquire a
spinlock, this obviously leads to a recursive spinlock
and hence a freeze.
Fixes: b9439491055a ("iwlwifi: pcie: keep the NIC awake when commands are in flight")
Reported-by: Janusz Dziedzic <janusz.dziedzic@gmail.com>
Reviewed-by: Johannes Berg <johannes.berg@intel.com>
Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
Diffstat (limited to 'drivers/net')
| -rw-r--r-- | drivers/net/wireless/iwlwifi/pcie/tx.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/net/wireless/iwlwifi/pcie/tx.c b/drivers/net/wireless/iwlwifi/pcie/tx.c index 3b14fa8abfc7..3d549008b3e2 100644 --- a/drivers/net/wireless/iwlwifi/pcie/tx.c +++ b/drivers/net/wireless/iwlwifi/pcie/tx.c @@ -289,13 +289,15 @@ static void iwl_pcie_txq_inval_byte_cnt_tbl(struct iwl_trans *trans, */ void iwl_pcie_txq_inc_wr_ptr(struct iwl_trans *trans, struct iwl_txq *txq) { + struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); u32 reg = 0; int txq_id = txq->q.id; if (txq->need_update == 0) return; - if (trans->cfg->base_params->shadow_reg_enable) { + if (trans->cfg->base_params->shadow_reg_enable || + txq_id == trans_pcie->cmd_queue) { /* shadow register enabled */ iwl_write32(trans, HBUS_TARG_WRPTR, txq->q.write_ptr | (txq_id << 8)); |