diff options
| author | Sujith | 2009-09-17 05:55:25 +0200 |
|---|---|---|
| committer | John W. Linville | 2009-09-23 17:35:51 +0200 |
| commit | 46fe782c97f5e54a02485ad97b2e6256386a8c8f (patch) | |
| tree | 7cf464de9b45e2b600d39d5f80188b36d69bb9f0 /drivers/net | |
| parent | ath9k: Revamp PCIE workarounds (diff) | |
| download | kernel-qcow2-linux-46fe782c97f5e54a02485ad97b2e6256386a8c8f.tar.gz kernel-qcow2-linux-46fe782c97f5e54a02485ad97b2e6256386a8c8f.tar.xz kernel-qcow2-linux-46fe782c97f5e54a02485ad97b2e6256386a8c8f.zip | |
ath9k: Restore TSF after RESET
For chips requiring RTC reset, TSF has to be restored
after power on reset.
Signed-off-by: Sujith <Sujith.Manoharan@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net')
| -rw-r--r-- | drivers/net/wireless/ath/ath9k/hw.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c index 82a24408528b..af5bb50a2e8b 100644 --- a/drivers/net/wireless/ath/ath9k/hw.c +++ b/drivers/net/wireless/ath/ath9k/hw.c @@ -2338,6 +2338,7 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan, struct ath9k_channel *curchan = ah->curchan; u32 saveDefAntenna; u32 macStaId1; + u64 tsf = 0; int i, rx_chainmask, r; ah->extprotspacing = sc->ht_extprotspacing; @@ -2372,6 +2373,10 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan, macStaId1 = REG_READ(ah, AR_STA_ID1) & AR_STA_ID1_BASE_RATE_11B; + /* For chips on which RTC reset is done, save TSF before it gets cleared */ + if (AR_SREV_9280(ah) && ah->eep_ops->get_eeprom(ah, EEP_OL_PWRCTRL)) + tsf = ath9k_hw_gettsf64(ah); + saveLedState = REG_READ(ah, AR_CFG_LED) & (AR_CFG_LED_ASSOC_CTL | AR_CFG_LED_MODE_SEL | AR_CFG_LED_BLINK_THRESH_SEL | AR_CFG_LED_BLINK_SLOW); @@ -2398,6 +2403,10 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan, udelay(50); } + /* Restore TSF */ + if (tsf && AR_SREV_9280(ah) && ah->eep_ops->get_eeprom(ah, EEP_OL_PWRCTRL)) + ath9k_hw_settsf64(ah, tsf); + if (AR_SREV_9280_10_OR_LATER(ah)) REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL, AR_GPIO_JTAG_DISABLE); |