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| author | Jan Engelhardt | 2007-10-19 23:21:04 +0200 |
|---|---|---|
| committer | Adrian Bunk | 2007-10-19 23:21:04 +0200 |
| commit | 96de0e252cedffad61b3cb5e05662c591898e69a (patch) | |
| tree | e3eb7d3e65ec27d39e1da13a17f6f0f91b28f5e9 /include/asm-arm | |
| parent | Documentation: Delete dead OSS-related kernel parameter. (diff) | |
| download | kernel-qcow2-linux-96de0e252cedffad61b3cb5e05662c591898e69a.tar.gz kernel-qcow2-linux-96de0e252cedffad61b3cb5e05662c591898e69a.tar.xz kernel-qcow2-linux-96de0e252cedffad61b3cb5e05662c591898e69a.zip | |
Convert files to UTF-8 and some cleanups
* Convert files to UTF-8.
* Also correct some people's names
(one example is Eißfeldt, which was found in a source file.
Given that the author used an ß at all in a source file
indicates that the real name has in fact a 'ß' and not an 'ss',
which is commonly used as a substitute for 'ß' when limited to
7bit.)
* Correct town names (Goettingen -> Göttingen)
* Update Eberhard Mönkeberg's address (http://lkml.org/lkml/2007/1/8/313)
Signed-off-by: Jan Engelhardt <jengelh@gmx.de>
Signed-off-by: Adrian Bunk <bunk@kernel.org>
Diffstat (limited to 'include/asm-arm')
| -rw-r--r-- | include/asm-arm/arch-aaec2000/aaec2000.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/include/asm-arm/arch-aaec2000/aaec2000.h b/include/asm-arm/arch-aaec2000/aaec2000.h index 002227924b9f..a6d1ee0980f2 100644 --- a/include/asm-arm/arch-aaec2000/aaec2000.h +++ b/include/asm-arm/arch-aaec2000/aaec2000.h @@ -140,11 +140,11 @@ #define TIMER3_CLEAR __REG(0x80000e0c) /* Timer 3 Clear Register */ /* Timer Control register bits */ -#define TIMER_CTRL_ENABLE (1 << 7) /* Enable (Start° Timer */ +#define TIMER_CTRL_ENABLE (1 << 7) /* Enable (Start Timer) */ #define TIMER_CTRL_PERIODIC (1 << 6) /* Periodic Running Mode */ #define TIMER_CTRL_FREE_RUNNING (0 << 6) /* Normal Running Mode */ #define TIMER_CTRL_CLKSEL_508K (1 << 3) /* 508KHz Clock select (Timer 1, 2) */ -#define TIMER_CTRL_CLKSEL_2K (0 << 3) /* 2KHz Clock Select (Timer 1, 2)*/ +#define TIMER_CTRL_CLKSEL_2K (0 << 3) /* 2KHz Clock Select (Timer 1, 2) */ /* Power and State Control */ #define POWER_BASE __REG(0x80000400) |