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Diffstat (limited to 'arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts')
-rw-r--r--arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts40
1 files changed, 39 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts b/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts
index e4ae38fd0269..e0302636aff5 100644
--- a/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts
+++ b/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts
@@ -18,6 +18,10 @@
model = "Data Modul eDM-QMX6 Board";
compatible = "dmo,imx6q-edmqmx6", "fsl,imx6q";
+ chosen {
+ stdout-path = &uart2;
+ };
+
aliases {
gpio7 = &stmpe_gpio1;
gpio8 = &stmpe_gpio2;
@@ -91,6 +95,20 @@
};
};
+&ecspi5 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ecspi5>;
+ fsl,spi-num-chipselects = <1>;
+ cs-gpios = <&gpio1 12 0>;
+ status = "okay";
+
+ flash: m25p80@0 {
+ compatible = "m25p80";
+ spi-max-frequency = <40000000>;
+ reg = <0>;
+ };
+};
+
&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet>;
@@ -105,7 +123,8 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2
&pinctrl_stmpe1
- &pinctrl_stmpe2>;
+ &pinctrl_stmpe2
+ &pinctrl_pfuze>;
status = "okay";
pmic: pfuze100@08 {
@@ -216,6 +235,8 @@
reg = <0x40>;
interrupts = <30 0>;
interrupt-parent = <&gpio3>;
+ vcc-supply = <&sw2_reg>;
+ vio-supply = <&sw2_reg>;
stmpe_gpio1: stmpe_gpio {
#gpio-cells = <2>;
@@ -228,6 +249,8 @@
reg = <0x44>;
interrupts = <2 0>;
interrupt-parent = <&gpio5>;
+ vcc-supply = <&sw2_reg>;
+ vio-supply = <&sw2_reg>;
stmpe_gpio2: stmpe_gpio {
#gpio-cells = <2>;
@@ -263,6 +286,15 @@
>;
};
+ pinctrl_ecspi5: ecspi5rp-1 {
+ fsl,pins = <
+ MX6QDL_PAD_SD1_DAT0__ECSPI5_MISO 0x80000000
+ MX6QDL_PAD_SD1_CMD__ECSPI5_MOSI 0x80000000
+ MX6QDL_PAD_SD1_CLK__ECSPI5_SCLK 0x80000000
+ MX6QDL_PAD_SD2_DAT3__GPIO1_IO12 0x80000000
+ >;
+ };
+
pinctrl_enet: enetgrp {
fsl,pins = <
MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
@@ -291,6 +323,12 @@
>;
};
+ pinctrl_pfuze: pfuze100grp1 {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x80000000
+ >;
+ };
+
pinctrl_stmpe1: stmpe1grp {
fsl,pins = <MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x80000000>;
};