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path: root/drivers/staging/media/davinci_vpfe/dm365_ipipe_hw.c
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Diffstat (limited to 'drivers/staging/media/davinci_vpfe/dm365_ipipe_hw.c')
-rw-r--r--drivers/staging/media/davinci_vpfe/dm365_ipipe_hw.c12
1 files changed, 8 insertions, 4 deletions
diff --git a/drivers/staging/media/davinci_vpfe/dm365_ipipe_hw.c b/drivers/staging/media/davinci_vpfe/dm365_ipipe_hw.c
index b1d5e23ae6e0..0792fbd72e75 100644
--- a/drivers/staging/media/davinci_vpfe/dm365_ipipe_hw.c
+++ b/drivers/staging/media/davinci_vpfe/dm365_ipipe_hw.c
@@ -682,8 +682,10 @@ ipipe_set_rgb2rgb_regs(void __iomem *base_addr, unsigned int id,
ipipe_clock_enable(base_addr);
if (id == IPIPE_RGB2RGB_2) {
- /* For second RGB module, gain integer is 3 bits instead
- of 4, offset has 11 bits insread of 13 */
+ /*
+ * For second RGB module, gain integer is 3 bits instead
+ * of 4, offset has 11 bits insread of 13
+ */
offset = RGB2_MUL_BASE;
integ_mask = 0x7;
offset_mask = RGB2RGB_2_OFST_MASK;
@@ -792,8 +794,10 @@ ipipe_set_3d_lut_regs(void __iomem *base_addr, void __iomem *isp5_base_addr,
/* valied table */
tbl = lut_3d->table;
for (i = 0; i < VPFE_IPIPE_MAX_SIZE_3D_LUT; i++) {
- /* Each entry has 0-9 (B), 10-19 (G) and
- 20-29 R values */
+ /*
+ * Each entry has 0-9 (B), 10-19 (G) and
+ * 20-29 R values
+ */
val = tbl[i].b & D3_LUT_ENTRY_MASK;
val |= (tbl[i].g & D3_LUT_ENTRY_MASK) <<
D3_LUT_ENTRY_G_SHIFT;