diff options
Diffstat (limited to 'drivers/usb/musb/musb_host.c')
| -rw-r--r-- | drivers/usb/musb/musb_host.c | 49 |
1 files changed, 41 insertions, 8 deletions
diff --git a/drivers/usb/musb/musb_host.c b/drivers/usb/musb/musb_host.c index cf94511485f2..3421cf9858b5 100644 --- a/drivers/usb/musb/musb_host.c +++ b/drivers/usb/musb/musb_host.c @@ -605,8 +605,14 @@ musb_rx_reinit(struct musb *musb, struct musb_qh *qh, struct musb_hw_ep *ep) musb_writeb(ep->regs, MUSB_RXTYPE, qh->type_reg); musb_writeb(ep->regs, MUSB_RXINTERVAL, qh->intv_reg); /* NOTE: bulk combining rewrites high bits of maxpacket */ - musb_writew(ep->regs, MUSB_RXMAXP, - qh->maxpacket | ((qh->hb_mult - 1) << 11)); + /* Set RXMAXP with the FIFO size of the endpoint + * to disable double buffer mode. + */ + if (musb->hwvers < MUSB_HWVERS_2000) + musb_writew(ep->regs, MUSB_RXMAXP, ep->max_packet_sz_rx); + else + musb_writew(ep->regs, MUSB_RXMAXP, + qh->maxpacket | ((qh->hb_mult - 1) << 11)); ep->rx_reinit = 0; } @@ -1301,8 +1307,11 @@ void musb_host_tx(struct musb *musb, u8 epnum) return; } else if (usb_pipeisoc(pipe) && dma) { if (musb_tx_dma_program(musb->dma_controller, hw_ep, qh, urb, - offset, length)) + offset, length)) { + if (is_cppi_enabled() || tusb_dma_omap()) + musb_h_tx_dma_start(hw_ep); return; + } } else if (tx_csr & MUSB_TXCSR_DMAENAB) { DBG(1, "not complete, but DMA enabled?\n"); return; @@ -1639,18 +1648,18 @@ void musb_host_rx(struct musb *musb, u8 epnum) c = musb->dma_controller; if (usb_pipeisoc(pipe)) { - int status = 0; + int d_status = 0; struct usb_iso_packet_descriptor *d; d = urb->iso_frame_desc + qh->iso_idx; if (iso_err) { - status = -EILSEQ; + d_status = -EILSEQ; urb->error_count++; } if (rx_count > d->length) { - if (status == 0) { - status = -EOVERFLOW; + if (d_status == 0) { + d_status = -EOVERFLOW; urb->error_count++; } DBG(2, "** OVERFLOW %d into %d\n",\ @@ -1659,7 +1668,7 @@ void musb_host_rx(struct musb *musb, u8 epnum) length = d->length; } else length = rx_count; - d->status = status; + d->status = d_status; buf = urb->transfer_dma + d->offset; } else { length = rx_count; @@ -1768,6 +1777,9 @@ static int musb_schedule( int best_end, epnum; struct musb_hw_ep *hw_ep = NULL; struct list_head *head = NULL; + u8 toggle; + u8 txtype; + struct urb *urb = next_urb(qh); /* use fixed hardware for control and bulk */ if (qh->type == USB_ENDPOINT_XFER_CONTROL) { @@ -1806,6 +1818,27 @@ static int musb_schedule( diff -= (qh->maxpacket * qh->hb_mult); if (diff >= 0 && best_diff > diff) { + + /* + * Mentor controller has a bug in that if we schedule + * a BULK Tx transfer on an endpoint that had earlier + * handled ISOC then the BULK transfer has to start on + * a zero toggle. If the BULK transfer starts on a 1 + * toggle then this transfer will fail as the mentor + * controller starts the Bulk transfer on a 0 toggle + * irrespective of the programming of the toggle bits + * in the TXCSR register. Check for this condition + * while allocating the EP for a Tx Bulk transfer. If + * so skip this EP. + */ + hw_ep = musb->endpoints + epnum; + toggle = usb_gettoggle(urb->dev, qh->epnum, !is_in); + txtype = (musb_readb(hw_ep->regs, MUSB_TXTYPE) + >> 4) & 0x3; + if (!is_in && (qh->type == USB_ENDPOINT_XFER_BULK) && + toggle && (txtype == USB_ENDPOINT_XFER_ISOC)) + continue; + best_diff = diff; best_end = epnum; } |