diff options
Diffstat (limited to 'include/linux')
144 files changed, 5167 insertions, 1988 deletions
diff --git a/include/linux/Kbuild b/include/linux/Kbuild index 3c9b616c834a..0237b84ba541 100644 --- a/include/linux/Kbuild +++ b/include/linux/Kbuild @@ -167,7 +167,6 @@ header-y += if_arp.h header-y += if_bonding.h header-y += if_bridge.h header-y += if_cablemodem.h -header-y += if_ec.h header-y += if_eql.h header-y += if_ether.h header-y += if_fc.h @@ -186,7 +185,6 @@ header-y += if_pppox.h header-y += if_slip.h header-y += if_strip.h header-y += if_team.h -header-y += if_tr.h header-y += if_tun.h header-y += if_tunnel.h header-y += if_vlan.h @@ -332,6 +330,7 @@ header-y += scc.h header-y += sched.h header-y += screen_info.h header-y += sdla.h +header-y += seccomp.h header-y += securebits.h header-y += selinux_netlink.h header-y += sem.h diff --git a/include/linux/amba/bus.h b/include/linux/amba/bus.h index 8d54f79457ba..d36417158d8f 100644 --- a/include/linux/amba/bus.h +++ b/include/linux/amba/bus.h @@ -63,6 +63,14 @@ struct amba_device *amba_device_alloc(const char *, resource_size_t, size_t); void amba_device_put(struct amba_device *); int amba_device_add(struct amba_device *, struct resource *); int amba_device_register(struct amba_device *, struct resource *); +struct amba_device *amba_apb_device_add(struct device *parent, const char *name, + resource_size_t base, size_t size, + int irq1, int irq2, void *pdata, + unsigned int periphid); +struct amba_device *amba_ahb_device_add(struct device *parent, const char *name, + resource_size_t base, size_t size, + int irq1, int irq2, void *pdata, + unsigned int periphid); void amba_device_unregister(struct amba_device *); struct amba_device *amba_find_device(const char *, struct device *, unsigned int, unsigned int); int amba_request_regions(struct amba_device *, const char *); diff --git a/include/linux/atmlec.h b/include/linux/atmlec.h index 39c917fd1b96..302791e3ab2b 100644 --- a/include/linux/atmlec.h +++ b/include/linux/atmlec.h @@ -21,13 +21,6 @@ /* Maximum number of LEC interfaces (tweakable) */ #define MAX_LEC_ITF 48 -/* - * From the total of MAX_LEC_ITF, last NUM_TR_DEVS are reserved for Token Ring. - * E.g. if MAX_LEC_ITF = 48 and NUM_TR_DEVS = 8, then lec0-lec39 are for - * Ethernet ELANs and lec40-lec47 are for Token Ring ELANS. - */ -#define NUM_TR_DEVS 8 - typedef enum { l_set_mac_addr, l_del_mac_addr, diff --git a/include/linux/audit.h b/include/linux/audit.h index ed3ef1972496..22f292a917a3 100644 --- a/include/linux/audit.h +++ b/include/linux/audit.h @@ -463,7 +463,7 @@ extern void audit_putname(const char *name); extern void __audit_inode(const char *name, const struct dentry *dentry); extern void __audit_inode_child(const struct dentry *dentry, const struct inode *parent); -extern void __audit_seccomp(unsigned long syscall); +extern void __audit_seccomp(unsigned long syscall, long signr, int code); extern void __audit_ptrace(struct task_struct *t); static inline int audit_dummy_context(void) @@ -508,10 +508,10 @@ static inline void audit_inode_child(const struct dentry *dentry, } void audit_core_dumps(long signr); -static inline void audit_seccomp(unsigned long syscall) +static inline void audit_seccomp(unsigned long syscall, long signr, int code) { if (unlikely(!audit_dummy_context())) - __audit_seccomp(syscall); + __audit_seccomp(syscall, signr, code); } static inline void audit_ptrace(struct task_struct *t) @@ -634,7 +634,7 @@ extern int audit_signals; #define audit_inode(n,d) do { (void)(d); } while (0) #define audit_inode_child(i,p) do { ; } while (0) #define audit_core_dumps(i) do { ; } while (0) -#define audit_seccomp(i) do { ; } while (0) +#define audit_seccomp(i,s,c) do { ; } while (0) #define auditsc_get_stamp(c,t,s) (0) #define audit_get_loginuid(t) (-1) #define audit_get_sessionid(t) (-1) diff --git a/include/linux/bcma/bcma.h b/include/linux/bcma/bcma.h index 5af9a075498f..98bb2901d7b7 100644 --- a/include/linux/bcma/bcma.h +++ b/include/linux/bcma/bcma.h @@ -139,6 +139,7 @@ struct bcma_device { u8 core_unit; u32 addr; + u32 addr1; u32 wrap; void __iomem *io_addr; diff --git a/include/linux/blkdev.h b/include/linux/blkdev.h index 2aa24664a5b5..4d4ac24a263e 100644 --- a/include/linux/blkdev.h +++ b/include/linux/blkdev.h @@ -1,9 +1,10 @@ #ifndef _LINUX_BLKDEV_H #define _LINUX_BLKDEV_H +#include <linux/sched.h> + #ifdef CONFIG_BLOCK -#include <linux/sched.h> #include <linux/major.h> #include <linux/genhd.h> #include <linux/list.h> diff --git a/include/linux/clk.h b/include/linux/clk.h index b0252726df61..70cf722ac3af 100644 --- a/include/linux/clk.h +++ b/include/linux/clk.h @@ -101,6 +101,26 @@ int clk_notifier_unregister(struct clk *clk, struct notifier_block *nb); struct clk *clk_get(struct device *dev, const char *id); /** + * devm_clk_get - lookup and obtain a managed reference to a clock producer. + * @dev: device for clock "consumer" + * @id: clock comsumer ID + * + * Returns a struct clk corresponding to the clock producer, or + * valid IS_ERR() condition containing errno. The implementation + * uses @dev and @id to determine the clock consumer, and thereby + * the clock producer. (IOW, @id may be identical strings, but + * clk_get may return different clock producers depending on @dev.) + * + * Drivers must assume that the clock source is not enabled. + * + * devm_clk_get should not be called from within interrupt context. + * + * The clock will automatically be freed when the device is unbound + * from the bus. + */ +struct clk *devm_clk_get(struct device *dev, const char *id); + +/** * clk_prepare - prepare a clock source * @clk: clock source * @@ -206,6 +226,18 @@ unsigned long clk_get_rate(struct clk *clk); */ void clk_put(struct clk *clk); +/** + * devm_clk_put - "free" a managed clock source + * @dev: device used to acuqire the clock + * @clk: clock source acquired with devm_clk_get() + * + * Note: drivers must ensure that all clk_enable calls made on this + * clock source are balanced by clk_disable calls prior to calling + * this function. + * + * clk_put should not be called from within interrupt context. + */ +void devm_clk_put(struct device *dev, struct clk *clk); /* * The remaining APIs are optional for machine class support. diff --git a/include/linux/clkdev.h b/include/linux/clkdev.h index d9a4fd028c9d..a6a6f603103b 100644 --- a/include/linux/clkdev.h +++ b/include/linux/clkdev.h @@ -40,4 +40,7 @@ void clkdev_drop(struct clk_lookup *cl); void clkdev_add_table(struct clk_lookup *, size_t); int clk_add_alias(const char *, const char *, char *, struct device *); +int clk_register_clkdev(struct clk *, const char *, const char *, ...); +int clk_register_clkdevs(struct clk *, struct clk_lookup *, size_t); + #endif diff --git a/include/linux/dcache.h b/include/linux/dcache.h index 7e11f1418203..094789ff3e9f 100644 --- a/include/linux/dcache.h +++ b/include/linux/dcache.h @@ -25,6 +25,13 @@ struct vfsmount; #define IS_ROOT(x) ((x) == (x)->d_parent) +/* The hash is always the low bits of hash_len */ +#ifdef __LITTLE_ENDIAN + #define HASH_LEN_DECLARE u32 hash; u32 len; +#else + #define HASH_LEN_DECLARE u32 len; u32 hash; +#endif + /* * "quick string" -- eases parameter passing, but more importantly * saves "metadata" about the string (ie length and the hash). @@ -33,11 +40,19 @@ struct vfsmount; * dentry. */ struct qstr { - unsigned int hash; - unsigned int len; + union { + struct { + HASH_LEN_DECLARE; + }; + u64 hash_len; + }; const unsigned char *name; }; +#define QSTR_INIT(n,l) { { { .len = l } }, .name = n } +#define hashlen_hash(hashlen) ((u32) (hashlen)) +#define hashlen_len(hashlen) ((u32)((hashlen) >> 32)) + struct dentry_stat_t { int nr_dentry; int nr_unused; @@ -282,7 +297,7 @@ extern struct dentry *d_hash_and_lookup(struct dentry *, struct qstr *); extern struct dentry *__d_lookup(struct dentry *, struct qstr *); extern struct dentry *__d_lookup_rcu(const struct dentry *parent, const struct qstr *name, - unsigned *seq, struct inode **inode); + unsigned *seq, struct inode *inode); /** * __d_rcu_to_refcount - take a refcount on dentry if sequence check is ok diff --git a/include/linux/dcbnl.h b/include/linux/dcbnl.h index 65a2562f66b4..6bb43382f3f3 100644 --- a/include/linux/dcbnl.h +++ b/include/linux/dcbnl.h @@ -67,6 +67,17 @@ struct ieee_ets { __u8 reco_prio_tc[IEEE_8021QAZ_MAX_TCS]; }; +/* This structure contains rate limit extension to the IEEE 802.1Qaz ETS + * managed object. + * Values are 64 bits long and specified in Kbps to enable usage over both + * slow and very fast networks. + * + * @tc_maxrate: maximal tc tx bandwidth indexed by traffic class + */ +struct ieee_maxrate { + __u64 tc_maxrate[IEEE_8021QAZ_MAX_TCS]; +}; + /* This structure contains the IEEE 802.1Qaz PFC managed object * * @pfc_cap: Indicates the number of traffic classes on the local device @@ -321,6 +332,7 @@ enum ieee_attrs { DCB_ATTR_IEEE_PEER_ETS, DCB_ATTR_IEEE_PEER_PFC, DCB_ATTR_IEEE_PEER_APP, + DCB_ATTR_IEEE_MAXRATE, __DCB_ATTR_IEEE_MAX }; #define DCB_ATTR_IEEE_MAX (__DCB_ATTR_IEEE_MAX - 1) diff --git a/include/linux/dccp.h b/include/linux/dccp.h index eaf95a023af4..d16294e2a118 100644 --- a/include/linux/dccp.h +++ b/include/linux/dccp.h @@ -549,6 +549,8 @@ static inline const char *dccp_role(const struct sock *sk) return NULL; } +extern void dccp_syn_ack_timeout(struct sock *sk, struct request_sock *req); + #endif /* __KERNEL__ */ #endif /* _LINUX_DCCP_H */ diff --git a/include/linux/dmar.h b/include/linux/dmar.h index 731a60975101..b029d1aa2d12 100644 --- a/include/linux/dmar.h +++ b/include/linux/dmar.h @@ -114,91 +114,6 @@ struct irte { }; }; -#ifdef CONFIG_IRQ_REMAP -extern int intr_remapping_enabled; -extern int intr_remapping_supported(void); -extern int enable_intr_remapping(void); -extern void disable_intr_remapping(void); -extern int reenable_intr_remapping(int); - -extern int get_irte(int irq, struct irte *entry); -extern int modify_irte(int irq, struct irte *irte_modified); -extern int alloc_irte(struct intel_iommu *iommu, int irq, u16 count); -extern int set_irte_irq(int irq, struct intel_iommu *iommu, u16 index, - u16 sub_handle); -extern int map_irq_to_irte_handle(int irq, u16 *sub_handle); -extern int free_irte(int irq); - -extern struct intel_iommu *map_dev_to_ir(struct pci_dev *dev); -extern struct intel_iommu *map_ioapic_to_ir(int apic); -extern struct intel_iommu *map_hpet_to_ir(u8 id); -extern int set_ioapic_sid(struct irte *irte, int apic); -extern int set_hpet_sid(struct irte *irte, u8 id); -extern int set_msi_sid(struct irte *irte, struct pci_dev *dev); -#else -static inline int alloc_irte(struct intel_iommu *iommu, int irq, u16 count) -{ - return -1; -} -static inline int modify_irte(int irq, struct irte *irte_modified) -{ - return -1; -} -static inline int free_irte(int irq) -{ - return -1; -} -static inline int map_irq_to_irte_handle(int irq, u16 *sub_handle) -{ - return -1; -} -static inline int set_irte_irq(int irq, struct intel_iommu *iommu, u16 index, - u16 sub_handle) -{ - return -1; -} -static inline struct intel_iommu *map_dev_to_ir(struct pci_dev *dev) -{ - return NULL; -} -static inline struct intel_iommu *map_ioapic_to_ir(int apic) -{ - return NULL; -} -static inline struct intel_iommu *map_hpet_to_ir(unsigned int hpet_id) -{ - return NULL; -} -static inline int set_ioapic_sid(struct irte *irte, int apic) -{ - return 0; -} -static inline int set_hpet_sid(struct irte *irte, u8 id) -{ - return -1; -} -static inline int set_msi_sid(struct irte *irte, struct pci_dev *dev) -{ - return 0; -} - -#define intr_remapping_enabled (0) - -static inline int enable_intr_remapping(void) -{ - return -1; -} - -static inline void disable_intr_remapping(void) -{ -} - -static inline int reenable_intr_remapping(int eim) -{ - return 0; -} -#endif - enum { IRQ_REMAP_XAPIC_MODE, IRQ_REMAP_X2APIC_MODE, diff --git a/include/linux/efi.h b/include/linux/efi.h index 88ec80670d5f..ec45ccd8708a 100644 --- a/include/linux/efi.h +++ b/include/linux/efi.h @@ -554,7 +554,18 @@ extern int __init efi_setup_pcdp_console(char *); #define EFI_VARIABLE_NON_VOLATILE 0x0000000000000001 #define EFI_VARIABLE_BOOTSERVICE_ACCESS 0x0000000000000002 #define EFI_VARIABLE_RUNTIME_ACCESS 0x0000000000000004 - +#define EFI_VARIABLE_HARDWARE_ERROR_RECORD 0x0000000000000008 +#define EFI_VARIABLE_AUTHENTICATED_WRITE_ACCESS 0x0000000000000010 +#define EFI_VARIABLE_TIME_BASED_AUTHENTICATED_WRITE_ACCESS 0x0000000000000020 +#define EFI_VARIABLE_APPEND_WRITE 0x0000000000000040 + +#define EFI_VARIABLE_MASK (EFI_VARIABLE_NON_VOLATILE | \ + EFI_VARIABLE_BOOTSERVICE_ACCESS | \ + EFI_VARIABLE_RUNTIME_ACCESS | \ + EFI_VARIABLE_HARDWARE_ERROR_RECORD | \ + EFI_VARIABLE_AUTHENTICATED_WRITE_ACCESS | \ + EFI_VARIABLE_TIME_BASED_AUTHENTICATED_WRITE_ACCESS | \ + EFI_VARIABLE_APPEND_WRITE) /* * The type of search to perform when calling boottime->locate_handle */ diff --git a/include/linux/etherdevice.h b/include/linux/etherdevice.h index 8a1835855faa..3d406e0ede6d 100644 --- a/include/linux/etherdevice.h +++ b/include/linux/etherdevice.h @@ -18,8 +18,6 @@ * as published by the Free Software Foundation; either version * 2 of the License, or (at your option) any later version. * - * WARNING: This move may well be temporary. This file will get merged with others RSN. - * */ #ifndef _LINUX_ETHERDEVICE_H #define _LINUX_ETHERDEVICE_H @@ -59,7 +57,7 @@ extern struct net_device *alloc_etherdev_mqs(int sizeof_priv, unsigned int txqs, * * Return true if the address is all zeroes. */ -static inline int is_zero_ether_addr(const u8 *addr) +static inline bool is_zero_ether_addr(const u8 *addr) { return !(addr[0] | addr[1] | addr[2] | addr[3] | addr[4] | addr[5]); } @@ -71,7 +69,7 @@ static inline int is_zero_ether_addr(const u8 *addr) * Return true if the address is a multicast address. * By definition the broadcast address is also a multicast address. */ -static inline int is_multicast_ether_addr(const u8 *addr) +static inline bool is_multicast_ether_addr(const u8 *addr) { return 0x01 & addr[0]; } @@ -82,7 +80,7 @@ static inline int is_multicast_ether_addr(const u8 *addr) * * Return true if the address is a local address. */ -static inline int is_local_ether_addr(const u8 *addr) +static inline bool is_local_ether_addr(const u8 *addr) { return 0x02 & addr[0]; } @@ -93,7 +91,7 @@ static inline int is_local_ether_addr(const u8 *addr) * * Return true if the address is the broadcast address. */ -static inline int is_broadcast_ether_addr(const u8 *addr) +static inline bool is_broadcast_ether_addr(const u8 *addr) { return (addr[0] & addr[1] & addr[2] & addr[3] & addr[4] & addr[5]) == 0xff; } @@ -104,7 +102,7 @@ static inline int is_broadcast_ether_addr(const u8 *addr) * * Return true if the address is a unicast address. */ -static inline int is_unicast_ether_addr(const u8 *addr) +static inline bool is_unicast_ether_addr(const u8 *addr) { return !is_multicast_ether_addr(addr); } @@ -118,7 +116,7 @@ static inline int is_unicast_ether_addr(const u8 *addr) * * Return true if the address is valid. */ -static inline int is_valid_ether_addr(const u8 *addr) +static inline bool is_valid_ether_addr(const u8 *addr) { /* FF:FF:FF:FF:FF:FF is a multicast address so we don't need to * explicitly check for it here. */ @@ -159,7 +157,8 @@ static inline void eth_hw_addr_random(struct net_device *dev) * @addr1: Pointer to a six-byte array containing the Ethernet address * @addr2: Pointer other six-byte array containing the Ethernet address * - * Compare two ethernet addresses, returns 0 if equal + * Compare two Ethernet addresses, returns 0 if equal, non-zero otherwise. + * Unlike memcmp(), it doesn't return a value suitable for sorting. */ static inline unsigned compare_ether_addr(const u8 *addr1, const u8 *addr2) { @@ -170,6 +169,18 @@ static inline unsigned compare_ether_addr(const u8 *addr1, const u8 *addr2) return ((a[0] ^ b[0]) | (a[1] ^ b[1]) | (a[2] ^ b[2])) != 0; } +/** + * ether_addr_equal - Compare two Ethernet addresses + * @addr1: Pointer to a six-byte array containing the Ethernet address + * @addr2: Pointer other six-byte array containing the Ethernet address + * + * Compare two Ethernet addresses, returns true if equal + */ +static inline bool ether_addr_equal(const u8 *addr1, const u8 *addr2) +{ + return !compare_ether_addr(addr1, addr2); +} + static inline unsigned long zap_last_2bytes(unsigned long value) { #ifdef __BIG_ENDIAN @@ -180,34 +191,34 @@ static inline unsigned long zap_last_2bytes(unsigned long value) } /** - * compare_ether_addr_64bits - Compare two Ethernet addresses + * ether_addr_equal_64bits - Compare two Ethernet addresses * @addr1: Pointer to an array of 8 bytes * @addr2: Pointer to an other array of 8 bytes * - * Compare two ethernet addresses, returns 0 if equal. - * Same result than "memcmp(addr1, addr2, ETH_ALEN)" but without conditional - * branches, and possibly long word memory accesses on CPU allowing cheap - * unaligned memory reads. - * arrays = { byte1, byte2, byte3, byte4, byte6, byte7, pad1, pad2} + * Compare two Ethernet addresses, returns true if equal, false otherwise. + * + * The function doesn't need any conditional branches and possibly uses + * word memory accesses on CPU allowing cheap unaligned memory reads. + * arrays = { byte1, byte2, byte3, byte4, byte5, byte6, pad1, pad2 } * - * Please note that alignment of addr1 & addr2 is only guaranted to be 16 bits. + * Please note that alignment of addr1 & addr2 are only guaranteed to be 16 bits. */ -static inline unsigned compare_ether_addr_64bits(const u8 addr1[6+2], - const u8 addr2[6+2]) +static inline bool ether_addr_equal_64bits(const u8 addr1[6+2], + const u8 addr2[6+2]) { #ifdef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS unsigned long fold = ((*(unsigned long *)addr1) ^ (*(unsigned long *)addr2)); if (sizeof(fold) == 8) - return zap_last_2bytes(fold) != 0; + return zap_last_2bytes(fold) == 0; fold |= zap_last_2bytes((*(unsigned long *)(addr1 + 4)) ^ (*(unsigned long *)(addr2 + 4))); - return fold != 0; + return fold == 0; #else - return compare_ether_addr(addr1, addr2); + return ether_addr_equal(addr1, addr2); #endif } @@ -219,23 +230,23 @@ static inline unsigned compare_ether_addr_64bits(const u8 addr1[6+2], * Compare passed address with all addresses of the device. Return true if the * address if one of the device addresses. * - * Note that this function calls compare_ether_addr_64bits() so take care of + * Note that this function calls ether_addr_equal_64bits() so take care of * the right padding. */ static inline bool is_etherdev_addr(const struct net_device *dev, const u8 addr[6 + 2]) { struct netdev_hw_addr *ha; - int res = 1; + bool res = false; rcu_read_lock(); for_each_dev_addr(dev, ha) { - res = compare_ether_addr_64bits(addr, ha->addr); - if (!res) + res = ether_addr_equal_64bits(addr, ha->addr); + if (res) break; } rcu_read_unlock(); - return !res; + return res; } #endif /* __KERNEL__ */ @@ -244,7 +255,7 @@ static inline bool is_etherdev_addr(const struct net_device *dev, * @a: Pointer to Ethernet header * @b: Pointer to Ethernet header * - * Compare two ethernet headers, returns 0 if equal. + * Compare two Ethernet headers, returns 0 if equal. * This assumes that the network header (i.e., IP header) is 4-byte * aligned OR the platform can handle unaligned access. This is the * case for all packets coming into netif_receive_skb or similar diff --git a/include/linux/ethtool.h b/include/linux/ethtool.h index f5647b59a90e..e17fa7140588 100644 --- a/include/linux/ethtool.h +++ b/include/linux/ethtool.h @@ -137,6 +137,23 @@ struct ethtool_eeprom { }; /** + * struct ethtool_modinfo - plugin module eeprom information + * @cmd: %ETHTOOL_GMODULEINFO + * @type: Standard the module information conforms to %ETH_MODULE_SFF_xxxx + * @eeprom_len: Length of the eeprom + * + * This structure is used to return the information to + * properly size memory for a subsequent call to %ETHTOOL_GMODULEEEPROM. + * The type code indicates the eeprom data format + */ +struct ethtool_modinfo { + __u32 cmd; + __u32 type; + __u32 eeprom_len; + __u32 reserved[8]; +}; + +/** * struct ethtool_coalesce - coalescing parameters for IRQs and stats updates * @cmd: ETHTOOL_{G,S}COALESCE * @rx_coalesce_usecs: How many usecs to delay an RX interrupt after @@ -661,12 +678,17 @@ struct ethtool_flash { * %ETHTOOL_SET_DUMP * @version: FW version of the dump, filled in by driver * @flag: driver dependent flag for dump setting, filled in by driver during - * get and filled in by ethtool for set operation + * get and filled in by ethtool for set operation. + * flag must be initialized by macro ETH_FW_DUMP_DISABLE value when + * firmware dump is disabled. * @len: length of dump data, used as the length of the user buffer on entry to * %ETHTOOL_GET_DUMP_DATA and this is returned as dump length by driver * for %ETHTOOL_GET_DUMP_FLAG command * @data: data collected for get dump data operation */ + +#define ETH_FW_DUMP_DISABLE 0 + struct ethtool_dump { __u32 cmd; __u32 version; @@ -726,6 +748,29 @@ struct ethtool_sfeatures { struct ethtool_set_features_block features[0]; }; +/** + * struct ethtool_ts_info - holds a device's timestamping and PHC association + * @cmd: command number = %ETHTOOL_GET_TS_INFO + * @so_timestamping: bit mask of the sum of the supported SO_TIMESTAMPING flags + * @phc_index: device index of the associated PHC, or -1 if there is none + * @tx_types: bit mask of the supported hwtstamp_tx_types enumeration values + * @rx_filters: bit mask of the supported hwtstamp_rx_filters enumeration values + * + * The bits in the 'tx_types' and 'rx_filters' fields correspond to + * the 'hwtstamp_tx_types' and 'hwtstamp_rx_filters' enumeration values, + * respectively. For example, if the device supports HWTSTAMP_TX_ON, + * then (1 << HWTSTAMP_TX_ON) in 'tx_types' will be set. + */ +struct ethtool_ts_info { + __u32 cmd; + __u32 so_timestamping; + __s32 phc_index; + __u32 tx_types; + __u32 tx_reserved[3]; + __u32 rx_filters; + __u32 rx_reserved[3]; +}; + /* * %ETHTOOL_SFEATURES changes features present in features[].valid to the * values of corresponding bits in features[].requested. Bits in .requested @@ -788,6 +833,7 @@ struct net_device; /* Some generic methods drivers may use in their ethtool_ops */ u32 ethtool_op_get_link(struct net_device *dev); +int ethtool_op_get_ts_info(struct net_device *dev, struct ethtool_ts_info *eti); /** * ethtool_rxfh_indir_default - get default value for RX flow hash indirection @@ -893,6 +939,12 @@ static inline u32 ethtool_rxfh_indir_default(u32 index, u32 n_rx_rings) * and flag of the device. * @get_dump_data: Get dump data. * @set_dump: Set dump specific flags to the device. + * @get_ts_info: Get the time stamping and PTP hardware clock capabilities. + * Drivers supporting transmit time stamps in software should set this to + * ethtool_op_get_ts_info(). + * @get_module_info: Get the size and type of the eeprom contained within + * a plug-in module. + * @get_module_eeprom: Get the eeprom information from the plug-in module * * All operations are optional (i.e. the function pointer may be set * to %NULL) and callers must take this into account. Callers must @@ -954,6 +1006,12 @@ struct ethtool_ops { int (*get_dump_data)(struct net_device *, struct ethtool_dump *, void *); int (*set_dump)(struct net_device *, struct ethtool_dump *); + int (*get_ts_info)(struct net_device *, struct ethtool_ts_info *); + int (*get_module_info)(struct net_device *, + struct ethtool_modinfo *); + int (*get_module_eeprom)(struct net_device *, + struct ethtool_eeprom *, u8 *); + }; #endif /* __KERNEL__ */ @@ -1028,6 +1086,9 @@ struct ethtool_ops { #define ETHTOOL_SET_DUMP 0x0000003e /* Set dump settings */ #define ETHTOOL_GET_DUMP_FLAG 0x0000003f /* Get dump settings */ #define ETHTOOL_GET_DUMP_DATA 0x00000040 /* Get dump data */ +#define ETHTOOL_GET_TS_INFO 0x00000041 /* Get time stamping and PHC info */ +#define ETHTOOL_GMODULEINFO 0x00000042 /* Get plug-in module information */ +#define ETHTOOL_GMODULEEEPROM 0x00000043 /* Get plug-in module eeprom */ /* compatibility with older code */ #define SPARC_ETH_GSET ETHTOOL_GSET @@ -1177,6 +1238,12 @@ struct ethtool_ops { #define RX_CLS_LOC_FIRST 0xfffffffe #define RX_CLS_LOC_LAST 0xfffffffd +/* EEPROM Standards for plug in modules */ +#define ETH_MODULE_SFF_8079 0x1 +#define ETH_MODULE_SFF_8079_LEN 256 +#define ETH_MODULE_SFF_8472 0x2 +#define ETH_MODULE_SFF_8472_LEN 512 + /* Reset flags */ /* The reset() operation must clear the flags for the components which * were actually reset. On successful return, the flags indicate the diff --git a/include/linux/filter.h b/include/linux/filter.h index 8eeb205f298b..82b01357af8b 100644 --- a/include/linux/filter.h +++ b/include/linux/filter.h @@ -10,6 +10,7 @@ #ifdef __KERNEL__ #include <linux/atomic.h> +#include <linux/compat.h> #endif /* @@ -126,12 +127,23 @@ struct sock_fprog { /* Required for SO_ATTACH_FILTER. */ #define SKF_AD_HATYPE 28 #define SKF_AD_RXHASH 32 #define SKF_AD_CPU 36 -#define SKF_AD_MAX 40 +#define SKF_AD_ALU_XOR_X 40 +#define SKF_AD_MAX 44 #define SKF_NET_OFF (-0x100000) #define SKF_LL_OFF (-0x200000) #ifdef __KERNEL__ +#ifdef CONFIG_COMPAT +/* + * A struct sock_filter is architecture independent. + */ +struct compat_sock_fprog { + u16 len; + compat_uptr_t filter; /* struct sock_filter * */ +}; +#endif + struct sk_buff; struct sock; @@ -153,6 +165,9 @@ static inline unsigned int sk_filter_len(const struct sk_filter *fp) extern int sk_filter(struct sock *sk, struct sk_buff *skb); extern unsigned int sk_run_filter(const struct sk_buff *skb, const struct sock_filter *filter); +extern int sk_unattached_filter_create(struct sk_filter **pfp, + struct sock_fprog *fprog); +extern void sk_unattached_filter_destroy(struct sk_filter *fp); extern int sk_attach_filter(struct sock_fprog *fprog, struct sock *sk); extern int sk_detach_filter(struct sock *sk); extern int sk_chk_filter(struct sock_filter *filter, unsigned int flen); @@ -228,6 +243,8 @@ enum { BPF_S_ANC_HATYPE, BPF_S_ANC_RXHASH, BPF_S_ANC_CPU, + BPF_S_ANC_ALU_XOR_X, + BPF_S_ANC_SECCOMP_LD_W, }; #endif /* __KERNEL__ */ diff --git a/include/linux/fs.h b/include/linux/fs.h index 8de675523e46..25c40b9f848a 100644 --- a/include/linux/fs.h +++ b/include/linux/fs.h @@ -2051,6 +2051,7 @@ extern void unregister_blkdev(unsigned int, const char *); extern struct block_device *bdget(dev_t); extern struct block_device *bdgrab(struct block_device *bdev); extern void bd_set_size(struct block_device *, loff_t size); +extern sector_t blkdev_max_block(struct block_device *bdev); extern void bd_forget(struct inode *inode); extern void bdput(struct block_device *); extern void invalidate_bdev(struct block_device *); diff --git a/include/linux/fsl_devices.h b/include/linux/fsl_devices.h index fffdf00f87b9..15be561e7397 100644 --- a/include/linux/fsl_devices.h +++ b/include/linux/fsl_devices.h @@ -6,7 +6,7 @@ * * Maintainer: Kumar Gala <galak@kernel.crashing.org> * - * Copyright 2004 Freescale Semiconductor, Inc + * Copyright 2004,2012 Freescale Semiconductor, Inc * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the @@ -17,6 +17,12 @@ #ifndef _FSL_DEVICE_H_ #define _FSL_DEVICE_H_ +#define FSL_UTMI_PHY_DLY 10 /*As per P1010RM, delay for UTMI + PHY CLK to become stable - 10ms*/ +#define FSL_USB_VER_OLD 0 +#define FSL_USB_VER_1_6 1 +#define FSL_USB_VER_2_2 2 + #include <linux/types.h> /* @@ -63,6 +69,7 @@ struct platform_device; struct fsl_usb2_platform_data { /* board specific information */ + int controller_ver; enum fsl_usb2_operating_modes operating_mode; enum fsl_usb2_phy_modes phy_mode; unsigned int port_enables; diff --git a/include/linux/ftrace_event.h b/include/linux/ftrace_event.h index 5f3f3be5af09..176a939d1547 100644 --- a/include/linux/ftrace_event.h +++ b/include/linux/ftrace_event.h @@ -179,6 +179,7 @@ enum { TRACE_EVENT_FL_RECORDED_CMD_BIT, TRACE_EVENT_FL_CAP_ANY_BIT, TRACE_EVENT_FL_NO_SET_FILTER_BIT, + TRACE_EVENT_FL_IGNORE_ENABLE_BIT, }; enum { @@ -187,6 +188,7 @@ enum { TRACE_EVENT_FL_RECORDED_CMD = (1 << TRACE_EVENT_FL_RECORDED_CMD_BIT), TRACE_EVENT_FL_CAP_ANY = (1 << TRACE_EVENT_FL_CAP_ANY_BIT), TRACE_EVENT_FL_NO_SET_FILTER = (1 << TRACE_EVENT_FL_NO_SET_FILTER_BIT), + TRACE_EVENT_FL_IGNORE_ENABLE = (1 << TRACE_EVENT_FL_IGNORE_ENABLE_BIT), }; struct ftrace_event_call { diff --git a/include/linux/genhd.h b/include/linux/genhd.h index e61d3192448e..017a7fb5a1fc 100644 --- a/include/linux/genhd.h +++ b/include/linux/genhd.h @@ -222,12 +222,6 @@ static inline void part_pack_uuid(const u8 *uuid_str, u8 *to) } } -static inline char *part_unpack_uuid(const u8 *uuid, char *out) -{ - sprintf(out, "%pU", uuid); - return out; -} - static inline int disk_max_parts(struct gendisk *disk) { if (disk->flags & GENHD_FL_EXT_DEVT) diff --git a/include/linux/hyperv.h b/include/linux/hyperv.h index 22172bd43745..68ed7f7e1fc9 100644 --- a/include/linux/hyperv.h +++ b/include/linux/hyperv.h @@ -274,6 +274,33 @@ struct hv_ring_buffer_debug_info { u32 bytes_avail_towrite; }; + +/* + * + * hv_get_ringbuffer_availbytes() + * + * Get number of bytes available to read and to write to + * for the specified ring buffer + */ +static inline void +hv_get_ringbuffer_availbytes(struct hv_ring_buffer_info *rbi, + u32 *read, u32 *write) +{ + u32 read_loc, write_loc, dsize; + + smp_read_barrier_depends(); + + /* Capture the read/write indices before they changed */ + read_loc = rbi->ring_buffer->read_index; + write_loc = rbi->ring_buffer->write_index; + dsize = rbi->ring_datasize; + + *write = write_loc >= read_loc ? dsize - (write_loc - read_loc) : + read_loc - write_loc; + *read = dsize - *write; +} + + /* * We use the same version numbering for all Hyper-V modules. * diff --git a/include/linux/i2c-pnx.h b/include/linux/i2c-pnx.h index a87124d4d533..1bc74afe7a35 100644 --- a/include/linux/i2c-pnx.h +++ b/include/linux/i2c-pnx.h @@ -29,14 +29,10 @@ struct i2c_pnx_algo_data { struct i2c_pnx_mif mif; int last; struct clk *clk; - struct i2c_pnx_data *i2c_pnx; struct i2c_adapter adapter; -}; - -struct i2c_pnx_data { - const char *name; - u32 base; - int irq; + phys_addr_t base; + int irq; + u32 timeout; }; #endif /* __I2C_PNX_H__ */ diff --git a/include/linux/i2c/twl.h b/include/linux/i2c/twl.h index 1f90de0cfdbe..3993477103a5 100644 --- a/include/linux/i2c/twl.h +++ b/include/linux/i2c/twl.h @@ -171,8 +171,6 @@ static inline int twl_class_is_ ##class(void) \ TWL_CLASS_IS(4030, TWL4030_CLASS_ID) TWL_CLASS_IS(6030, TWL6030_CLASS_ID) -#define TWL6025_SUBCLASS BIT(4) /* TWL6025 has changed registers */ - /* * Read and write single 8-bit registers */ @@ -746,6 +744,17 @@ struct twl_regulator_driver_data { void *data; unsigned long features; }; +/* chip-specific feature flags, for twl_regulator_driver_data.features */ +#define TWL4030_VAUX2 BIT(0) /* pre-5030 voltage ranges */ +#define TPS_SUBSET BIT(1) /* tps659[23]0 have fewer LDOs */ +#define TWL5031 BIT(2) /* twl5031 has different registers */ +#define TWL6030_CLASS BIT(3) /* TWL6030 class */ +#define TWL6025_SUBCLASS BIT(4) /* TWL6025 has changed registers */ +#define TWL4030_ALLOW_UNSUPPORTED BIT(5) /* Some voltages are possible + * but not officially supported. + * This flag is necessary to + * enable them. + */ /*----------------------------------------------------------------------*/ diff --git a/include/linux/ibmtr.h b/include/linux/ibmtr.h deleted file mode 100644 index 06695b74d405..000000000000 --- a/include/linux/ibmtr.h +++ /dev/null @@ -1,373 +0,0 @@ -#ifndef __LINUX_IBMTR_H__ -#define __LINUX_IBMTR_H__ - -/* Definitions for an IBM Token Ring card. */ -/* This file is distributed under the GNU GPL */ - -/* ported to the Alpha architecture 02/20/96 (just used the HZ macro) */ - -#define TR_RETRY_INTERVAL (30*HZ) /* 500 on PC = 5 s */ -#define TR_RST_TIME (msecs_to_jiffies(50)) /* 5 on PC = 50 ms */ -#define TR_BUSY_INTERVAL (msecs_to_jiffies(200)) /* 5 on PC = 200 ms */ -#define TR_SPIN_INTERVAL (3*HZ) /* 3 seconds before init timeout */ - -#define TR_ISA 1 -#define TR_MCA 2 -#define TR_ISAPNP 3 -#define NOTOK 0 - -#define IBMTR_SHARED_RAM_SIZE 0x10000 -#define IBMTR_IO_EXTENT 4 -#define IBMTR_MAX_ADAPTERS 4 - -#define CHANNEL_ID 0X1F30 -#define AIP 0X1F00 -#define AIPADAPTYPE 0X1FA0 -#define AIPDATARATE 0X1FA2 -#define AIPEARLYTOKEN 0X1FA4 -#define AIPAVAILSHRAM 0X1FA6 -#define AIPSHRAMPAGE 0X1FA8 -#define AIP4MBDHB 0X1FAA -#define AIP16MBDHB 0X1FAC -#define AIPFID 0X1FBA - -#define ADAPTRESET 0x1 /* Control Adapter reset (add to base) */ -#define ADAPTRESETREL 0x2 /* Release Adapter from reset ( """) */ -#define ADAPTINTREL 0x3 /* Adapter interrupt release */ - -#define GLOBAL_INT_ENABLE 0x02f0 - -/* MMIO bits 0-4 select register */ -#define RRR_EVEN 0x00 /* Shared RAM relocation registers - even and odd */ -/* Used to set the starting address of shared RAM */ -/* Bits 1 through 7 of this register map to bits 13 through 19 of the shared - RAM address.*/ -/* ie: 0x02 sets RAM address to ...ato! issy su wazzoo !! GODZILLA!!! */ -#define RRR_ODD 0x01 -/* Bits 2 and 3 of this register can be read to determine shared RAM size */ -/* 00 for 8k, 01 for 16k, 10 for 32k, 11 for 64k */ -#define WRBR_EVEN 0x02 /* Write region base registers - even and odd */ -#define WRBR_ODD 0x03 -#define WWOR_EVEN 0x04 /* Write window open registers - even and odd */ -#define WWOR_ODD 0x05 -#define WWCR_EVEN 0x06 /* Write window close registers - even and odd */ -#define WWCR_ODD 0x07 - -/* Interrupt status registers - PC system - even and odd */ -#define ISRP_EVEN 0x08 - -#define TCR_INT 0x10 /* Bit 4 - Timer interrupt. The TVR_EVEN timer has - expired. */ -#define ERR_INT 0x08 /* Bit 3 - Error interrupt. The adapter has had an - internal error. */ -#define ACCESS_INT 0x04 /* Bit 2 - Access interrupt. You have attempted to - write to an invalid area of shared RAM - or an invalid register within the MMIO. */ -/* In addition, the following bits within ISRP_EVEN can be turned on or off */ -/* by you to control the interrupt processing: */ -#define INT_ENABLE 0x40 /* Bit 6 - Interrupt enable. If 0, no interrupts will - occur. If 1, interrupts will occur normally. - Normally set to 1. */ -/* Bit 0 - Primary or alternate adapter. Set to zero if this adapter is the - primary adapter, 1 if this adapter is the alternate adapter. */ - - -#define ISRP_ODD 0x09 - -#define ADAP_CHK_INT 0x40 /* Bit 6 - Adapter check. the adapter has - encountered a serious problem and has closed - itself. Whoa. */ -#define SRB_RESP_INT 0x20 /* Bit 5 - SRB response. The adapter has accepted - an SRB request and set the return code within - the SRB. */ -#define ASB_FREE_INT 0x10 /* Bit 4 - ASB free. The adapter has read the ASB - and this area can be safely reused. This interrupt - is only used if your application has set the ASB - free request bit in ISRA_ODD or if an error was - detected in your response. */ -#define ARB_CMD_INT 0x08 /* Bit 3 - ARB command. The adapter has given you a - command for action. The command is located in the - ARB area of shared memory. */ -#define SSB_RESP_INT 0x04 /* Bit 2 - SSB response. The adapter has posted a - response to your SRB (the response is located in - the SSB area of shared memory). */ -/* Bit 1 - Bridge frame forward complete. */ - - - -#define ISRA_EVEN 0x0A /*Interrupt status registers - adapter - even and odd */ -/* Bit 7 - Internal parity error (on adapter's internal bus) */ -/* Bit 6 - Timer interrupt pending */ -/* Bit 5 - Access interrupt (attempt by adapter to access illegal address) */ -/* Bit 4 - Adapter microcode problem (microcode dead-man timer expired) */ -/* Bit 3 - Adapter processor check status */ -/* Bit 2 - Reserved */ -/* Bit 1 - Adapter hardware interrupt mask (prevents internal interrupts) */ -/* Bit 0 - Adapter software interrupt mask (prevents internal software ints) */ - -#define ISRA_ODD 0x0B -#define CMD_IN_SRB 0x20 /* Bit 5 - Indicates that you have placed a new - command in the SRB and are ready for the adapter to - process the command. */ -#define RESP_IN_ASB 0x10 /* Bit 4 - Indicates that you have placed a response - (an ASB) in the shared RAM which is available for - the adapter's use. */ -/* Bit 3 - Indicates that you are ready to put an SRB in the shared RAM, but - that a previous command is still pending. The adapter will then - interrupt you when the previous command is completed */ -/* Bit 2 - Indicates that you are ready to put an ASB in the shared RAM, but - that a previous ASB is still pending. The adapter will then interrupt - you when the previous ASB is copied. */ -#define ARB_FREE 0x2 -#define SSB_FREE 0x1 - -#define TCR_EVEN 0x0C /* Timer control registers - even and odd */ -#define TCR_ODD 0x0D -#define TVR_EVEN 0x0E /* Timer value registers - even and odd */ -#define TVR_ODD 0x0F -#define SRPR_EVEN 0x18 /* Shared RAM paging registers - even and odd */ -#define SRPR_ENABLE_PAGING 0xc0 -#define SRPR_ODD 0x19 /* Not used. */ -#define TOKREAD 0x60 -#define TOKOR 0x40 -#define TOKAND 0x20 -#define TOKWRITE 0x00 - -/* MMIO bits 5-6 select operation */ -/* 00 is used to write to a register */ -/* 01 is used to bitwise AND a byte with a register */ -/* 10 is used to bitwise OR a byte with a register */ -/* 11 is used to read from a register */ - -/* MMIO bits 7-8 select area of interest.. see below */ -/* 00 selects attachment control area. */ -/* 01 is reserved. */ -/* 10 selects adapter identification area A containing the adapter encoded - address. */ -/* 11 selects the adapter identification area B containing test patterns. */ - -#define PCCHANNELID 5049434F3631313039393020 -#define MCCHANNELID 4D4152533633583435313820 - -#define ACA_OFFSET 0x1e00 -#define ACA_SET 0x40 -#define ACA_RESET 0x20 -#define ACA_RW 0x00 - -#ifdef ENABLE_PAGING -#define SET_PAGE(x) (writeb((x), ti->mmio + ACA_OFFSET+ ACA_RW + SRPR_EVEN)) -#else -#define SET_PAGE(x) -#endif - -/* do_tok_int possible values */ -#define FIRST_INT 1 -#define NOT_FIRST 2 - -typedef enum { CLOSED, OPEN } open_state; -//staic const char *printstate[] = { "CLOSED","OPEN"}; - -struct tok_info { - unsigned char irq; - void __iomem *mmio; - unsigned char hw_address[32]; - unsigned char adapter_type; - unsigned char data_rate; - unsigned char token_release; - unsigned char avail_shared_ram; - unsigned char shared_ram_paging; - unsigned char turbo; - unsigned short dhb_size4mb; - unsigned short rbuf_len4; - unsigned short rbuf_cnt4; - unsigned short maxmtu4; - unsigned short dhb_size16mb; - unsigned short rbuf_len16; - unsigned short rbuf_cnt16; - unsigned short maxmtu16; - /* Additions by David Morris */ - unsigned char do_tok_int; - wait_queue_head_t wait_for_reset; - unsigned char sram_base; - /* Additions by Peter De Schrijver */ - unsigned char page_mask; /* mask to select RAM page to Map*/ - unsigned char mapped_ram_size; /* size of RAM page */ - __u32 sram_phys; /* Shared memory base address */ - void __iomem *sram_virt; /* Shared memory base address */ - void __iomem *init_srb; /* Initial System Request Block address */ - void __iomem *srb; /* System Request Block address */ - void __iomem *ssb; /* System Status Block address */ - void __iomem *arb; /* Adapter Request Block address */ - void __iomem *asb; /* Adapter Status Block address */ - __u8 init_srb_page; - __u8 srb_page; - __u8 ssb_page; - __u8 arb_page; - __u8 asb_page; - unsigned short exsap_station_id; - unsigned short global_int_enable; - struct sk_buff *current_skb; - - unsigned char auto_speedsave; - open_state open_status, sap_status; - enum {MANUAL, AUTOMATIC} open_mode; - enum {FAIL, RESTART, REOPEN} open_action; - enum {NO, YES} open_failure; - unsigned char readlog_pending; - unsigned short adapter_int_enable; /* Adapter-specific int enable */ - struct timer_list tr_timer; - unsigned char ring_speed; - spinlock_t lock; /* SMP protection */ -}; - -/* token ring adapter commands */ -#define DIR_INTERRUPT 0x00 /* struct srb_interrupt */ -#define DIR_MOD_OPEN_PARAMS 0x01 -#define DIR_OPEN_ADAPTER 0x03 /* struct dir_open_adapter */ -#define DIR_CLOSE_ADAPTER 0x04 -#define DIR_SET_GRP_ADDR 0x06 -#define DIR_SET_FUNC_ADDR 0x07 /* struct srb_set_funct_addr */ -#define DIR_READ_LOG 0x08 /* struct srb_read_log */ -#define DLC_OPEN_SAP 0x15 /* struct dlc_open_sap */ -#define DLC_CLOSE_SAP 0x16 -#define DATA_LOST 0x20 /* struct asb_rec */ -#define REC_DATA 0x81 /* struct arb_rec_req */ -#define XMIT_DATA_REQ 0x82 /* struct arb_xmit_req */ -#define DLC_STATUS 0x83 /* struct arb_dlc_status */ -#define RING_STAT_CHANGE 0x84 /* struct dlc_open_sap ??? */ - -/* DIR_OPEN_ADAPTER options */ -#define OPEN_PASS_BCON_MAC 0x0100 -#define NUM_RCV_BUF 2 -#define RCV_BUF_LEN 1024 -#define DHB_LENGTH 2048 -#define NUM_DHB 2 -#define DLC_MAX_SAP 2 -#define DLC_MAX_STA 1 - -/* DLC_OPEN_SAP options */ -#define MAX_I_FIELD 0x0088 -#define SAP_OPEN_IND_SAP 0x04 -#define SAP_OPEN_PRIORITY 0x20 -#define SAP_OPEN_STATION_CNT 0x1 -#define XMIT_DIR_FRAME 0x0A -#define XMIT_UI_FRAME 0x0d -#define XMIT_XID_CMD 0x0e -#define XMIT_TEST_CMD 0x11 - -/* srb close return code */ -#define SIGNAL_LOSS 0x8000 -#define HARD_ERROR 0x4000 -#define XMIT_BEACON 0x1000 -#define LOBE_FAULT 0x0800 -#define AUTO_REMOVAL 0x0400 -#define REMOVE_RECV 0x0100 -#define LOG_OVERFLOW 0x0080 -#define RING_RECOVER 0x0020 - -struct srb_init_response { - unsigned char command; - unsigned char init_status; - unsigned char init_status_2; - unsigned char reserved[3]; - __u16 bring_up_code; - __u16 encoded_address; - __u16 level_address; - __u16 adapter_address; - __u16 parms_address; - __u16 mac_address; -}; - -struct dir_open_adapter { - unsigned char command; - char reserved[7]; - __u16 open_options; - unsigned char node_address[6]; - unsigned char group_address[4]; - unsigned char funct_address[4]; - __u16 num_rcv_buf; - __u16 rcv_buf_len; - __u16 dhb_length; - unsigned char num_dhb; - char reserved2; - unsigned char dlc_max_sap; - unsigned char dlc_max_sta; - unsigned char dlc_max_gsap; - unsigned char dlc_max_gmem; - unsigned char dlc_t1_tick_1; - unsigned char dlc_t2_tick_1; - unsigned char dlc_ti_tick_1; - unsigned char dlc_t1_tick_2; - unsigned char dlc_t2_tick_2; - unsigned char dlc_ti_tick_2; - unsigned char product_id[18]; -}; - -struct dlc_open_sap { - unsigned char command; - unsigned char reserved1; - unsigned char ret_code; - unsigned char reserved2; - __u16 station_id; - unsigned char timer_t1; - unsigned char timer_t2; - unsigned char timer_ti; - unsigned char maxout; - unsigned char maxin; - unsigned char maxout_incr; - unsigned char max_retry_count; - unsigned char gsap_max_mem; - __u16 max_i_field; - unsigned char sap_value; - unsigned char sap_options; - unsigned char station_count; - unsigned char sap_gsap_mem; - unsigned char gsap[0]; -}; - -struct srb_xmit { - unsigned char command; - unsigned char cmd_corr; - unsigned char ret_code; - unsigned char reserved1; - __u16 station_id; -}; - -struct arb_rec_req { - unsigned char command; - unsigned char reserved1[3]; - __u16 station_id; - __u16 rec_buf_addr; - unsigned char lan_hdr_len; - unsigned char dlc_hdr_len; - __u16 frame_len; - unsigned char msg_type; -}; - -struct asb_rec { - unsigned char command; - unsigned char reserved1; - unsigned char ret_code; - unsigned char reserved2; - __u16 station_id; - __u16 rec_buf_addr; -}; - -struct rec_buf { - unsigned char reserved1[2]; - __u16 buf_ptr; - unsigned char reserved2; - unsigned char receive_fs; - __u16 buf_len; - unsigned char data[0]; -}; - -struct srb_set_funct_addr { - unsigned char command; - unsigned char reserved1; - unsigned char ret_code; - unsigned char reserved2[3]; - unsigned char funct_address[4]; -}; - -#endif diff --git a/include/linux/ieee80211.h b/include/linux/ieee80211.h index 210e2c325534..ce9af8918514 100644 --- a/include/linux/ieee80211.h +++ b/include/linux/ieee80211.h @@ -640,9 +640,9 @@ struct ieee80211_rann_ie { u8 rann_hopcount; u8 rann_ttl; u8 rann_addr[6]; - u32 rann_seq; - u32 rann_interval; - u32 rann_metric; + __le32 rann_seq; + __le32 rann_interval; + __le32 rann_metric; } __attribute__ ((packed)); enum ieee80211_rann_flags { @@ -1007,13 +1007,13 @@ enum ieee80211_min_mpdu_spacing { }; /** - * struct ieee80211_ht_info - HT information + * struct ieee80211_ht_operation - HT operation IE * - * This structure is the "HT information element" as - * described in 802.11n D5.0 7.3.2.58 + * This structure is the "HT operation element" as + * described in 802.11n-2009 7.3.2.57 */ -struct ieee80211_ht_info { - u8 control_chan; +struct ieee80211_ht_operation { + u8 primary_chan; u8 ht_param; __le16 operation_mode; __le16 stbc_param; @@ -1027,8 +1027,6 @@ struct ieee80211_ht_info { #define IEEE80211_HT_PARAM_CHA_SEC_BELOW 0x03 #define IEEE80211_HT_PARAM_CHAN_WIDTH_ANY 0x04 #define IEEE80211_HT_PARAM_RIFS_MODE 0x08 -#define IEEE80211_HT_PARAM_SPSMP_SUPPORT 0x10 -#define IEEE80211_HT_PARAM_SERV_INTERVAL_GRAN 0xE0 /* for operation_mode */ #define IEEE80211_HT_OP_MODE_PROTECTION 0x0003 @@ -1301,7 +1299,7 @@ enum ieee80211_eid { WLAN_EID_EXT_SUPP_RATES = 50, WLAN_EID_HT_CAPABILITY = 45, - WLAN_EID_HT_INFORMATION = 61, + WLAN_EID_HT_OPERATION = 61, WLAN_EID_RSN = 48, WLAN_EID_MMIE = 76, @@ -1441,6 +1439,18 @@ enum ieee80211_tdls_actioncode { #define WLAN_TDLS_SNAP_RFTYPE 0x2 /** + * enum - mesh synchronization method identifier + * + * @IEEE80211_SYNC_METHOD_NEIGHBOR_OFFSET: the default synchronization method + * @IEEE80211_SYNC_METHOD_VENDOR: a vendor specific synchronization method + * that will be specified in a vendor specific information element + */ +enum { + IEEE80211_SYNC_METHOD_NEIGHBOR_OFFSET = 1, + IEEE80211_SYNC_METHOD_VENDOR = 255, +}; + +/** * enum - mesh path selection protocol identifier * * @IEEE80211_PATH_PROTOCOL_HWMP: the default path selection protocol @@ -1448,7 +1458,7 @@ enum ieee80211_tdls_actioncode { * be specified in a vendor specific information element */ enum { - IEEE80211_PATH_PROTOCOL_HWMP = 0, + IEEE80211_PATH_PROTOCOL_HWMP = 1, IEEE80211_PATH_PROTOCOL_VENDOR = 255, }; @@ -1460,7 +1470,7 @@ enum { * specified in a vendor specific information element */ enum { - IEEE80211_PATH_METRIC_AIRTIME = 0, + IEEE80211_PATH_METRIC_AIRTIME = 1, IEEE80211_PATH_METRIC_VENDOR = 255, }; diff --git a/include/linux/if_arp.h b/include/linux/if_arp.h index 6d722f41ee7c..26cb3c2c5c71 100644 --- a/include/linux/if_arp.h +++ b/include/linux/if_arp.h @@ -82,11 +82,12 @@ #define ARPHRD_FCPL 786 /* Fibrechannel public loop */ #define ARPHRD_FCFABRIC 787 /* Fibrechannel fabric */ /* 787->799 reserved for fibrechannel media types */ -#define ARPHRD_IEEE802_TR 800 /* Magic type ident for TR */ +/* 800 used to be used for token ring */ #define ARPHRD_IEEE80211 801 /* IEEE 802.11 */ #define ARPHRD_IEEE80211_PRISM 802 /* IEEE 802.11 + Prism2 header */ #define ARPHRD_IEEE80211_RADIOTAP 803 /* IEEE 802.11 + radiotap header */ #define ARPHRD_IEEE802154 804 +#define ARPHRD_IEEE802154_MONITOR 805 /* IEEE 802.15.4 network monitor */ #define ARPHRD_PHONET 820 /* PhoNet media type */ #define ARPHRD_PHONET_PIPE 821 /* PhoNet pipe header */ diff --git a/include/linux/if_ec.h b/include/linux/if_ec.h deleted file mode 100644 index d85f9f48129f..000000000000 --- a/include/linux/if_ec.h +++ /dev/null @@ -1,68 +0,0 @@ -/* Definitions for Econet sockets. */ - -#ifndef __LINUX_IF_EC -#define __LINUX_IF_EC - -/* User visible stuff. Glibc provides its own but libc5 folk will use these */ - -struct ec_addr { - unsigned char station; /* Station number. */ - unsigned char net; /* Network number. */ -}; - -struct sockaddr_ec { - unsigned short sec_family; - unsigned char port; /* Port number. */ - unsigned char cb; /* Control/flag byte. */ - unsigned char type; /* Type of message. */ - struct ec_addr addr; - unsigned long cookie; -}; - -#define ECTYPE_PACKET_RECEIVED 0 /* Packet received */ -#define ECTYPE_TRANSMIT_STATUS 0x10 /* Transmit completed, - low nibble holds status */ - -#define ECTYPE_TRANSMIT_OK 1 -#define ECTYPE_TRANSMIT_NOT_LISTENING 2 -#define ECTYPE_TRANSMIT_NET_ERROR 3 -#define ECTYPE_TRANSMIT_NO_CLOCK 4 -#define ECTYPE_TRANSMIT_LINE_JAMMED 5 -#define ECTYPE_TRANSMIT_NOT_PRESENT 6 - -#ifdef __KERNEL__ - -#define EC_HLEN 6 - -/* This is what an Econet frame looks like on the wire. */ -struct ec_framehdr { - unsigned char dst_stn; - unsigned char dst_net; - unsigned char src_stn; - unsigned char src_net; - unsigned char cb; - unsigned char port; -}; - -struct econet_sock { - /* struct sock has to be the first member of econet_sock */ - struct sock sk; - unsigned char cb; - unsigned char port; - unsigned char station; - unsigned char net; - unsigned short num; -}; - -static inline struct econet_sock *ec_sk(const struct sock *sk) -{ - return (struct econet_sock *)sk; -} - -struct ec_device { - unsigned char station, net; /* Econet protocol address */ -}; - -#endif - -#endif diff --git a/include/linux/if_link.h b/include/linux/if_link.h index 4b24ff453aee..f715750d0b87 100644 --- a/include/linux/if_link.h +++ b/include/linux/if_link.h @@ -138,6 +138,8 @@ enum { IFLA_GROUP, /* Group the device belongs to */ IFLA_NET_NS_FD, IFLA_EXT_MASK, /* Extended info mask, VFs, etc */ + IFLA_PROMISCUITY, /* Promiscuity count: > 0 means acts PROMISC */ +#define IFLA_PROMISCUITY IFLA_PROMISCUITY __IFLA_MAX }; @@ -253,6 +255,7 @@ struct ifla_vlan_qos_mapping { enum { IFLA_MACVLAN_UNSPEC, IFLA_MACVLAN_MODE, + IFLA_MACVLAN_FLAGS, __IFLA_MACVLAN_MAX, }; @@ -265,6 +268,8 @@ enum macvlan_mode { MACVLAN_MODE_PASSTHRU = 8,/* take over the underlying device */ }; +#define MACVLAN_FLAG_NOPROMISC 1 + /* SR-IOV virtual function management section */ enum { diff --git a/include/linux/if_macvlan.h b/include/linux/if_macvlan.h index d103dca5c563..f65e8d250f7e 100644 --- a/include/linux/if_macvlan.h +++ b/include/linux/if_macvlan.h @@ -60,6 +60,7 @@ struct macvlan_dev { struct net_device *lowerdev; struct macvlan_pcpu_stats __percpu *pcpu_stats; enum macvlan_mode mode; + u16 flags; int (*receive)(struct sk_buff *skb); int (*forward)(struct net_device *dev, struct sk_buff *skb); struct macvtap_queue *taps[MAX_MACVTAP_QUEUES]; diff --git a/include/linux/if_pppol2tp.h b/include/linux/if_pppol2tp.h index 23cefa1111bf..b4775418d525 100644 --- a/include/linux/if_pppol2tp.h +++ b/include/linux/if_pppol2tp.h @@ -19,10 +19,11 @@ #ifdef __KERNEL__ #include <linux/in.h> +#include <linux/in6.h> #endif /* Structure used to connect() the socket to a particular tunnel UDP - * socket. + * socket over IPv4. */ struct pppol2tp_addr { __kernel_pid_t pid; /* pid that owns the fd. @@ -35,6 +36,20 @@ struct pppol2tp_addr { __u16 d_tunnel, d_session; /* For sending outgoing packets */ }; +/* Structure used to connect() the socket to a particular tunnel UDP + * socket over IPv6. + */ +struct pppol2tpin6_addr { + __kernel_pid_t pid; /* pid that owns the fd. + * 0 => current */ + int fd; /* FD of UDP socket to use */ + + __u16 s_tunnel, s_session; /* For matching incoming packets */ + __u16 d_tunnel, d_session; /* For sending outgoing packets */ + + struct sockaddr_in6 addr; /* IP address and port to send to */ +}; + /* The L2TPv3 protocol changes tunnel and session ids from 16 to 32 * bits. So we need a different sockaddr structure. */ @@ -49,6 +64,17 @@ struct pppol2tpv3_addr { __u32 d_tunnel, d_session; /* For sending outgoing packets */ }; +struct pppol2tpv3in6_addr { + __kernel_pid_t pid; /* pid that owns the fd. + * 0 => current */ + int fd; /* FD of UDP or IP socket to use */ + + __u32 s_tunnel, s_session; /* For matching incoming packets */ + __u32 d_tunnel, d_session; /* For sending outgoing packets */ + + struct sockaddr_in6 addr; /* IP address and port to send to */ +}; + /* Socket options: * DEBUG - bitmask of debug message categories * SENDSEQ - 0 => don't send packets with sequence numbers diff --git a/include/linux/if_pppox.h b/include/linux/if_pppox.h index b5f927f59f26..09c474c480cd 100644 --- a/include/linux/if_pppox.h +++ b/include/linux/if_pppox.h @@ -70,7 +70,7 @@ struct sockaddr_pppox { struct pppoe_addr pppoe; struct pptp_addr pptp; } sa_addr; -} __attribute__((packed)); +} __packed; /* The use of the above union isn't viable because the size of this * struct must stay fixed over time -- applications use sizeof(struct @@ -81,7 +81,13 @@ struct sockaddr_pppol2tp { __kernel_sa_family_t sa_family; /* address family, AF_PPPOX */ unsigned int sa_protocol; /* protocol identifier */ struct pppol2tp_addr pppol2tp; -} __attribute__((packed)); +} __packed; + +struct sockaddr_pppol2tpin6 { + __kernel_sa_family_t sa_family; /* address family, AF_PPPOX */ + unsigned int sa_protocol; /* protocol identifier */ + struct pppol2tpin6_addr pppol2tp; +} __packed; /* The L2TPv3 protocol changes tunnel and session ids from 16 to 32 * bits. So we need a different sockaddr structure. @@ -90,7 +96,13 @@ struct sockaddr_pppol2tpv3 { __kernel_sa_family_t sa_family; /* address family, AF_PPPOX */ unsigned int sa_protocol; /* protocol identifier */ struct pppol2tpv3_addr pppol2tp; -} __attribute__((packed)); +} __packed; + +struct sockaddr_pppol2tpv3in6 { + __kernel_sa_family_t sa_family; /* address family, AF_PPPOX */ + unsigned int sa_protocol; /* protocol identifier */ + struct pppol2tpv3in6_addr pppol2tp; +} __packed; /********************************************************************* * @@ -140,7 +152,7 @@ struct pppoe_hdr { __be16 sid; __be16 length; struct pppoe_tag tag[0]; -} __attribute__((packed)); +} __packed; /* Length of entire PPPoE + PPP header */ #define PPPOE_SES_HLEN 8 diff --git a/include/linux/if_team.h b/include/linux/if_team.h index 58404b0c5010..8185f57a9c7f 100644 --- a/include/linux/if_team.h +++ b/include/linux/if_team.h @@ -28,10 +28,28 @@ struct team; struct team_port { struct net_device *dev; - struct hlist_node hlist; /* node in hash list */ + struct hlist_node hlist; /* node in enabled ports hash list */ struct list_head list; /* node in ordinary list */ struct team *team; - int index; + int index; /* index of enabled port. If disabled, it's set to -1 */ + + bool linkup; /* either state.linkup or user.linkup */ + + struct { + bool linkup; + u32 speed; + u8 duplex; + } state; + + /* Values set by userspace */ + struct { + bool linkup; + bool linkup_enabled; + } user; + + /* Custom gennetlink interface related flags */ + bool changed; + bool removed; /* * A place for storing original values of the device before it @@ -42,14 +60,6 @@ struct team_port { unsigned int mtu; } orig; - bool linkup; - u32 speed; - u8 duplex; - - /* Custom gennetlink interface related flags */ - bool changed; - bool removed; - struct rcu_head rcu; }; @@ -68,18 +78,30 @@ struct team_mode_ops { enum team_option_type { TEAM_OPTION_TYPE_U32, TEAM_OPTION_TYPE_STRING, + TEAM_OPTION_TYPE_BINARY, + TEAM_OPTION_TYPE_BOOL, +}; + +struct team_gsetter_ctx { + union { + u32 u32_val; + const char *str_val; + struct { + const void *ptr; + u32 len; + } bin_val; + bool bool_val; + } data; + struct team_port *port; }; struct team_option { struct list_head list; const char *name; + bool per_port; enum team_option_type type; - int (*getter)(struct team *team, void *arg); - int (*setter)(struct team *team, void *arg); - - /* Custom gennetlink interface related flags */ - bool changed; - bool removed; + int (*getter)(struct team *team, struct team_gsetter_ctx *ctx); + int (*setter)(struct team *team, struct team_gsetter_ctx *ctx); }; struct team_mode { @@ -103,13 +125,15 @@ struct team { struct mutex lock; /* used for overall locking, e.g. port lists write */ /* - * port lists with port count + * List of enabled ports and their count */ - int port_count; - struct hlist_head port_hlist[TEAM_PORT_HASHENTRIES]; - struct list_head port_list; + int en_port_count; + struct hlist_head en_port_hlist[TEAM_PORT_HASHENTRIES]; + + struct list_head port_list; /* list of all ports */ struct list_head option_list; + struct list_head option_inst_list; /* list of option instances */ const struct team_mode *mode; struct team_mode_ops ops; @@ -119,7 +143,7 @@ struct team { static inline struct hlist_head *team_port_index_hash(struct team *team, int port_index) { - return &team->port_hlist[port_index & (TEAM_PORT_HASHENTRIES - 1)]; + return &team->en_port_hlist[port_index & (TEAM_PORT_HASHENTRIES - 1)]; } static inline struct team_port *team_get_port_by_index(struct team *team, @@ -216,6 +240,7 @@ enum { TEAM_ATTR_OPTION_TYPE, /* u8 */ TEAM_ATTR_OPTION_DATA, /* dynamic */ TEAM_ATTR_OPTION_REMOVED, /* flag */ + TEAM_ATTR_OPTION_PORT_IFINDEX, /* u32 */ /* for per-port options */ __TEAM_ATTR_OPTION_MAX, TEAM_ATTR_OPTION_MAX = __TEAM_ATTR_OPTION_MAX - 1, diff --git a/include/linux/if_tr.h b/include/linux/if_tr.h deleted file mode 100644 index fc23aeb0f201..000000000000 --- a/include/linux/if_tr.h +++ /dev/null @@ -1,103 +0,0 @@ -/* - * INET An implementation of the TCP/IP protocol suite for the LINUX - * operating system. INET is implemented using the BSD Socket - * interface as the means of communication with the user level. - * - * Global definitions for the Token-Ring IEEE 802.5 interface. - * - * Version: @(#)if_tr.h 0.0 07/11/94 - * - * Author: Fred N. van Kempen, <waltje@uWalt.NL.Mugnet.ORG> - * Donald Becker, <becker@super.org> - * Peter De Schrijver, <stud11@cc4.kuleuven.ac.be> - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ -#ifndef _LINUX_IF_TR_H -#define _LINUX_IF_TR_H - -#include <linux/types.h> -#include <asm/byteorder.h> /* For __be16 */ - -/* IEEE 802.5 Token-Ring magic constants. The frame sizes omit the preamble - and FCS/CRC (frame check sequence). */ -#define TR_ALEN 6 /* Octets in one token-ring addr */ -#define TR_HLEN (sizeof(struct trh_hdr)+sizeof(struct trllc)) -#define AC 0x10 -#define LLC_FRAME 0x40 - -/* LLC and SNAP constants */ -#define EXTENDED_SAP 0xAA -#define UI_CMD 0x03 - -/* This is an Token-Ring frame header. */ -struct trh_hdr { - __u8 ac; /* access control field */ - __u8 fc; /* frame control field */ - __u8 daddr[TR_ALEN]; /* destination address */ - __u8 saddr[TR_ALEN]; /* source address */ - __be16 rcf; /* route control field */ - __be16 rseg[8]; /* routing registers */ -}; - -#ifdef __KERNEL__ -#include <linux/skbuff.h> - -static inline struct trh_hdr *tr_hdr(const struct sk_buff *skb) -{ - return (struct trh_hdr *)skb_mac_header(skb); -} -#endif - -/* This is an Token-Ring LLC structure */ -struct trllc { - __u8 dsap; /* destination SAP */ - __u8 ssap; /* source SAP */ - __u8 llc; /* LLC control field */ - __u8 protid[3]; /* protocol id */ - __be16 ethertype; /* ether type field */ -}; - -/* Token-Ring statistics collection data. */ -struct tr_statistics { - unsigned long rx_packets; /* total packets received */ - unsigned long tx_packets; /* total packets transmitted */ - unsigned long rx_bytes; /* total bytes received */ - unsigned long tx_bytes; /* total bytes transmitted */ - unsigned long rx_errors; /* bad packets received */ - unsigned long tx_errors; /* packet transmit problems */ - unsigned long rx_dropped; /* no space in linux buffers */ - unsigned long tx_dropped; /* no space available in linux */ - unsigned long multicast; /* multicast packets received */ - unsigned long transmit_collision; - - /* detailed Token-Ring errors. See IBM Token-Ring Network - Architecture for more info */ - - unsigned long line_errors; - unsigned long internal_errors; - unsigned long burst_errors; - unsigned long A_C_errors; - unsigned long abort_delimiters; - unsigned long lost_frames; - unsigned long recv_congest_count; - unsigned long frame_copied_errors; - unsigned long frequency_errors; - unsigned long token_errors; - unsigned long dummy1; -}; - -/* source routing stuff */ -#define TR_RII 0x80 -#define TR_RCF_DIR_BIT 0x80 -#define TR_RCF_LEN_MASK 0x1f00 -#define TR_RCF_BROADCAST 0x8000 /* all-routes broadcast */ -#define TR_RCF_LIMITED_BROADCAST 0xC000 /* single-route broadcast */ -#define TR_RCF_FRAME2K 0x20 -#define TR_RCF_BROADCAST_MASK 0xC000 -#define TR_MAXRIFLEN 18 - -#endif /* _LINUX_IF_TR_H */ diff --git a/include/linux/in6.h b/include/linux/in6.h index 5c83d9e3eb8f..cba469ba11a4 100644 --- a/include/linux/in6.h +++ b/include/linux/in6.h @@ -142,7 +142,7 @@ struct in6_flowlabel_req { /* * IPv6 TLV options. */ -#define IPV6_TLV_PAD0 0 +#define IPV6_TLV_PAD1 0 #define IPV6_TLV_PADN 1 #define IPV6_TLV_ROUTERALERT 5 #define IPV6_TLV_JUMBO 194 diff --git a/include/linux/interrupt.h b/include/linux/interrupt.h index 2aea5d22db07..c91171599cb6 100644 --- a/include/linux/interrupt.h +++ b/include/linux/interrupt.h @@ -93,27 +93,27 @@ typedef irqreturn_t (*irq_handler_t)(int, void *); /** * struct irqaction - per interrupt action descriptor * @handler: interrupt handler function - * @flags: flags (see IRQF_* above) * @name: name of the device * @dev_id: cookie to identify the device * @percpu_dev_id: cookie to identify the device * @next: pointer to the next irqaction for shared interrupts * @irq: interrupt number - * @dir: pointer to the proc/irq/NN/name entry + * @flags: flags (see IRQF_* above) * @thread_fn: interrupt handler function for threaded interrupts * @thread: thread pointer for threaded interrupts * @thread_flags: flags related to @thread * @thread_mask: bitmask for keeping track of @thread activity + * @dir: pointer to the proc/irq/NN/name entry */ struct irqaction { irq_handler_t handler; - unsigned long flags; void *dev_id; void __percpu *percpu_dev_id; struct irqaction *next; - int irq; irq_handler_t thread_fn; struct task_struct *thread; + unsigned int irq; + unsigned int flags; unsigned long thread_flags; unsigned long thread_mask; const char *name; diff --git a/include/linux/ioport.h b/include/linux/ioport.h index e885ba23de70..589e0e75efae 100644 --- a/include/linux/ioport.h +++ b/include/linux/ioport.h @@ -223,5 +223,12 @@ extern int walk_system_ram_range(unsigned long start_pfn, unsigned long nr_pages, void *arg, int (*func)(unsigned long, unsigned long, void *)); +/* True if any part of r1 overlaps r2 */ +static inline bool resource_overlaps(struct resource *r1, struct resource *r2) +{ + return (r1->start <= r2->end && r1->end >= r2->start); +} + + #endif /* __ASSEMBLY__ */ #endif /* _LINUX_IOPORT_H */ diff --git a/include/linux/ip_vs.h b/include/linux/ip_vs.h index 4deb3834d62c..8a2d438dc499 100644 --- a/include/linux/ip_vs.h +++ b/include/linux/ip_vs.h @@ -89,6 +89,7 @@ #define IP_VS_CONN_F_TEMPLATE 0x1000 /* template, not connection */ #define IP_VS_CONN_F_ONE_PACKET 0x2000 /* forward only one packet */ +/* Initial bits allowed in backup server */ #define IP_VS_CONN_F_BACKUP_MASK (IP_VS_CONN_F_FWD_MASK | \ IP_VS_CONN_F_NOOUTPUT | \ IP_VS_CONN_F_INACTIVE | \ @@ -97,6 +98,10 @@ IP_VS_CONN_F_TEMPLATE \ ) +/* Bits allowed to update in backup server */ +#define IP_VS_CONN_F_BACKUP_UPD_MASK (IP_VS_CONN_F_INACTIVE | \ + IP_VS_CONN_F_SEQ_MASK) + /* Flags that are not sent to backup server start from bit 16 */ #define IP_VS_CONN_F_NFCT (1 << 16) /* use netfilter conntrack */ @@ -125,8 +130,8 @@ struct ip_vs_service_user { /* virtual service options */ char sched_name[IP_VS_SCHEDNAME_MAXLEN]; - unsigned flags; /* virtual service flags */ - unsigned timeout; /* persistent timeout in sec */ + unsigned int flags; /* virtual service flags */ + unsigned int timeout; /* persistent timeout in sec */ __be32 netmask; /* persistent netmask */ }; @@ -137,7 +142,7 @@ struct ip_vs_dest_user { __be16 port; /* real server options */ - unsigned conn_flags; /* connection flags */ + unsigned int conn_flags; /* connection flags */ int weight; /* destination weight */ /* thresholds for active connections */ @@ -187,8 +192,8 @@ struct ip_vs_service_entry { /* service options */ char sched_name[IP_VS_SCHEDNAME_MAXLEN]; - unsigned flags; /* virtual service flags */ - unsigned timeout; /* persistent timeout */ + unsigned int flags; /* virtual service flags */ + unsigned int timeout; /* persistent timeout */ __be32 netmask; /* persistent netmask */ /* number of real servers */ @@ -202,7 +207,7 @@ struct ip_vs_service_entry { struct ip_vs_dest_entry { __be32 addr; /* destination address */ __be16 port; - unsigned conn_flags; /* connection flags */ + unsigned int conn_flags; /* connection flags */ int weight; /* destination weight */ __u32 u_threshold; /* upper threshold */ diff --git a/include/linux/ipx.h b/include/linux/ipx.h index 3d48014cdd71..8f0243982eb6 100644 --- a/include/linux/ipx.h +++ b/include/linux/ipx.h @@ -38,7 +38,7 @@ struct ipx_interface_definition { #define IPX_FRAME_8022 2 #define IPX_FRAME_ETHERII 3 #define IPX_FRAME_8023 4 -#define IPX_FRAME_TR_8022 5 /* obsolete */ +/* obsolete token ring was 5 */ unsigned char ipx_special; #define IPX_SPECIAL_NONE 0 #define IPX_PRIMARY 1 diff --git a/include/linux/key.h b/include/linux/key.h index 96933b1e5d24..5231800770e1 100644 --- a/include/linux/key.h +++ b/include/linux/key.h @@ -124,7 +124,10 @@ static inline unsigned long is_key_possessed(const key_ref_t key_ref) struct key { atomic_t usage; /* number of references */ key_serial_t serial; /* key serial number */ - struct rb_node serial_node; + union { + struct list_head graveyard_link; + struct rb_node serial_node; + }; struct key_type *type; /* type of key */ struct rw_semaphore sem; /* change vs change sem */ struct key_user *user; /* owner of this key */ @@ -133,6 +136,7 @@ struct key { time_t expiry; /* time at which key expires (or 0) */ time_t revoked_at; /* time at which key was revoked */ }; + time_t last_used_at; /* last time used for LRU keyring discard */ uid_t uid; gid_t gid; key_perm_t perm; /* access permissions */ @@ -156,6 +160,7 @@ struct key { #define KEY_FLAG_USER_CONSTRUCT 4 /* set if key is being constructed in userspace */ #define KEY_FLAG_NEGATIVE 5 /* set if key is negative */ #define KEY_FLAG_ROOT_CAN_CLEAR 6 /* set if key can be cleared by root without permission */ +#define KEY_FLAG_INVALIDATED 7 /* set if key has been invalidated */ /* the description string * - this is used to match a key against search criteria @@ -199,6 +204,7 @@ extern struct key *key_alloc(struct key_type *type, #define KEY_ALLOC_NOT_IN_QUOTA 0x0002 /* not in quota */ extern void key_revoke(struct key *key); +extern void key_invalidate(struct key *key); extern void key_put(struct key *key); static inline struct key *key_get(struct key *key) @@ -236,7 +242,7 @@ extern struct key *request_key_async_with_auxdata(struct key_type *type, extern int wait_for_key_construction(struct key *key, bool intr); -extern int key_validate(struct key *key); +extern int key_validate(const struct key *key); extern key_ref_t key_create_or_update(key_ref_t keyring, const char *type, @@ -319,6 +325,7 @@ extern void key_init(void); #define key_serial(k) 0 #define key_get(k) ({ NULL; }) #define key_revoke(k) do { } while(0) +#define key_invalidate(k) do { } while(0) #define key_put(k) do { } while(0) #define key_ref_put(k) do { } while(0) #define make_key_ref(k, p) NULL diff --git a/include/linux/keyctl.h b/include/linux/keyctl.h index 9b0b865ce622..c9b7f4faf97a 100644 --- a/include/linux/keyctl.h +++ b/include/linux/keyctl.h @@ -55,5 +55,6 @@ #define KEYCTL_SESSION_TO_PARENT 18 /* apply session keyring to parent process */ #define KEYCTL_REJECT 19 /* reject a partially constructed key */ #define KEYCTL_INSTANTIATE_IOV 20 /* instantiate a partially constructed key */ +#define KEYCTL_INVALIDATE 21 /* invalidate a key */ #endif /* _LINUX_KEYCTL_H */ diff --git a/include/linux/l2tp.h b/include/linux/l2tp.h index e77d7f9bb246..7eab668f60f3 100644 --- a/include/linux/l2tp.h +++ b/include/linux/l2tp.h @@ -11,6 +11,7 @@ #include <linux/socket.h> #ifdef __KERNEL__ #include <linux/in.h> +#include <linux/in6.h> #else #include <netinet/in.h> #endif @@ -39,6 +40,22 @@ struct sockaddr_l2tpip { sizeof(__u32)]; }; +/** + * struct sockaddr_l2tpip6 - the sockaddr structure for L2TP-over-IPv6 sockets + * @l2tp_family: address family number AF_L2TPIP. + * @l2tp_addr: protocol specific address information + * @l2tp_conn_id: connection id of tunnel + */ +struct sockaddr_l2tpip6 { + /* The first fields must match struct sockaddr_in6 */ + __kernel_sa_family_t l2tp_family; /* AF_INET6 */ + __be16 l2tp_unused; /* INET port number (unused) */ + __be32 l2tp_flowinfo; /* IPv6 flow information */ + struct in6_addr l2tp_addr; /* IPv6 address */ + __u32 l2tp_scope_id; /* scope id (new in RFC2553) */ + __u32 l2tp_conn_id; /* Connection ID of tunnel */ +}; + /***************************************************************************** * NETLINK_GENERIC netlink family. *****************************************************************************/ @@ -108,6 +125,8 @@ enum { L2TP_ATTR_MTU, /* u16 */ L2TP_ATTR_MRU, /* u16 */ L2TP_ATTR_STATS, /* nested */ + L2TP_ATTR_IP6_SADDR, /* struct in6_addr */ + L2TP_ATTR_IP6_DADDR, /* struct in6_addr */ __L2TP_ATTR_MAX, }; diff --git a/include/linux/libata.h b/include/linux/libata.h index 42378d637ffb..e926df7b54c9 100644 --- a/include/linux/libata.h +++ b/include/linux/libata.h @@ -996,7 +996,8 @@ extern int ata_sas_scsi_ioctl(struct ata_port *ap, struct scsi_device *dev, extern void ata_sas_port_destroy(struct ata_port *); extern struct ata_port *ata_sas_port_alloc(struct ata_host *, struct ata_port_info *, struct Scsi_Host *); -extern int ata_sas_async_port_init(struct ata_port *); +extern void ata_sas_async_probe(struct ata_port *ap); +extern int ata_sas_sync_probe(struct ata_port *ap); extern int ata_sas_port_init(struct ata_port *); extern int ata_sas_port_start(struct ata_port *ap); extern void ata_sas_port_stop(struct ata_port *ap); diff --git a/include/linux/lsm_audit.h b/include/linux/lsm_audit.h index fad48aab893b..1cc89e9df480 100644 --- a/include/linux/lsm_audit.h +++ b/include/linux/lsm_audit.h @@ -53,7 +53,6 @@ struct common_audit_data { #define LSM_AUDIT_DATA_KMOD 8 #define LSM_AUDIT_DATA_INODE 9 #define LSM_AUDIT_DATA_DENTRY 10 - struct task_struct *tsk; union { struct path path; struct dentry *dentry; @@ -93,11 +92,6 @@ int ipv4_skb_to_auditdata(struct sk_buff *skb, int ipv6_skb_to_auditdata(struct sk_buff *skb, struct common_audit_data *ad, u8 *proto); -/* Initialize an LSM audit data structure. */ -#define COMMON_AUDIT_DATA_INIT(_d, _t) \ - { memset((_d), 0, sizeof(struct common_audit_data)); \ - (_d)->type = LSM_AUDIT_DATA_##_t; } - void common_lsm_audit(struct common_audit_data *a, void (*pre_audit)(struct audit_buffer *, void *), void (*post_audit)(struct audit_buffer *, void *)); diff --git a/include/linux/mISDNhw.h b/include/linux/mISDNhw.h index 4af841408fb5..d0752eca9b44 100644 --- a/include/linux/mISDNhw.h +++ b/include/linux/mISDNhw.h @@ -72,7 +72,9 @@ #define FLG_LL_OK 24 #define FLG_LL_CONN 25 #define FLG_DTMFSEND 26 - +#define FLG_TX_EMPTY 27 +/* stop sending received data upstream */ +#define FLG_RX_OFF 28 /* workq events */ #define FLG_RECVQUEUE 30 #define FLG_PHCHANGE 31 @@ -135,10 +137,14 @@ extern int create_l1(struct dchannel *, dchannel_l1callback *); #define HW_TESTRX_RAW 0x9602 #define HW_TESTRX_HDLC 0x9702 #define HW_TESTRX_OFF 0x9802 +#define HW_TIMER3_IND 0x9902 +#define HW_TIMER3_VALUE 0x9a00 +#define HW_TIMER3_VMASK 0x00FF struct layer1; extern int l1_event(struct layer1 *, u_int); +#define MISDN_BCH_FILL_SIZE 4 struct bchannel { struct mISDNchannel ch; @@ -150,8 +156,14 @@ struct bchannel { int slot; /* multiport card channel slot */ struct timer_list timer; /* receive data */ + u8 fill[MISDN_BCH_FILL_SIZE]; struct sk_buff *rx_skb; - int maxlen; + unsigned short maxlen; + unsigned short init_maxlen; /* initial value */ + unsigned short next_maxlen; /* pending value */ + unsigned short minlen; /* for transparent data */ + unsigned short init_minlen; /* initial value */ + unsigned short next_minlen; /* pending value */ /* send data */ struct sk_buff *next_skb; struct sk_buff *tx_skb; @@ -163,23 +175,26 @@ struct bchannel { int err_crc; int err_tx; int err_rx; + int dropcnt; }; extern int mISDN_initdchannel(struct dchannel *, int, void *); -extern int mISDN_initbchannel(struct bchannel *, int); +extern int mISDN_initbchannel(struct bchannel *, unsigned short, + unsigned short); extern int mISDN_freedchannel(struct dchannel *); extern void mISDN_clear_bchannel(struct bchannel *); extern int mISDN_freebchannel(struct bchannel *); +extern int mISDN_ctrl_bchannel(struct bchannel *, struct mISDN_ctrl_req *); extern void queue_ch_frame(struct mISDNchannel *, u_int, int, struct sk_buff *); extern int dchannel_senddata(struct dchannel *, struct sk_buff *); extern int bchannel_senddata(struct bchannel *, struct sk_buff *); +extern int bchannel_get_rxbuf(struct bchannel *, int); extern void recv_Dchannel(struct dchannel *); extern void recv_Echannel(struct dchannel *, struct dchannel *); -extern void recv_Bchannel(struct bchannel *, unsigned int id); +extern void recv_Bchannel(struct bchannel *, unsigned int, bool); extern void recv_Dchannel_skb(struct dchannel *, struct sk_buff *); extern void recv_Bchannel_skb(struct bchannel *, struct sk_buff *); -extern void confirm_Bsend(struct bchannel *bch); extern int get_next_bframe(struct bchannel *); extern int get_next_dframe(struct dchannel *); diff --git a/include/linux/mISDNif.h b/include/linux/mISDNif.h index b5e7f2202484..246a3529ecf6 100644 --- a/include/linux/mISDNif.h +++ b/include/linux/mISDNif.h @@ -37,7 +37,7 @@ */ #define MISDN_MAJOR_VERSION 1 #define MISDN_MINOR_VERSION 1 -#define MISDN_RELEASE 21 +#define MISDN_RELEASE 29 /* primitives for information exchange * generell format @@ -115,6 +115,11 @@ #define MDL_ERROR_IND 0x1F04 #define MDL_ERROR_RSP 0x5F04 +/* intern layer 2 */ +#define DL_TIMER200_IND 0x7004 +#define DL_TIMER203_IND 0x7304 +#define DL_INTERN_MSG 0x7804 + /* DL_INFORMATION_IND types */ #define DL_INFO_L2_CONNECT 0x0001 #define DL_INFO_L2_REMOVED 0x0002 @@ -360,6 +365,7 @@ clear_channelmap(u_int nr, u_char *map) #define MISDN_CTRL_LOOP 0x0001 #define MISDN_CTRL_CONNECT 0x0002 #define MISDN_CTRL_DISCONNECT 0x0004 +#define MISDN_CTRL_RX_BUFFER 0x0008 #define MISDN_CTRL_PCMCONNECT 0x0010 #define MISDN_CTRL_PCMDISCONNECT 0x0020 #define MISDN_CTRL_SETPEER 0x0040 @@ -367,6 +373,7 @@ clear_channelmap(u_int nr, u_char *map) #define MISDN_CTRL_RX_OFF 0x0100 #define MISDN_CTRL_FILL_EMPTY 0x0200 #define MISDN_CTRL_GETPEER 0x0400 +#define MISDN_CTRL_L1_TIMER3 0x0800 #define MISDN_CTRL_HW_FEATURES_OP 0x2000 #define MISDN_CTRL_HW_FEATURES 0x2001 #define MISDN_CTRL_HFC_OP 0x4000 @@ -381,6 +388,12 @@ clear_channelmap(u_int nr, u_char *map) #define MISDN_CTRL_HFC_WD_INIT 0x4009 #define MISDN_CTRL_HFC_WD_RESET 0x400A +/* special RX buffer value for MISDN_CTRL_RX_BUFFER request.p1 is the minimum + * buffer size request.p2 the maximum. Using MISDN_CTRL_RX_SIZE_IGNORE will + * not change the value, but still read back the actual stetting. + */ +#define MISDN_CTRL_RX_SIZE_IGNORE -1 + /* socket options */ #define MISDN_TIME_STAMP 0x0001 @@ -585,6 +598,7 @@ static inline struct mISDNdevice *dev_to_mISDN(struct device *dev) extern void set_channel_address(struct mISDNchannel *, u_int, u_int); extern void mISDN_clock_update(struct mISDNclock *, int, struct timeval *); extern unsigned short mISDN_clock_get(void); +extern const char *mISDNDevName4ch(struct mISDNchannel *); #endif /* __KERNEL__ */ #endif /* mISDNIF_H */ diff --git a/include/linux/mdio-mux.h b/include/linux/mdio-mux.h new file mode 100644 index 000000000000..a243dbba8659 --- /dev/null +++ b/include/linux/mdio-mux.h @@ -0,0 +1,21 @@ +/* + * MDIO bus multiplexer framwork. + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 2011, 2012 Cavium, Inc. + */ +#ifndef __LINUX_MDIO_MUX_H +#define __LINUX_MDIO_MUX_H +#include <linux/device.h> + +int mdio_mux_init(struct device *dev, + int (*switch_fn) (int cur, int desired, void *data), + void **mux_handle, + void *data); + +void mdio_mux_uninit(void *mux_handle); + +#endif /* __LINUX_MDIO_MUX_H */ diff --git a/include/linux/mfd/abx500.h b/include/linux/mfd/abx500.h index ee96cd51d8b2..1318ca622633 100644 --- a/include/linux/mfd/abx500.h +++ b/include/linux/mfd/abx500.h @@ -6,7 +6,7 @@ * * ABX500 core access functions. * The abx500 interface is used for the Analog Baseband chip - * ab3100, ab5500, and ab8500. + * ab3100 and ab8500. * * Author: Mattias Wallin <mattias.wallin@stericsson.com> * Author: Mattias Nilsson <mattias.i.nilsson@stericsson.com> @@ -30,9 +30,6 @@ struct device; #define AB3100_P1G 0xc6 #define AB3100_R2A 0xc7 #define AB3100_R2B 0xc8 -#define AB5500_1_0 0x20 -#define AB5500_1_1 0x21 -#define AB5500_2_0 0x24 /* * AB3100, EVENTA1, A2 and A3 event register flags diff --git a/include/linux/mfd/abx500/ab5500.h b/include/linux/mfd/abx500/ab5500.h deleted file mode 100644 index 54f820ed73bb..000000000000 --- a/include/linux/mfd/abx500/ab5500.h +++ /dev/null @@ -1,140 +0,0 @@ -/* - * Copyright (C) ST-Ericsson 2011 - * - * License Terms: GNU General Public License v2 - */ -#ifndef MFD_AB5500_H -#define MFD_AB5500_H - -struct device; - -enum ab5500_devid { - AB5500_DEVID_ADC, - AB5500_DEVID_LEDS, - AB5500_DEVID_POWER, - AB5500_DEVID_REGULATORS, - AB5500_DEVID_SIM, - AB5500_DEVID_RTC, - AB5500_DEVID_CHARGER, - AB5500_DEVID_FUELGAUGE, - AB5500_DEVID_VIBRATOR, - AB5500_DEVID_CODEC, - AB5500_DEVID_USB, - AB5500_DEVID_OTP, - AB5500_DEVID_VIDEO, - AB5500_DEVID_DBIECI, - AB5500_DEVID_ONSWA, - AB5500_NUM_DEVICES, -}; - -enum ab5500_banks { - AB5500_BANK_VIT_IO_I2C_CLK_TST_OTP = 0, - AB5500_BANK_VDDDIG_IO_I2C_CLK_TST = 1, - AB5500_BANK_VDENC = 2, - AB5500_BANK_SIM_USBSIM = 3, - AB5500_BANK_LED = 4, - AB5500_BANK_ADC = 5, - AB5500_BANK_RTC = 6, - AB5500_BANK_STARTUP = 7, - AB5500_BANK_DBI_ECI = 8, - AB5500_BANK_CHG = 9, - AB5500_BANK_FG_BATTCOM_ACC = 10, - AB5500_BANK_USB = 11, - AB5500_BANK_IT = 12, - AB5500_BANK_VIBRA = 13, - AB5500_BANK_AUDIO_HEADSETUSB = 14, - AB5500_NUM_BANKS = 15, -}; - -enum ab5500_banks_addr { - AB5500_ADDR_VIT_IO_I2C_CLK_TST_OTP = 0x4A, - AB5500_ADDR_VDDDIG_IO_I2C_CLK_TST = 0x4B, - AB5500_ADDR_VDENC = 0x06, - AB5500_ADDR_SIM_USBSIM = 0x04, - AB5500_ADDR_LED = 0x10, - AB5500_ADDR_ADC = 0x0A, - AB5500_ADDR_RTC = 0x0F, - AB5500_ADDR_STARTUP = 0x03, - AB5500_ADDR_DBI_ECI = 0x07, - AB5500_ADDR_CHG = 0x0B, - AB5500_ADDR_FG_BATTCOM_ACC = 0x0C, - AB5500_ADDR_USB = 0x05, - AB5500_ADDR_IT = 0x0E, - AB5500_ADDR_VIBRA = 0x02, - AB5500_ADDR_AUDIO_HEADSETUSB = 0x0D, -}; - -/* - * Interrupt register offsets - * Bank : 0x0E - */ -#define AB5500_IT_SOURCE0_REG 0x20 -#define AB5500_IT_SOURCE1_REG 0x21 -#define AB5500_IT_SOURCE2_REG 0x22 -#define AB5500_IT_SOURCE3_REG 0x23 -#define AB5500_IT_SOURCE4_REG 0x24 -#define AB5500_IT_SOURCE5_REG 0x25 -#define AB5500_IT_SOURCE6_REG 0x26 -#define AB5500_IT_SOURCE7_REG 0x27 -#define AB5500_IT_SOURCE8_REG 0x28 -#define AB5500_IT_SOURCE9_REG 0x29 -#define AB5500_IT_SOURCE10_REG 0x2A -#define AB5500_IT_SOURCE11_REG 0x2B -#define AB5500_IT_SOURCE12_REG 0x2C -#define AB5500_IT_SOURCE13_REG 0x2D -#define AB5500_IT_SOURCE14_REG 0x2E -#define AB5500_IT_SOURCE15_REG 0x2F -#define AB5500_IT_SOURCE16_REG 0x30 -#define AB5500_IT_SOURCE17_REG 0x31 -#define AB5500_IT_SOURCE18_REG 0x32 -#define AB5500_IT_SOURCE19_REG 0x33 -#define AB5500_IT_SOURCE20_REG 0x34 -#define AB5500_IT_SOURCE21_REG 0x35 -#define AB5500_IT_SOURCE22_REG 0x36 -#define AB5500_IT_SOURCE23_REG 0x37 - -#define AB5500_NUM_IRQ_REGS 23 - -/** - * struct ab5500 - * @access_mutex: lock out concurrent accesses to the AB registers - * @dev: a pointer to the device struct for this chip driver - * @ab5500_irq: the analog baseband irq - * @irq_base: the platform configuration irq base for subdevices - * @chip_name: name of this chip variant - * @chip_id: 8 bit chip ID for this chip variant - * @irq_lock: a lock to protect the mask - * @abb_events: a local bit mask of the prcmu wakeup events - * @event_mask: a local copy of the mask event registers - * @last_event_mask: a copy of the last event_mask written to hardware - * @startup_events: a copy of the first reading of the event registers - * @startup_events_read: whether the first events have been read - */ -struct ab5500 { - struct mutex access_mutex; - struct device *dev; - unsigned int ab5500_irq; - unsigned int irq_base; - char chip_name[32]; - u8 chip_id; - struct mutex irq_lock; - u32 abb_events; - u8 mask[AB5500_NUM_IRQ_REGS]; - u8 oldmask[AB5500_NUM_IRQ_REGS]; - u8 startup_events[AB5500_NUM_IRQ_REGS]; - bool startup_events_read; -#ifdef CONFIG_DEBUG_FS - unsigned int debug_bank; - unsigned int debug_address; -#endif -}; - -struct ab5500_platform_data { - struct {unsigned int base; unsigned int count; } irq; - void *dev_data[AB5500_NUM_DEVICES]; - struct abx500_init_settings *init_settings; - unsigned int init_settings_sz; - bool pm_power_off; -}; - -#endif /* MFD_AB5500_H */ diff --git a/include/linux/mfd/asic3.h b/include/linux/mfd/asic3.h index ed793b77a1c5..ef6faa5cee46 100644 --- a/include/linux/mfd/asic3.h +++ b/include/linux/mfd/asic3.h @@ -138,6 +138,7 @@ struct asic3_platform_data { #define ASIC3_GPIOC13_nPWAIT ASIC3_CONFIG_GPIO(45, 1, 1, 0) #define ASIC3_GPIOC14_nPIOIS16 ASIC3_CONFIG_GPIO(46, 1, 1, 0) #define ASIC3_GPIOC15_nPIOR ASIC3_CONFIG_GPIO(47, 1, 0, 0) +#define ASIC3_GPIOD4_CF_nCD ASIC3_CONFIG_GPIO(52, 1, 0, 0) #define ASIC3_GPIOD11_nCIOIS16 ASIC3_CONFIG_GPIO(59, 1, 0, 0) #define ASIC3_GPIOD12_nCWAIT ASIC3_CONFIG_GPIO(60, 1, 0, 0) #define ASIC3_GPIOD15_nPIOW ASIC3_CONFIG_GPIO(63, 1, 0, 0) diff --git a/include/linux/mfd/da9052/da9052.h b/include/linux/mfd/da9052/da9052.h index 7ffbd6e9e7fc..8313cd9658e3 100644 --- a/include/linux/mfd/da9052/da9052.h +++ b/include/linux/mfd/da9052/da9052.h @@ -80,6 +80,7 @@ struct da9052 { struct regmap *regmap; int irq_base; + struct regmap_irq_chip_data *irq_data; u8 chip_id; int chip_irq; diff --git a/include/linux/mfd/db5500-prcmu.h b/include/linux/mfd/db5500-prcmu.h deleted file mode 100644 index 5a049dfaf153..000000000000 --- a/include/linux/mfd/db5500-prcmu.h +++ /dev/null @@ -1,105 +0,0 @@ -/* - * Copyright (C) ST-Ericsson SA 2010 - * - * License Terms: GNU General Public License v2 - * - * U5500 PRCMU API. - */ -#ifndef __MFD_DB5500_PRCMU_H -#define __MFD_DB5500_PRCMU_H - -static inline int prcmu_resetout(u8 resoutn, u8 state) -{ - return 0; -} - -static inline int db5500_prcmu_set_epod(u16 epod_id, u8 epod_state) -{ - return 0; -} - -static inline int db5500_prcmu_request_clock(u8 clock, bool enable) -{ - return 0; -} - -static inline int db5500_prcmu_set_power_state(u8 state, bool keep_ulp_clk, - bool keep_ap_pll) -{ - return 0; -} - -static inline int db5500_prcmu_config_esram0_deep_sleep(u8 state) -{ - return 0; -} - -static inline u16 db5500_prcmu_get_reset_code(void) -{ - return 0; -} - -static inline bool db5500_prcmu_is_ac_wake_requested(void) -{ - return 0; -} - -static inline int db5500_prcmu_set_arm_opp(u8 opp) -{ - return 0; -} - -static inline int db5500_prcmu_get_arm_opp(void) -{ - return 0; -} - -static inline void db5500_prcmu_config_abb_event_readout(u32 abb_events) {} - -static inline void db5500_prcmu_get_abb_event_buffer(void __iomem **buf) {} - -static inline void db5500_prcmu_system_reset(u16 reset_code) {} - -static inline void db5500_prcmu_enable_wakeups(u32 wakeups) {} - -#ifdef CONFIG_MFD_DB5500_PRCMU - -void db5500_prcmu_early_init(void); -int db5500_prcmu_set_display_clocks(void); -int db5500_prcmu_disable_dsipll(void); -int db5500_prcmu_enable_dsipll(void); -int db5500_prcmu_abb_read(u8 slave, u8 reg, u8 *value, u8 size); -int db5500_prcmu_abb_write(u8 slave, u8 reg, u8 *value, u8 size); - -#else /* !CONFIG_UX500_SOC_DB5500 */ - -static inline void db5500_prcmu_early_init(void) {} - -static inline int db5500_prcmu_abb_read(u8 slave, u8 reg, u8 *value, u8 size) -{ - return -ENOSYS; -} - -static inline int db5500_prcmu_abb_write(u8 slave, u8 reg, u8 *value, u8 size) -{ - return -ENOSYS; -} - -static inline int db5500_prcmu_set_display_clocks(void) -{ - return 0; -} - -static inline int db5500_prcmu_disable_dsipll(void) -{ - return 0; -} - -static inline int db5500_prcmu_enable_dsipll(void) -{ - return 0; -} - -#endif /* CONFIG_MFD_DB5500_PRCMU */ - -#endif /* __MFD_DB5500_PRCMU_H */ diff --git a/include/linux/mfd/dbx500-prcmu.h b/include/linux/mfd/dbx500-prcmu.h index d7674eb7305f..5a13f93d8f1c 100644 --- a/include/linux/mfd/dbx500-prcmu.h +++ b/include/linux/mfd/dbx500-prcmu.h @@ -55,17 +55,6 @@ enum prcmu_wakeup_index { #define NUM_EPOD_ID 8 /* - * DB5500 EPODs - */ -#define DB5500_EPOD_ID_BASE 0x0100 -#define DB5500_EPOD_ID_SGA (DB5500_EPOD_ID_BASE + 0) -#define DB5500_EPOD_ID_HVA (DB5500_EPOD_ID_BASE + 1) -#define DB5500_EPOD_ID_SIA (DB5500_EPOD_ID_BASE + 2) -#define DB5500_EPOD_ID_DISP (DB5500_EPOD_ID_BASE + 3) -#define DB5500_EPOD_ID_ESRAM12 (DB5500_EPOD_ID_BASE + 6) -#define DB5500_NUM_EPOD_ID 7 - -/* * state definition for EPOD (power domain) * - EPOD_STATE_NO_CHANGE: The EPOD should remain unchanged * - EPOD_STATE_OFF: The EPOD is switched off @@ -80,29 +69,6 @@ enum prcmu_wakeup_index { #define EPOD_STATE_ON_CLK_OFF 0x03 #define EPOD_STATE_ON 0x04 -/* DB5500 CLKOUT IDs */ -enum { - DB5500_CLKOUT0 = 0, - DB5500_CLKOUT1, -}; - -/* DB5500 CLKOUTx sources */ -enum { - DB5500_CLKOUT_REF_CLK_SEL0, - DB5500_CLKOUT_RTC_CLK0_SEL0, - DB5500_CLKOUT_ULP_CLK_SEL0, - DB5500_CLKOUT_STATIC0, - DB5500_CLKOUT_REFCLK, - DB5500_CLKOUT_ULPCLK, - DB5500_CLKOUT_ARMCLK, - DB5500_CLKOUT_SYSACC0CLK, - DB5500_CLKOUT_SOC0PLLCLK, - DB5500_CLKOUT_SOC1PLLCLK, - DB5500_CLKOUT_DDRPLLCLK, - DB5500_CLKOUT_TVCLK, - DB5500_CLKOUT_IRDACLK, -}; - /* * CLKOUT sources */ @@ -248,101 +214,66 @@ enum ddr_pwrst { }; #include <linux/mfd/db8500-prcmu.h> -#include <linux/mfd/db5500-prcmu.h> -#if defined(CONFIG_UX500_SOC_DB8500) || defined(CONFIG_UX500_SOC_DB5500) +#if defined(CONFIG_UX500_SOC_DB8500) #include <mach/id.h> static inline void __init prcmu_early_init(void) { - if (cpu_is_u5500()) - return db5500_prcmu_early_init(); - else - return db8500_prcmu_early_init(); + return db8500_prcmu_early_init(); } static inline int prcmu_set_power_state(u8 state, bool keep_ulp_clk, bool keep_ap_pll) { - if (cpu_is_u5500()) - return db5500_prcmu_set_power_state(state, keep_ulp_clk, - keep_ap_pll); - else - return db8500_prcmu_set_power_state(state, keep_ulp_clk, - keep_ap_pll); + return db8500_prcmu_set_power_state(state, keep_ulp_clk, + keep_ap_pll); } static inline u8 prcmu_get_power_state_result(void) { - if (cpu_is_u5500()) - return -EINVAL; - else - return db8500_prcmu_get_power_state_result(); + return db8500_prcmu_get_power_state_result(); } static inline int prcmu_gic_decouple(void) { - if (cpu_is_u5500()) - return -EINVAL; - else - return db8500_prcmu_gic_decouple(); + return db8500_prcmu_gic_decouple(); } static inline int prcmu_gic_recouple(void) { - if (cpu_is_u5500()) - return -EINVAL; - else - return db8500_prcmu_gic_recouple(); + return db8500_prcmu_gic_recouple(); } static inline bool prcmu_gic_pending_irq(void) { - if (cpu_is_u5500()) - return -EINVAL; - else - return db8500_prcmu_gic_pending_irq(); + return db8500_prcmu_gic_pending_irq(); } static inline bool prcmu_is_cpu_in_wfi(int cpu) { - if (cpu_is_u5500()) - return -EINVAL; - else - return db8500_prcmu_is_cpu_in_wfi(cpu); + return db8500_prcmu_is_cpu_in_wfi(cpu); } static inline int prcmu_copy_gic_settings(void) { - if (cpu_is_u5500()) - return -EINVAL; - else - return db8500_prcmu_copy_gic_settings(); + return db8500_prcmu_copy_gic_settings(); } static inline bool prcmu_pending_irq(void) { - if (cpu_is_u5500()) - return -EINVAL; - else - return db8500_prcmu_pending_irq(); + return db8500_prcmu_pending_irq(); } static inline int prcmu_set_epod(u16 epod_id, u8 epod_state) { - if (cpu_is_u5500()) - return -EINVAL; - else - return db8500_prcmu_set_epod(epod_id, epod_state); + return db8500_prcmu_set_epod(epod_id, epod_state); } static inline void prcmu_enable_wakeups(u32 wakeups) { - if (cpu_is_u5500()) - db5500_prcmu_enable_wakeups(wakeups); - else - db8500_prcmu_enable_wakeups(wakeups); + db8500_prcmu_enable_wakeups(wakeups); } static inline void prcmu_disable_wakeups(void) @@ -352,18 +283,12 @@ static inline void prcmu_disable_wakeups(void) static inline void prcmu_config_abb_event_readout(u32 abb_events) { - if (cpu_is_u5500()) - db5500_prcmu_config_abb_event_readout(abb_events); - else - db8500_prcmu_config_abb_event_readout(abb_events); + db8500_prcmu_config_abb_event_readout(abb_events); } static inline void prcmu_get_abb_event_buffer(void __iomem **buf) { - if (cpu_is_u5500()) - db5500_prcmu_get_abb_event_buffer(buf); - else - db8500_prcmu_get_abb_event_buffer(buf); + db8500_prcmu_get_abb_event_buffer(buf); } int prcmu_abb_read(u8 slave, u8 reg, u8 *value, u8 size); @@ -374,10 +299,7 @@ int prcmu_config_clkout(u8 clkout, u8 source, u8 div); static inline int prcmu_request_clock(u8 clock, bool enable) { - if (cpu_is_u5500()) - return db5500_prcmu_request_clock(clock, enable); - else - return db8500_prcmu_request_clock(clock, enable); + return db8500_prcmu_request_clock(clock, enable); } unsigned long prcmu_clock_rate(u8 clock); @@ -386,211 +308,133 @@ int prcmu_set_clock_rate(u8 clock, unsigned long rate); static inline int prcmu_set_ddr_opp(u8 opp) { - if (cpu_is_u5500()) - return -EINVAL; - else - return db8500_prcmu_set_ddr_opp(opp); + return db8500_prcmu_set_ddr_opp(opp); } static inline int prcmu_get_ddr_opp(void) { - if (cpu_is_u5500()) - return -EINVAL; - else - return db8500_prcmu_get_ddr_opp(); + return db8500_prcmu_get_ddr_opp(); } static inline int prcmu_set_arm_opp(u8 opp) { - if (cpu_is_u5500()) - return -EINVAL; - else - return db8500_prcmu_set_arm_opp(opp); + return db8500_prcmu_set_arm_opp(opp); } static inline int prcmu_get_arm_opp(void) { - if (cpu_is_u5500()) - return -EINVAL; - else - return db8500_prcmu_get_arm_opp(); + return db8500_prcmu_get_arm_opp(); } static inline int prcmu_set_ape_opp(u8 opp) { - if (cpu_is_u5500()) - return -EINVAL; - else - return db8500_prcmu_set_ape_opp(opp); + return db8500_prcmu_set_ape_opp(opp); } static inline int prcmu_get_ape_opp(void) { - if (cpu_is_u5500()) - return -EINVAL; - else - return db8500_prcmu_get_ape_opp(); + return db8500_prcmu_get_ape_opp(); } static inline void prcmu_system_reset(u16 reset_code) { - if (cpu_is_u5500()) - return db5500_prcmu_system_reset(reset_code); - else - return db8500_prcmu_system_reset(reset_code); + return db8500_prcmu_system_reset(reset_code); } static inline u16 prcmu_get_reset_code(void) { - if (cpu_is_u5500()) - return db5500_prcmu_get_reset_code(); - else - return db8500_prcmu_get_reset_code(); + return db8500_prcmu_get_reset_code(); } void prcmu_ac_wake_req(void); void prcmu_ac_sleep_req(void); static inline void prcmu_modem_reset(void) { - if (cpu_is_u5500()) - return; - else - return db8500_prcmu_modem_reset(); + return db8500_prcmu_modem_reset(); } static inline bool prcmu_is_ac_wake_requested(void) { - if (cpu_is_u5500()) - return db5500_prcmu_is_ac_wake_requested(); - else - return db8500_prcmu_is_ac_wake_requested(); + return db8500_prcmu_is_ac_wake_requested(); } static inline int prcmu_set_display_clocks(void) { - if (cpu_is_u5500()) - return db5500_prcmu_set_display_clocks(); - else - return db8500_prcmu_set_display_clocks(); + return db8500_prcmu_set_display_clocks(); } static inline int prcmu_disable_dsipll(void) { - if (cpu_is_u5500()) - return db5500_prcmu_disable_dsipll(); - else - return db8500_prcmu_disable_dsipll(); + return db8500_prcmu_disable_dsipll(); } static inline int prcmu_enable_dsipll(void) { - if (cpu_is_u5500()) - return db5500_prcmu_enable_dsipll(); - else - return db8500_prcmu_enable_dsipll(); + return db8500_prcmu_enable_dsipll(); } static inline int prcmu_config_esram0_deep_sleep(u8 state) { - if (cpu_is_u5500()) - return -EINVAL; - else - return db8500_prcmu_config_esram0_deep_sleep(state); + return db8500_prcmu_config_esram0_deep_sleep(state); } static inline int prcmu_config_hotdog(u8 threshold) { - if (cpu_is_u5500()) - return -EINVAL; - else - return db8500_prcmu_config_hotdog(threshold); + return db8500_prcmu_config_hotdog(threshold); } static inline int prcmu_config_hotmon(u8 low, u8 high) { - if (cpu_is_u5500()) - return -EINVAL; - else - return db8500_prcmu_config_hotmon(low, high); + return db8500_prcmu_config_hotmon(low, high); } static inline int prcmu_start_temp_sense(u16 cycles32k) { - if (cpu_is_u5500()) - return -EINVAL; - else - return db8500_prcmu_start_temp_sense(cycles32k); + return db8500_prcmu_start_temp_sense(cycles32k); } static inline int prcmu_stop_temp_sense(void) { - if (cpu_is_u5500()) - return -EINVAL; - else - return db8500_prcmu_stop_temp_sense(); + return db8500_prcmu_stop_temp_sense(); } static inline u32 prcmu_read(unsigned int reg) { - if (cpu_is_u5500()) - return -EINVAL; - else - return db8500_prcmu_read(reg); + return db8500_prcmu_read(reg); } static inline void prcmu_write(unsigned int reg, u32 value) { - if (cpu_is_u5500()) - return; - else - db8500_prcmu_write(reg, value); + db8500_prcmu_write(reg, value); } static inline void prcmu_write_masked(unsigned int reg, u32 mask, u32 value) { - if (cpu_is_u5500()) - return; - else - db8500_prcmu_write_masked(reg, mask, value); + db8500_prcmu_write_masked(reg, mask, value); } static inline int prcmu_enable_a9wdog(u8 id) { - if (cpu_is_u5500()) - return -EINVAL; - else - return db8500_prcmu_enable_a9wdog(id); + return db8500_prcmu_enable_a9wdog(id); } static inline int prcmu_disable_a9wdog(u8 id) { - if (cpu_is_u5500()) - return -EINVAL; - else - return db8500_prcmu_disable_a9wdog(id); + return db8500_prcmu_disable_a9wdog(id); } static inline int prcmu_kick_a9wdog(u8 id) { - if (cpu_is_u5500()) - return -EINVAL; - else - return db8500_prcmu_kick_a9wdog(id); + return db8500_prcmu_kick_a9wdog(id); } static inline int prcmu_load_a9wdog(u8 id, u32 timeout) { - if (cpu_is_u5500()) - return -EINVAL; - else - return db8500_prcmu_load_a9wdog(id, timeout); + return db8500_prcmu_load_a9wdog(id, timeout); } static inline int prcmu_config_a9wdog(u8 num, bool sleep_auto_off) { - if (cpu_is_u5500()) - return -EINVAL; - else - return db8500_prcmu_config_a9wdog(num, sleep_auto_off); + return db8500_prcmu_config_a9wdog(num, sleep_auto_off); } #else @@ -768,7 +612,7 @@ static inline void prcmu_clear(unsigned int reg, u32 bits) prcmu_write_masked(reg, bits, 0); } -#if defined(CONFIG_UX500_SOC_DB8500) || defined(CONFIG_UX500_SOC_DB5500) +#if defined(CONFIG_UX500_SOC_DB8500) /** * prcmu_enable_spi2 - Enables pin muxing for SPI2 on OtherAlternateC1. diff --git a/include/linux/mfd/palmas.h b/include/linux/mfd/palmas.h new file mode 100644 index 000000000000..9cbc642d40ad --- /dev/null +++ b/include/linux/mfd/palmas.h @@ -0,0 +1,2620 @@ +/* + * TI Palmas + * + * Copyright 2011 Texas Instruments Inc. + * + * Author: Graeme Gregory <gg@slimlogic.co.uk> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + */ + +#ifndef __LINUX_MFD_PALMAS_H +#define __LINUX_MFD_PALMAS_H + +#include <linux/usb/otg.h> +#include <linux/leds.h> +#include <linux/regmap.h> +#include <linux/regulator/driver.h> + +#define PALMAS_NUM_CLIENTS 3 + +struct palmas_pmic; + +struct palmas { + struct device *dev; + + struct i2c_client *i2c_clients[PALMAS_NUM_CLIENTS]; + struct regmap *regmap[PALMAS_NUM_CLIENTS]; + + /* Stored chip id */ + int id; + + /* IRQ Data */ + int irq; + u32 irq_mask; + struct mutex irq_lock; + struct regmap_irq_chip_data *irq_data; + + /* Child Devices */ + struct palmas_pmic *pmic; + + /* GPIO MUXing */ + u8 gpio_muxed; + u8 led_muxed; + u8 pwm_muxed; +}; + +struct palmas_reg_init { + /* warm_rest controls the voltage levels after a warm reset + * + * 0: reload default values from OTP on warm reset + * 1: maintain voltage from VSEL on warm reset + */ + int warm_reset; + + /* roof_floor controls whether the regulator uses the i2c style + * of DVS or uses the method where a GPIO or other control method is + * attached to the NSLEEP/ENABLE1/ENABLE2 pins + * + * For SMPS + * + * 0: i2c selection of voltage + * 1: pin selection of voltage. + * + * For LDO unused + */ + int roof_floor; + + /* sleep_mode is the mode loaded to MODE_SLEEP bits as defined in + * the data sheet. + * + * For SMPS + * + * 0: Off + * 1: AUTO + * 2: ECO + * 3: Forced PWM + * + * For LDO + * + * 0: Off + * 1: On + */ + int mode_sleep; + + /* tstep is the timestep loaded to the TSTEP register + * + * For SMPS + * + * 0: Jump (no slope control) + * 1: 10mV/us + * 2: 5mV/us + * 3: 2.5mV/us + * + * For LDO unused + */ + int tstep; + + /* voltage_sel is the bitfield loaded onto the SMPSX_VOLTAGE + * register. Set this is the default voltage set in OTP needs + * to be overridden. + */ + u8 vsel; + +}; + +struct palmas_pmic_platform_data { + /* An array of pointers to regulator init data indexed by regulator + * ID + */ + struct regulator_init_data **reg_data; + + /* An array of pointers to structures containing sleep mode and DVS + * configuration for regulators indexed by ID + */ + struct palmas_reg_init **reg_init; + + /* use LDO6 for vibrator control */ + int ldo6_vibrator; + + +}; + +struct palmas_platform_data { + int gpio_base; + + /* bit value to be loaded to the POWER_CTRL register */ + u8 power_ctrl; + + /* + * boolean to select if we want to configure muxing here + * then the two value to load into the registers if true + */ + int mux_from_pdata; + u8 pad1, pad2; + + struct palmas_pmic_platform_data *pmic_pdata; +}; + +/* Define the palmas IRQ numbers */ +enum palmas_irqs { + /* INT1 registers */ + PALMAS_CHARG_DET_N_VBUS_OVV_IRQ, + PALMAS_PWRON_IRQ, + PALMAS_LONG_PRESS_KEY_IRQ, + PALMAS_RPWRON_IRQ, + PALMAS_PWRDOWN_IRQ, + PALMAS_HOTDIE_IRQ, + PALMAS_VSYS_MON_IRQ, + PALMAS_VBAT_MON_IRQ, + /* INT2 registers */ + PALMAS_RTC_ALARM_IRQ, + PALMAS_RTC_TIMER_IRQ, + PALMAS_WDT_IRQ, + PALMAS_BATREMOVAL_IRQ, + PALMAS_RESET_IN_IRQ, + PALMAS_FBI_BB_IRQ, + PALMAS_SHORT_IRQ, + PALMAS_VAC_ACOK_IRQ, + /* INT3 registers */ + PALMAS_GPADC_AUTO_0_IRQ, + PALMAS_GPADC_AUTO_1_IRQ, + PALMAS_GPADC_EOC_SW_IRQ, + PALMAS_GPADC_EOC_RT_IRQ, + PALMAS_ID_OTG_IRQ, + PALMAS_ID_IRQ, + PALMAS_VBUS_OTG_IRQ, + PALMAS_VBUS_IRQ, + /* INT4 registers */ + PALMAS_GPIO_0_IRQ, + PALMAS_GPIO_1_IRQ, + PALMAS_GPIO_2_IRQ, + PALMAS_GPIO_3_IRQ, + PALMAS_GPIO_4_IRQ, + PALMAS_GPIO_5_IRQ, + PALMAS_GPIO_6_IRQ, + PALMAS_GPIO_7_IRQ, + /* Total Number IRQs */ + PALMAS_NUM_IRQ, +}; + +enum palmas_regulators { + /* SMPS regulators */ + PALMAS_REG_SMPS12, + PALMAS_REG_SMPS123, + PALMAS_REG_SMPS3, + PALMAS_REG_SMPS45, + PALMAS_REG_SMPS457, + PALMAS_REG_SMPS6, + PALMAS_REG_SMPS7, + PALMAS_REG_SMPS8, + PALMAS_REG_SMPS9, + PALMAS_REG_SMPS10, + /* LDO regulators */ + PALMAS_REG_LDO1, + PALMAS_REG_LDO2, + PALMAS_REG_LDO3, + PALMAS_REG_LDO4, + PALMAS_REG_LDO5, + PALMAS_REG_LDO6, + PALMAS_REG_LDO7, + PALMAS_REG_LDO8, + PALMAS_REG_LDO9, + PALMAS_REG_LDOLN, + PALMAS_REG_LDOUSB, + /* Total number of regulators */ + PALMAS_NUM_REGS, +}; + +struct palmas_pmic { + struct palmas *palmas; + struct device *dev; + struct regulator_desc desc[PALMAS_NUM_REGS]; + struct regulator_dev *rdev[PALMAS_NUM_REGS]; + struct mutex mutex; + + int smps123; + int smps457; + + int range[PALMAS_REG_SMPS10]; +}; + +/* defines so we can store the mux settings */ +#define PALMAS_GPIO_0_MUXED (1 << 0) +#define PALMAS_GPIO_1_MUXED (1 << 1) +#define PALMAS_GPIO_2_MUXED (1 << 2) +#define PALMAS_GPIO_3_MUXED (1 << 3) +#define PALMAS_GPIO_4_MUXED (1 << 4) +#define PALMAS_GPIO_5_MUXED (1 << 5) +#define PALMAS_GPIO_6_MUXED (1 << 6) +#define PALMAS_GPIO_7_MUXED (1 << 7) + +#define PALMAS_LED1_MUXED (1 << 0) +#define PALMAS_LED2_MUXED (1 << 1) + +#define PALMAS_PWM1_MUXED (1 << 0) +#define PALMAS_PWM2_MUXED (1 << 1) + +/* helper macro to get correct slave number */ +#define PALMAS_BASE_TO_SLAVE(x) ((x >> 8) - 1) +#define PALMAS_BASE_TO_REG(x, y) ((x & 0xff) + y) + +/* Base addresses of IP blocks in Palmas */ +#define PALMAS_SMPS_DVS_BASE 0x20 +#define PALMAS_RTC_BASE 0x100 +#define PALMAS_VALIDITY_BASE 0x118 +#define PALMAS_SMPS_BASE 0x120 +#define PALMAS_LDO_BASE 0x150 +#define PALMAS_DVFS_BASE 0x180 +#define PALMAS_PMU_CONTROL_BASE 0x1A0 +#define PALMAS_RESOURCE_BASE 0x1D4 +#define PALMAS_PU_PD_OD_BASE 0x1F4 +#define PALMAS_LED_BASE 0x200 +#define PALMAS_INTERRUPT_BASE 0x210 +#define PALMAS_USB_OTG_BASE 0x250 +#define PALMAS_VIBRATOR_BASE 0x270 +#define PALMAS_GPIO_BASE 0x280 +#define PALMAS_USB_BASE 0x290 +#define PALMAS_GPADC_BASE 0x2C0 +#define PALMAS_TRIM_GPADC_BASE 0x3CD + +/* Registers for function RTC */ +#define PALMAS_SECONDS_REG 0x0 +#define PALMAS_MINUTES_REG 0x1 +#define PALMAS_HOURS_REG 0x2 +#define PALMAS_DAYS_REG 0x3 +#define PALMAS_MONTHS_REG 0x4 +#define PALMAS_YEARS_REG 0x5 +#define PALMAS_WEEKS_REG 0x6 +#define PALMAS_ALARM_SECONDS_REG 0x8 +#define PALMAS_ALARM_MINUTES_REG 0x9 +#define PALMAS_ALARM_HOURS_REG 0xA +#define PALMAS_ALARM_DAYS_REG 0xB +#define PALMAS_ALARM_MONTHS_REG 0xC +#define PALMAS_ALARM_YEARS_REG 0xD +#define PALMAS_RTC_CTRL_REG 0x10 +#define PALMAS_RTC_STATUS_REG 0x11 +#define PALMAS_RTC_INTERRUPTS_REG 0x12 +#define PALMAS_RTC_COMP_LSB_REG 0x13 +#define PALMAS_RTC_COMP_MSB_REG 0x14 +#define PALMAS_RTC_RES_PROG_REG 0x15 +#define PALMAS_RTC_RESET_STATUS_REG 0x16 + +/* Bit definitions for SECONDS_REG */ +#define PALMAS_SECONDS_REG_SEC1_MASK 0x70 +#define PALMAS_SECONDS_REG_SEC1_SHIFT 4 +#define PALMAS_SECONDS_REG_SEC0_MASK 0x0f +#define PALMAS_SECONDS_REG_SEC0_SHIFT 0 + +/* Bit definitions for MINUTES_REG */ +#define PALMAS_MINUTES_REG_MIN1_MASK 0x70 +#define PALMAS_MINUTES_REG_MIN1_SHIFT 4 +#define PALMAS_MINUTES_REG_MIN0_MASK 0x0f +#define PALMAS_MINUTES_REG_MIN0_SHIFT 0 + +/* Bit definitions for HOURS_REG */ +#define PALMAS_HOURS_REG_PM_NAM 0x80 +#define PALMAS_HOURS_REG_PM_NAM_SHIFT 7 +#define PALMAS_HOURS_REG_HOUR1_MASK 0x30 +#define PALMAS_HOURS_REG_HOUR1_SHIFT 4 +#define PALMAS_HOURS_REG_HOUR0_MASK 0x0f +#define PALMAS_HOURS_REG_HOUR0_SHIFT 0 + +/* Bit definitions for DAYS_REG */ +#define PALMAS_DAYS_REG_DAY1_MASK 0x30 +#define PALMAS_DAYS_REG_DAY1_SHIFT 4 +#define PALMAS_DAYS_REG_DAY0_MASK 0x0f +#define PALMAS_DAYS_REG_DAY0_SHIFT 0 + +/* Bit definitions for MONTHS_REG */ +#define PALMAS_MONTHS_REG_MONTH1 0x10 +#define PALMAS_MONTHS_REG_MONTH1_SHIFT 4 +#define PALMAS_MONTHS_REG_MONTH0_MASK 0x0f +#define PALMAS_MONTHS_REG_MONTH0_SHIFT 0 + +/* Bit definitions for YEARS_REG */ +#define PALMAS_YEARS_REG_YEAR1_MASK 0xf0 +#define PALMAS_YEARS_REG_YEAR1_SHIFT 4 +#define PALMAS_YEARS_REG_YEAR0_MASK 0x0f +#define PALMAS_YEARS_REG_YEAR0_SHIFT 0 + +/* Bit definitions for WEEKS_REG */ +#define PALMAS_WEEKS_REG_WEEK_MASK 0x07 +#define PALMAS_WEEKS_REG_WEEK_SHIFT 0 + +/* Bit definitions for ALARM_SECONDS_REG */ +#define PALMAS_ALARM_SECONDS_REG_ALARM_SEC1_MASK 0x70 +#define PALMAS_ALARM_SECONDS_REG_ALARM_SEC1_SHIFT 4 +#define PALMAS_ALARM_SECONDS_REG_ALARM_SEC0_MASK 0x0f +#define PALMAS_ALARM_SECONDS_REG_ALARM_SEC0_SHIFT 0 + +/* Bit definitions for ALARM_MINUTES_REG */ +#define PALMAS_ALARM_MINUTES_REG_ALARM_MIN1_MASK 0x70 +#define PALMAS_ALARM_MINUTES_REG_ALARM_MIN1_SHIFT 4 +#define PALMAS_ALARM_MINUTES_REG_ALARM_MIN0_MASK 0x0f +#define PALMAS_ALARM_MINUTES_REG_ALARM_MIN0_SHIFT 0 + +/* Bit definitions for ALARM_HOURS_REG */ +#define PALMAS_ALARM_HOURS_REG_ALARM_PM_NAM 0x80 +#define PALMAS_ALARM_HOURS_REG_ALARM_PM_NAM_SHIFT 7 +#define PALMAS_ALARM_HOURS_REG_ALARM_HOUR1_MASK 0x30 +#define PALMAS_ALARM_HOURS_REG_ALARM_HOUR1_SHIFT 4 +#define PALMAS_ALARM_HOURS_REG_ALARM_HOUR0_MASK 0x0f +#define PALMAS_ALARM_HOURS_REG_ALARM_HOUR0_SHIFT 0 + +/* Bit definitions for ALARM_DAYS_REG */ +#define PALMAS_ALARM_DAYS_REG_ALARM_DAY1_MASK 0x30 +#define PALMAS_ALARM_DAYS_REG_ALARM_DAY1_SHIFT 4 +#define PALMAS_ALARM_DAYS_REG_ALARM_DAY0_MASK 0x0f +#define PALMAS_ALARM_DAYS_REG_ALARM_DAY0_SHIFT 0 + +/* Bit definitions for ALARM_MONTHS_REG */ +#define PALMAS_ALARM_MONTHS_REG_ALARM_MONTH1 0x10 +#define PALMAS_ALARM_MONTHS_REG_ALARM_MONTH1_SHIFT 4 +#define PALMAS_ALARM_MONTHS_REG_ALARM_MONTH0_MASK 0x0f +#define PALMAS_ALARM_MONTHS_REG_ALARM_MONTH0_SHIFT 0 + +/* Bit definitions for ALARM_YEARS_REG */ +#define PALMAS_ALARM_YEARS_REG_ALARM_YEAR1_MASK 0xf0 +#define PALMAS_ALARM_YEARS_REG_ALARM_YEAR1_SHIFT 4 +#define PALMAS_ALARM_YEARS_REG_ALARM_YEAR0_MASK 0x0f +#define PALMAS_ALARM_YEARS_REG_ALARM_YEAR0_SHIFT 0 + +/* Bit definitions for RTC_CTRL_REG */ +#define PALMAS_RTC_CTRL_REG_RTC_V_OPT 0x80 +#define PALMAS_RTC_CTRL_REG_RTC_V_OPT_SHIFT 7 +#define PALMAS_RTC_CTRL_REG_GET_TIME 0x40 +#define PALMAS_RTC_CTRL_REG_GET_TIME_SHIFT 6 +#define PALMAS_RTC_CTRL_REG_SET_32_COUNTER 0x20 +#define PALMAS_RTC_CTRL_REG_SET_32_COUNTER_SHIFT 5 +#define PALMAS_RTC_CTRL_REG_TEST_MODE 0x10 +#define PALMAS_RTC_CTRL_REG_TEST_MODE_SHIFT 4 +#define PALMAS_RTC_CTRL_REG_MODE_12_24 0x08 +#define PALMAS_RTC_CTRL_REG_MODE_12_24_SHIFT 3 +#define PALMAS_RTC_CTRL_REG_AUTO_COMP 0x04 +#define PALMAS_RTC_CTRL_REG_AUTO_COMP_SHIFT 2 +#define PALMAS_RTC_CTRL_REG_ROUND_30S 0x02 +#define PALMAS_RTC_CTRL_REG_ROUND_30S_SHIFT 1 +#define PALMAS_RTC_CTRL_REG_STOP_RTC 0x01 +#define PALMAS_RTC_CTRL_REG_STOP_RTC_SHIFT 0 + +/* Bit definitions for RTC_STATUS_REG */ +#define PALMAS_RTC_STATUS_REG_POWER_UP 0x80 +#define PALMAS_RTC_STATUS_REG_POWER_UP_SHIFT 7 +#define PALMAS_RTC_STATUS_REG_ALARM 0x40 +#define PALMAS_RTC_STATUS_REG_ALARM_SHIFT 6 +#define PALMAS_RTC_STATUS_REG_EVENT_1D 0x20 +#define PALMAS_RTC_STATUS_REG_EVENT_1D_SHIFT 5 +#define PALMAS_RTC_STATUS_REG_EVENT_1H 0x10 +#define PALMAS_RTC_STATUS_REG_EVENT_1H_SHIFT 4 +#define PALMAS_RTC_STATUS_REG_EVENT_1M 0x08 +#define PALMAS_RTC_STATUS_REG_EVENT_1M_SHIFT 3 +#define PALMAS_RTC_STATUS_REG_EVENT_1S 0x04 +#define PALMAS_RTC_STATUS_REG_EVENT_1S_SHIFT 2 +#define PALMAS_RTC_STATUS_REG_RUN 0x02 +#define PALMAS_RTC_STATUS_REG_RUN_SHIFT 1 + +/* Bit definitions for RTC_INTERRUPTS_REG */ +#define PALMAS_RTC_INTERRUPTS_REG_IT_SLEEP_MASK_EN 0x10 +#define PALMAS_RTC_INTERRUPTS_REG_IT_SLEEP_MASK_EN_SHIFT 4 +#define PALMAS_RTC_INTERRUPTS_REG_IT_ALARM 0x08 +#define PALMAS_RTC_INTERRUPTS_REG_IT_ALARM_SHIFT 3 +#define PALMAS_RTC_INTERRUPTS_REG_IT_TIMER 0x04 +#define PALMAS_RTC_INTERRUPTS_REG_IT_TIMER_SHIFT 2 +#define PALMAS_RTC_INTERRUPTS_REG_EVERY_MASK 0x03 +#define PALMAS_RTC_INTERRUPTS_REG_EVERY_SHIFT 0 + +/* Bit definitions for RTC_COMP_LSB_REG */ +#define PALMAS_RTC_COMP_LSB_REG_RTC_COMP_LSB_MASK 0xff +#define PALMAS_RTC_COMP_LSB_REG_RTC_COMP_LSB_SHIFT 0 + +/* Bit definitions for RTC_COMP_MSB_REG */ +#define PALMAS_RTC_COMP_MSB_REG_RTC_COMP_MSB_MASK 0xff +#define PALMAS_RTC_COMP_MSB_REG_RTC_COMP_MSB_SHIFT 0 + +/* Bit definitions for RTC_RES_PROG_REG */ +#define PALMAS_RTC_RES_PROG_REG_SW_RES_PROG_MASK 0x3f +#define PALMAS_RTC_RES_PROG_REG_SW_RES_PROG_SHIFT 0 + +/* Bit definitions for RTC_RESET_STATUS_REG */ +#define PALMAS_RTC_RESET_STATUS_REG_RESET_STATUS 0x01 +#define PALMAS_RTC_RESET_STATUS_REG_RESET_STATUS_SHIFT 0 + +/* Registers for function BACKUP */ +#define PALMAS_BACKUP0 0x0 +#define PALMAS_BACKUP1 0x1 +#define PALMAS_BACKUP2 0x2 +#define PALMAS_BACKUP3 0x3 +#define PALMAS_BACKUP4 0x4 +#define PALMAS_BACKUP5 0x5 +#define PALMAS_BACKUP6 0x6 +#define PALMAS_BACKUP7 0x7 + +/* Bit definitions for BACKUP0 */ +#define PALMAS_BACKUP0_BACKUP_MASK 0xff +#define PALMAS_BACKUP0_BACKUP_SHIFT 0 + +/* Bit definitions for BACKUP1 */ +#define PALMAS_BACKUP1_BACKUP_MASK 0xff +#define PALMAS_BACKUP1_BACKUP_SHIFT 0 + +/* Bit definitions for BACKUP2 */ +#define PALMAS_BACKUP2_BACKUP_MASK 0xff +#define PALMAS_BACKUP2_BACKUP_SHIFT 0 + +/* Bit definitions for BACKUP3 */ +#define PALMAS_BACKUP3_BACKUP_MASK 0xff +#define PALMAS_BACKUP3_BACKUP_SHIFT 0 + +/* Bit definitions for BACKUP4 */ +#define PALMAS_BACKUP4_BACKUP_MASK 0xff +#define PALMAS_BACKUP4_BACKUP_SHIFT 0 + +/* Bit definitions for BACKUP5 */ +#define PALMAS_BACKUP5_BACKUP_MASK 0xff +#define PALMAS_BACKUP5_BACKUP_SHIFT 0 + +/* Bit definitions for BACKUP6 */ +#define PALMAS_BACKUP6_BACKUP_MASK 0xff +#define PALMAS_BACKUP6_BACKUP_SHIFT 0 + +/* Bit definitions for BACKUP7 */ +#define PALMAS_BACKUP7_BACKUP_MASK 0xff +#define PALMAS_BACKUP7_BACKUP_SHIFT 0 + +/* Registers for function SMPS */ +#define PALMAS_SMPS12_CTRL 0x0 +#define PALMAS_SMPS12_TSTEP 0x1 +#define PALMAS_SMPS12_FORCE 0x2 +#define PALMAS_SMPS12_VOLTAGE 0x3 +#define PALMAS_SMPS3_CTRL 0x4 +#define PALMAS_SMPS3_VOLTAGE 0x7 +#define PALMAS_SMPS45_CTRL 0x8 +#define PALMAS_SMPS45_TSTEP 0x9 +#define PALMAS_SMPS45_FORCE 0xA +#define PALMAS_SMPS45_VOLTAGE 0xB +#define PALMAS_SMPS6_CTRL 0xC +#define PALMAS_SMPS6_TSTEP 0xD +#define PALMAS_SMPS6_FORCE 0xE +#define PALMAS_SMPS6_VOLTAGE 0xF +#define PALMAS_SMPS7_CTRL 0x10 +#define PALMAS_SMPS7_VOLTAGE 0x13 +#define PALMAS_SMPS8_CTRL 0x14 +#define PALMAS_SMPS8_TSTEP 0x15 +#define PALMAS_SMPS8_FORCE 0x16 +#define PALMAS_SMPS8_VOLTAGE 0x17 +#define PALMAS_SMPS9_CTRL 0x18 +#define PALMAS_SMPS9_VOLTAGE 0x1B +#define PALMAS_SMPS10_CTRL 0x1C +#define PALMAS_SMPS10_STATUS 0x1F +#define PALMAS_SMPS_CTRL 0x24 +#define PALMAS_SMPS_PD_CTRL 0x25 +#define PALMAS_SMPS_DITHER_EN 0x26 +#define PALMAS_SMPS_THERMAL_EN 0x27 +#define PALMAS_SMPS_THERMAL_STATUS 0x28 +#define PALMAS_SMPS_SHORT_STATUS 0x29 +#define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN 0x2A +#define PALMAS_SMPS_POWERGOOD_MASK1 0x2B +#define PALMAS_SMPS_POWERGOOD_MASK2 0x2C + +/* Bit definitions for SMPS12_CTRL */ +#define PALMAS_SMPS12_CTRL_WR_S 0x80 +#define PALMAS_SMPS12_CTRL_WR_S_SHIFT 7 +#define PALMAS_SMPS12_CTRL_ROOF_FLOOR_EN 0x40 +#define PALMAS_SMPS12_CTRL_ROOF_FLOOR_EN_SHIFT 6 +#define PALMAS_SMPS12_CTRL_STATUS_MASK 0x30 +#define PALMAS_SMPS12_CTRL_STATUS_SHIFT 4 +#define PALMAS_SMPS12_CTRL_MODE_SLEEP_MASK 0x0c +#define PALMAS_SMPS12_CTRL_MODE_SLEEP_SHIFT 2 +#define PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK 0x03 +#define PALMAS_SMPS12_CTRL_MODE_ACTIVE_SHIFT 0 + +/* Bit definitions for SMPS12_TSTEP */ +#define PALMAS_SMPS12_TSTEP_TSTEP_MASK 0x03 +#define PALMAS_SMPS12_TSTEP_TSTEP_SHIFT 0 + +/* Bit definitions for SMPS12_FORCE */ +#define PALMAS_SMPS12_FORCE_CMD 0x80 +#define PALMAS_SMPS12_FORCE_CMD_SHIFT 7 +#define PALMAS_SMPS12_FORCE_VSEL_MASK 0x7f +#define PALMAS_SMPS12_FORCE_VSEL_SHIFT 0 + +/* Bit definitions for SMPS12_VOLTAGE */ +#define PALMAS_SMPS12_VOLTAGE_RANGE 0x80 +#define PALMAS_SMPS12_VOLTAGE_RANGE_SHIFT 7 +#define PALMAS_SMPS12_VOLTAGE_VSEL_MASK 0x7f +#define PALMAS_SMPS12_VOLTAGE_VSEL_SHIFT 0 + +/* Bit definitions for SMPS3_CTRL */ +#define PALMAS_SMPS3_CTRL_WR_S 0x80 +#define PALMAS_SMPS3_CTRL_WR_S_SHIFT 7 +#define PALMAS_SMPS3_CTRL_STATUS_MASK 0x30 +#define PALMAS_SMPS3_CTRL_STATUS_SHIFT 4 +#define PALMAS_SMPS3_CTRL_MODE_SLEEP_MASK 0x0c +#define PALMAS_SMPS3_CTRL_MODE_SLEEP_SHIFT 2 +#define PALMAS_SMPS3_CTRL_MODE_ACTIVE_MASK 0x03 +#define PALMAS_SMPS3_CTRL_MODE_ACTIVE_SHIFT 0 + +/* Bit definitions for SMPS3_VOLTAGE */ +#define PALMAS_SMPS3_VOLTAGE_RANGE 0x80 +#define PALMAS_SMPS3_VOLTAGE_RANGE_SHIFT 7 +#define PALMAS_SMPS3_VOLTAGE_VSEL_MASK 0x7f +#define PALMAS_SMPS3_VOLTAGE_VSEL_SHIFT 0 + +/* Bit definitions for SMPS45_CTRL */ +#define PALMAS_SMPS45_CTRL_WR_S 0x80 +#define PALMAS_SMPS45_CTRL_WR_S_SHIFT 7 +#define PALMAS_SMPS45_CTRL_ROOF_FLOOR_EN 0x40 +#define PALMAS_SMPS45_CTRL_ROOF_FLOOR_EN_SHIFT 6 +#define PALMAS_SMPS45_CTRL_STATUS_MASK 0x30 +#define PALMAS_SMPS45_CTRL_STATUS_SHIFT 4 +#define PALMAS_SMPS45_CTRL_MODE_SLEEP_MASK 0x0c +#define PALMAS_SMPS45_CTRL_MODE_SLEEP_SHIFT 2 +#define PALMAS_SMPS45_CTRL_MODE_ACTIVE_MASK 0x03 +#define PALMAS_SMPS45_CTRL_MODE_ACTIVE_SHIFT 0 + +/* Bit definitions for SMPS45_TSTEP */ +#define PALMAS_SMPS45_TSTEP_TSTEP_MASK 0x03 +#define PALMAS_SMPS45_TSTEP_TSTEP_SHIFT 0 + +/* Bit definitions for SMPS45_FORCE */ +#define PALMAS_SMPS45_FORCE_CMD 0x80 +#define PALMAS_SMPS45_FORCE_CMD_SHIFT 7 +#define PALMAS_SMPS45_FORCE_VSEL_MASK 0x7f +#define PALMAS_SMPS45_FORCE_VSEL_SHIFT 0 + +/* Bit definitions for SMPS45_VOLTAGE */ +#define PALMAS_SMPS45_VOLTAGE_RANGE 0x80 +#define PALMAS_SMPS45_VOLTAGE_RANGE_SHIFT 7 +#define PALMAS_SMPS45_VOLTAGE_VSEL_MASK 0x7f +#define PALMAS_SMPS45_VOLTAGE_VSEL_SHIFT 0 + +/* Bit definitions for SMPS6_CTRL */ +#define PALMAS_SMPS6_CTRL_WR_S 0x80 +#define PALMAS_SMPS6_CTRL_WR_S_SHIFT 7 +#define PALMAS_SMPS6_CTRL_ROOF_FLOOR_EN 0x40 +#define PALMAS_SMPS6_CTRL_ROOF_FLOOR_EN_SHIFT 6 +#define PALMAS_SMPS6_CTRL_STATUS_MASK 0x30 +#define PALMAS_SMPS6_CTRL_STATUS_SHIFT 4 +#define PALMAS_SMPS6_CTRL_MODE_SLEEP_MASK 0x0c +#define PALMAS_SMPS6_CTRL_MODE_SLEEP_SHIFT 2 +#define PALMAS_SMPS6_CTRL_MODE_ACTIVE_MASK 0x03 +#define PALMAS_SMPS6_CTRL_MODE_ACTIVE_SHIFT 0 + +/* Bit definitions for SMPS6_TSTEP */ +#define PALMAS_SMPS6_TSTEP_TSTEP_MASK 0x03 +#define PALMAS_SMPS6_TSTEP_TSTEP_SHIFT 0 + +/* Bit definitions for SMPS6_FORCE */ +#define PALMAS_SMPS6_FORCE_CMD 0x80 +#define PALMAS_SMPS6_FORCE_CMD_SHIFT 7 +#define PALMAS_SMPS6_FORCE_VSEL_MASK 0x7f +#define PALMAS_SMPS6_FORCE_VSEL_SHIFT 0 + +/* Bit definitions for SMPS6_VOLTAGE */ +#define PALMAS_SMPS6_VOLTAGE_RANGE 0x80 +#define PALMAS_SMPS6_VOLTAGE_RANGE_SHIFT 7 +#define PALMAS_SMPS6_VOLTAGE_VSEL_MASK 0x7f +#define PALMAS_SMPS6_VOLTAGE_VSEL_SHIFT 0 + +/* Bit definitions for SMPS7_CTRL */ +#define PALMAS_SMPS7_CTRL_WR_S 0x80 +#define PALMAS_SMPS7_CTRL_WR_S_SHIFT 7 +#define PALMAS_SMPS7_CTRL_STATUS_MASK 0x30 +#define PALMAS_SMPS7_CTRL_STATUS_SHIFT 4 +#define PALMAS_SMPS7_CTRL_MODE_SLEEP_MASK 0x0c +#define PALMAS_SMPS7_CTRL_MODE_SLEEP_SHIFT 2 +#define PALMAS_SMPS7_CTRL_MODE_ACTIVE_MASK 0x03 +#define PALMAS_SMPS7_CTRL_MODE_ACTIVE_SHIFT 0 + +/* Bit definitions for SMPS7_VOLTAGE */ +#define PALMAS_SMPS7_VOLTAGE_RANGE 0x80 +#define PALMAS_SMPS7_VOLTAGE_RANGE_SHIFT 7 +#define PALMAS_SMPS7_VOLTAGE_VSEL_MASK 0x7f +#define PALMAS_SMPS7_VOLTAGE_VSEL_SHIFT 0 + +/* Bit definitions for SMPS8_CTRL */ +#define PALMAS_SMPS8_CTRL_WR_S 0x80 +#define PALMAS_SMPS8_CTRL_WR_S_SHIFT 7 +#define PALMAS_SMPS8_CTRL_ROOF_FLOOR_EN 0x40 +#define PALMAS_SMPS8_CTRL_ROOF_FLOOR_EN_SHIFT 6 +#define PALMAS_SMPS8_CTRL_STATUS_MASK 0x30 +#define PALMAS_SMPS8_CTRL_STATUS_SHIFT 4 +#define PALMAS_SMPS8_CTRL_MODE_SLEEP_MASK 0x0c +#define PALMAS_SMPS8_CTRL_MODE_SLEEP_SHIFT 2 +#define PALMAS_SMPS8_CTRL_MODE_ACTIVE_MASK 0x03 +#define PALMAS_SMPS8_CTRL_MODE_ACTIVE_SHIFT 0 + +/* Bit definitions for SMPS8_TSTEP */ +#define PALMAS_SMPS8_TSTEP_TSTEP_MASK 0x03 +#define PALMAS_SMPS8_TSTEP_TSTEP_SHIFT 0 + +/* Bit definitions for SMPS8_FORCE */ +#define PALMAS_SMPS8_FORCE_CMD 0x80 +#define PALMAS_SMPS8_FORCE_CMD_SHIFT 7 +#define PALMAS_SMPS8_FORCE_VSEL_MASK 0x7f +#define PALMAS_SMPS8_FORCE_VSEL_SHIFT 0 + +/* Bit definitions for SMPS8_VOLTAGE */ +#define PALMAS_SMPS8_VOLTAGE_RANGE 0x80 +#define PALMAS_SMPS8_VOLTAGE_RANGE_SHIFT 7 +#define PALMAS_SMPS8_VOLTAGE_VSEL_MASK 0x7f +#define PALMAS_SMPS8_VOLTAGE_VSEL_SHIFT 0 + +/* Bit definitions for SMPS9_CTRL */ +#define PALMAS_SMPS9_CTRL_WR_S 0x80 +#define PALMAS_SMPS9_CTRL_WR_S_SHIFT 7 +#define PALMAS_SMPS9_CTRL_STATUS_MASK 0x30 +#define PALMAS_SMPS9_CTRL_STATUS_SHIFT 4 +#define PALMAS_SMPS9_CTRL_MODE_SLEEP_MASK 0x0c +#define PALMAS_SMPS9_CTRL_MODE_SLEEP_SHIFT 2 +#define PALMAS_SMPS9_CTRL_MODE_ACTIVE_MASK 0x03 +#define PALMAS_SMPS9_CTRL_MODE_ACTIVE_SHIFT 0 + +/* Bit definitions for SMPS9_VOLTAGE */ +#define PALMAS_SMPS9_VOLTAGE_RANGE 0x80 +#define PALMAS_SMPS9_VOLTAGE_RANGE_SHIFT 7 +#define PALMAS_SMPS9_VOLTAGE_VSEL_MASK 0x7f +#define PALMAS_SMPS9_VOLTAGE_VSEL_SHIFT 0 + +/* Bit definitions for SMPS10_CTRL */ +#define PALMAS_SMPS10_CTRL_MODE_SLEEP_MASK 0xf0 +#define PALMAS_SMPS10_CTRL_MODE_SLEEP_SHIFT 4 +#define PALMAS_SMPS10_CTRL_MODE_ACTIVE_MASK 0x0f +#define PALMAS_SMPS10_CTRL_MODE_ACTIVE_SHIFT 0 + +/* Bit definitions for SMPS10_STATUS */ +#define PALMAS_SMPS10_STATUS_STATUS_MASK 0x0f +#define PALMAS_SMPS10_STATUS_STATUS_SHIFT 0 + +/* Bit definitions for SMPS_CTRL */ +#define PALMAS_SMPS_CTRL_SMPS45_SMPS457_EN 0x20 +#define PALMAS_SMPS_CTRL_SMPS45_SMPS457_EN_SHIFT 5 +#define PALMAS_SMPS_CTRL_SMPS12_SMPS123_EN 0x10 +#define PALMAS_SMPS_CTRL_SMPS12_SMPS123_EN_SHIFT 4 +#define PALMAS_SMPS_CTRL_SMPS45_PHASE_CTRL_MASK 0x0c +#define PALMAS_SMPS_CTRL_SMPS45_PHASE_CTRL_SHIFT 2 +#define PALMAS_SMPS_CTRL_SMPS123_PHASE_CTRL_MASK 0x03 +#define PALMAS_SMPS_CTRL_SMPS123_PHASE_CTRL_SHIFT 0 + +/* Bit definitions for SMPS_PD_CTRL */ +#define PALMAS_SMPS_PD_CTRL_SMPS9 0x40 +#define PALMAS_SMPS_PD_CTRL_SMPS9_SHIFT 6 +#define PALMAS_SMPS_PD_CTRL_SMPS8 0x20 +#define PALMAS_SMPS_PD_CTRL_SMPS8_SHIFT 5 +#define PALMAS_SMPS_PD_CTRL_SMPS7 0x10 +#define PALMAS_SMPS_PD_CTRL_SMPS7_SHIFT 4 +#define PALMAS_SMPS_PD_CTRL_SMPS6 0x08 +#define PALMAS_SMPS_PD_CTRL_SMPS6_SHIFT 3 +#define PALMAS_SMPS_PD_CTRL_SMPS45 0x04 +#define PALMAS_SMPS_PD_CTRL_SMPS45_SHIFT 2 +#define PALMAS_SMPS_PD_CTRL_SMPS3 0x02 +#define PALMAS_SMPS_PD_CTRL_SMPS3_SHIFT 1 +#define PALMAS_SMPS_PD_CTRL_SMPS12 0x01 +#define PALMAS_SMPS_PD_CTRL_SMPS12_SHIFT 0 + +/* Bit definitions for SMPS_THERMAL_EN */ +#define PALMAS_SMPS_THERMAL_EN_SMPS9 0x40 +#define PALMAS_SMPS_THERMAL_EN_SMPS9_SHIFT 6 +#define PALMAS_SMPS_THERMAL_EN_SMPS8 0x20 +#define PALMAS_SMPS_THERMAL_EN_SMPS8_SHIFT 5 +#define PALMAS_SMPS_THERMAL_EN_SMPS6 0x08 +#define PALMAS_SMPS_THERMAL_EN_SMPS6_SHIFT 3 +#define PALMAS_SMPS_THERMAL_EN_SMPS457 0x04 +#define PALMAS_SMPS_THERMAL_EN_SMPS457_SHIFT 2 +#define PALMAS_SMPS_THERMAL_EN_SMPS123 0x01 +#define PALMAS_SMPS_THERMAL_EN_SMPS123_SHIFT 0 + +/* Bit definitions for SMPS_THERMAL_STATUS */ +#define PALMAS_SMPS_THERMAL_STATUS_SMPS9 0x40 +#define PALMAS_SMPS_THERMAL_STATUS_SMPS9_SHIFT 6 +#define PALMAS_SMPS_THERMAL_STATUS_SMPS8 0x20 +#define PALMAS_SMPS_THERMAL_STATUS_SMPS8_SHIFT 5 +#define PALMAS_SMPS_THERMAL_STATUS_SMPS6 0x08 +#define PALMAS_SMPS_THERMAL_STATUS_SMPS6_SHIFT 3 +#define PALMAS_SMPS_THERMAL_STATUS_SMPS457 0x04 +#define PALMAS_SMPS_THERMAL_STATUS_SMPS457_SHIFT 2 +#define PALMAS_SMPS_THERMAL_STATUS_SMPS123 0x01 +#define PALMAS_SMPS_THERMAL_STATUS_SMPS123_SHIFT 0 + +/* Bit definitions for SMPS_SHORT_STATUS */ +#define PALMAS_SMPS_SHORT_STATUS_SMPS10 0x80 +#define PALMAS_SMPS_SHORT_STATUS_SMPS10_SHIFT 7 +#define PALMAS_SMPS_SHORT_STATUS_SMPS9 0x40 +#define PALMAS_SMPS_SHORT_STATUS_SMPS9_SHIFT 6 +#define PALMAS_SMPS_SHORT_STATUS_SMPS8 0x20 +#define PALMAS_SMPS_SHORT_STATUS_SMPS8_SHIFT 5 +#define PALMAS_SMPS_SHORT_STATUS_SMPS7 0x10 +#define PALMAS_SMPS_SHORT_STATUS_SMPS7_SHIFT 4 +#define PALMAS_SMPS_SHORT_STATUS_SMPS6 0x08 +#define PALMAS_SMPS_SHORT_STATUS_SMPS6_SHIFT 3 +#define PALMAS_SMPS_SHORT_STATUS_SMPS45 0x04 +#define PALMAS_SMPS_SHORT_STATUS_SMPS45_SHIFT 2 +#define PALMAS_SMPS_SHORT_STATUS_SMPS3 0x02 +#define PALMAS_SMPS_SHORT_STATUS_SMPS3_SHIFT 1 +#define PALMAS_SMPS_SHORT_STATUS_SMPS12 0x01 +#define PALMAS_SMPS_SHORT_STATUS_SMPS12_SHIFT 0 + +/* Bit definitions for SMPS_NEGATIVE_CURRENT_LIMIT_EN */ +#define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS9 0x40 +#define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS9_SHIFT 6 +#define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS8 0x20 +#define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS8_SHIFT 5 +#define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS7 0x10 +#define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS7_SHIFT 4 +#define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS6 0x08 +#define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS6_SHIFT 3 +#define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS45 0x04 +#define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS45_SHIFT 2 +#define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS3 0x02 +#define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS3_SHIFT 1 +#define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS12 0x01 +#define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS12_SHIFT 0 + +/* Bit definitions for SMPS_POWERGOOD_MASK1 */ +#define PALMAS_SMPS_POWERGOOD_MASK1_SMPS10 0x80 +#define PALMAS_SMPS_POWERGOOD_MASK1_SMPS10_SHIFT 7 +#define PALMAS_SMPS_POWERGOOD_MASK1_SMPS9 0x40 +#define PALMAS_SMPS_POWERGOOD_MASK1_SMPS9_SHIFT 6 +#define PALMAS_SMPS_POWERGOOD_MASK1_SMPS8 0x20 +#define PALMAS_SMPS_POWERGOOD_MASK1_SMPS8_SHIFT 5 +#define PALMAS_SMPS_POWERGOOD_MASK1_SMPS7 0x10 +#define PALMAS_SMPS_POWERGOOD_MASK1_SMPS7_SHIFT 4 +#define PALMAS_SMPS_POWERGOOD_MASK1_SMPS6 0x08 +#define PALMAS_SMPS_POWERGOOD_MASK1_SMPS6_SHIFT 3 +#define PALMAS_SMPS_POWERGOOD_MASK1_SMPS45 0x04 +#define PALMAS_SMPS_POWERGOOD_MASK1_SMPS45_SHIFT 2 +#define PALMAS_SMPS_POWERGOOD_MASK1_SMPS3 0x02 +#define PALMAS_SMPS_POWERGOOD_MASK1_SMPS3_SHIFT 1 +#define PALMAS_SMPS_POWERGOOD_MASK1_SMPS12 0x01 +#define PALMAS_SMPS_POWERGOOD_MASK1_SMPS12_SHIFT 0 + +/* Bit definitions for SMPS_POWERGOOD_MASK2 */ +#define PALMAS_SMPS_POWERGOOD_MASK2_POWERGOOD_TYPE_SELECT 0x80 +#define PALMAS_SMPS_POWERGOOD_MASK2_POWERGOOD_TYPE_SELECT_SHIFT 7 +#define PALMAS_SMPS_POWERGOOD_MASK2_GPIO_7 0x04 +#define PALMAS_SMPS_POWERGOOD_MASK2_GPIO_7_SHIFT 2 +#define PALMAS_SMPS_POWERGOOD_MASK2_VBUS 0x02 +#define PALMAS_SMPS_POWERGOOD_MASK2_VBUS_SHIFT 1 +#define PALMAS_SMPS_POWERGOOD_MASK2_ACOK 0x01 +#define PALMAS_SMPS_POWERGOOD_MASK2_ACOK_SHIFT 0 + +/* Registers for function LDO */ +#define PALMAS_LDO1_CTRL 0x0 +#define PALMAS_LDO1_VOLTAGE 0x1 +#define PALMAS_LDO2_CTRL 0x2 +#define PALMAS_LDO2_VOLTAGE 0x3 +#define PALMAS_LDO3_CTRL 0x4 +#define PALMAS_LDO3_VOLTAGE 0x5 +#define PALMAS_LDO4_CTRL 0x6 +#define PALMAS_LDO4_VOLTAGE 0x7 +#define PALMAS_LDO5_CTRL 0x8 +#define PALMAS_LDO5_VOLTAGE 0x9 +#define PALMAS_LDO6_CTRL 0xA +#define PALMAS_LDO6_VOLTAGE 0xB +#define PALMAS_LDO7_CTRL 0xC +#define PALMAS_LDO7_VOLTAGE 0xD +#define PALMAS_LDO8_CTRL 0xE +#define PALMAS_LDO8_VOLTAGE 0xF +#define PALMAS_LDO9_CTRL 0x10 +#define PALMAS_LDO9_VOLTAGE 0x11 +#define PALMAS_LDOLN_CTRL 0x12 +#define PALMAS_LDOLN_VOLTAGE 0x13 +#define PALMAS_LDOUSB_CTRL 0x14 +#define PALMAS_LDOUSB_VOLTAGE 0x15 +#define PALMAS_LDO_CTRL 0x1A +#define PALMAS_LDO_PD_CTRL1 0x1B +#define PALMAS_LDO_PD_CTRL2 0x1C +#define PALMAS_LDO_SHORT_STATUS1 0x1D +#define PALMAS_LDO_SHORT_STATUS2 0x1E + +/* Bit definitions for LDO1_CTRL */ +#define PALMAS_LDO1_CTRL_WR_S 0x80 +#define PALMAS_LDO1_CTRL_WR_S_SHIFT 7 +#define PALMAS_LDO1_CTRL_STATUS 0x10 +#define PALMAS_LDO1_CTRL_STATUS_SHIFT 4 +#define PALMAS_LDO1_CTRL_MODE_SLEEP 0x04 +#define PALMAS_LDO1_CTRL_MODE_SLEEP_SHIFT 2 +#define PALMAS_LDO1_CTRL_MODE_ACTIVE 0x01 +#define PALMAS_LDO1_CTRL_MODE_ACTIVE_SHIFT 0 + +/* Bit definitions for LDO1_VOLTAGE */ +#define PALMAS_LDO1_VOLTAGE_VSEL_MASK 0x3f +#define PALMAS_LDO1_VOLTAGE_VSEL_SHIFT 0 + +/* Bit definitions for LDO2_CTRL */ +#define PALMAS_LDO2_CTRL_WR_S 0x80 +#define PALMAS_LDO2_CTRL_WR_S_SHIFT 7 +#define PALMAS_LDO2_CTRL_STATUS 0x10 +#define PALMAS_LDO2_CTRL_STATUS_SHIFT 4 +#define PALMAS_LDO2_CTRL_MODE_SLEEP 0x04 +#define PALMAS_LDO2_CTRL_MODE_SLEEP_SHIFT 2 +#define PALMAS_LDO2_CTRL_MODE_ACTIVE 0x01 +#define PALMAS_LDO2_CTRL_MODE_ACTIVE_SHIFT 0 + +/* Bit definitions for LDO2_VOLTAGE */ +#define PALMAS_LDO2_VOLTAGE_VSEL_MASK 0x3f +#define PALMAS_LDO2_VOLTAGE_VSEL_SHIFT 0 + +/* Bit definitions for LDO3_CTRL */ +#define PALMAS_LDO3_CTRL_WR_S 0x80 +#define PALMAS_LDO3_CTRL_WR_S_SHIFT 7 +#define PALMAS_LDO3_CTRL_STATUS 0x10 +#define PALMAS_LDO3_CTRL_STATUS_SHIFT 4 +#define PALMAS_LDO3_CTRL_MODE_SLEEP 0x04 +#define PALMAS_LDO3_CTRL_MODE_SLEEP_SHIFT 2 +#define PALMAS_LDO3_CTRL_MODE_ACTIVE 0x01 +#define PALMAS_LDO3_CTRL_MODE_ACTIVE_SHIFT 0 + +/* Bit definitions for LDO3_VOLTAGE */ +#define PALMAS_LDO3_VOLTAGE_VSEL_MASK 0x3f +#define PALMAS_LDO3_VOLTAGE_VSEL_SHIFT 0 + +/* Bit definitions for LDO4_CTRL */ +#define PALMAS_LDO4_CTRL_WR_S 0x80 +#define PALMAS_LDO4_CTRL_WR_S_SHIFT 7 +#define PALMAS_LDO4_CTRL_STATUS 0x10 +#define PALMAS_LDO4_CTRL_STATUS_SHIFT 4 +#define PALMAS_LDO4_CTRL_MODE_SLEEP 0x04 +#define PALMAS_LDO4_CTRL_MODE_SLEEP_SHIFT 2 +#define PALMAS_LDO4_CTRL_MODE_ACTIVE 0x01 +#define PALMAS_LDO4_CTRL_MODE_ACTIVE_SHIFT 0 + +/* Bit definitions for LDO4_VOLTAGE */ +#define PALMAS_LDO4_VOLTAGE_VSEL_MASK 0x3f +#define PALMAS_LDO4_VOLTAGE_VSEL_SHIFT 0 + +/* Bit definitions for LDO5_CTRL */ +#define PALMAS_LDO5_CTRL_WR_S 0x80 +#define PALMAS_LDO5_CTRL_WR_S_SHIFT 7 +#define PALMAS_LDO5_CTRL_STATUS 0x10 +#define PALMAS_LDO5_CTRL_STATUS_SHIFT 4 +#define PALMAS_LDO5_CTRL_MODE_SLEEP 0x04 +#define PALMAS_LDO5_CTRL_MODE_SLEEP_SHIFT 2 +#define PALMAS_LDO5_CTRL_MODE_ACTIVE 0x01 +#define PALMAS_LDO5_CTRL_MODE_ACTIVE_SHIFT 0 + +/* Bit definitions for LDO5_VOLTAGE */ +#define PALMAS_LDO5_VOLTAGE_VSEL_MASK 0x3f +#define PALMAS_LDO5_VOLTAGE_VSEL_SHIFT 0 + +/* Bit definitions for LDO6_CTRL */ +#define PALMAS_LDO6_CTRL_WR_S 0x80 +#define PALMAS_LDO6_CTRL_WR_S_SHIFT 7 +#define PALMAS_LDO6_CTRL_LDO_VIB_EN 0x40 +#define PALMAS_LDO6_CTRL_LDO_VIB_EN_SHIFT 6 +#define PALMAS_LDO6_CTRL_STATUS 0x10 +#define PALMAS_LDO6_CTRL_STATUS_SHIFT 4 +#define PALMAS_LDO6_CTRL_MODE_SLEEP 0x04 +#define PALMAS_LDO6_CTRL_MODE_SLEEP_SHIFT 2 +#define PALMAS_LDO6_CTRL_MODE_ACTIVE 0x01 +#define PALMAS_LDO6_CTRL_MODE_ACTIVE_SHIFT 0 + +/* Bit definitions for LDO6_VOLTAGE */ +#define PALMAS_LDO6_VOLTAGE_VSEL_MASK 0x3f +#define PALMAS_LDO6_VOLTAGE_VSEL_SHIFT 0 + +/* Bit definitions for LDO7_CTRL */ +#define PALMAS_LDO7_CTRL_WR_S 0x80 +#define PALMAS_LDO7_CTRL_WR_S_SHIFT 7 +#define PALMAS_LDO7_CTRL_STATUS 0x10 +#define PALMAS_LDO7_CTRL_STATUS_SHIFT 4 +#define PALMAS_LDO7_CTRL_MODE_SLEEP 0x04 +#define PALMAS_LDO7_CTRL_MODE_SLEEP_SHIFT 2 +#define PALMAS_LDO7_CTRL_MODE_ACTIVE 0x01 +#define PALMAS_LDO7_CTRL_MODE_ACTIVE_SHIFT 0 + +/* Bit definitions for LDO7_VOLTAGE */ +#define PALMAS_LDO7_VOLTAGE_VSEL_MASK 0x3f +#define PALMAS_LDO7_VOLTAGE_VSEL_SHIFT 0 + +/* Bit definitions for LDO8_CTRL */ +#define PALMAS_LDO8_CTRL_WR_S 0x80 +#define PALMAS_LDO8_CTRL_WR_S_SHIFT 7 +#define PALMAS_LDO8_CTRL_LDO_TRACKING_EN 0x40 +#define PALMAS_LDO8_CTRL_LDO_TRACKING_EN_SHIFT 6 +#define PALMAS_LDO8_CTRL_STATUS 0x10 +#define PALMAS_LDO8_CTRL_STATUS_SHIFT 4 +#define PALMAS_LDO8_CTRL_MODE_SLEEP 0x04 +#define PALMAS_LDO8_CTRL_MODE_SLEEP_SHIFT 2 +#define PALMAS_LDO8_CTRL_MODE_ACTIVE 0x01 +#define PALMAS_LDO8_CTRL_MODE_ACTIVE_SHIFT 0 + +/* Bit definitions for LDO8_VOLTAGE */ +#define PALMAS_LDO8_VOLTAGE_VSEL_MASK 0x3f +#define PALMAS_LDO8_VOLTAGE_VSEL_SHIFT 0 + +/* Bit definitions for LDO9_CTRL */ +#define PALMAS_LDO9_CTRL_WR_S 0x80 +#define PALMAS_LDO9_CTRL_WR_S_SHIFT 7 +#define PALMAS_LDO9_CTRL_LDO_BYPASS_EN 0x40 +#define PALMAS_LDO9_CTRL_LDO_BYPASS_EN_SHIFT 6 +#define PALMAS_LDO9_CTRL_STATUS 0x10 +#define PALMAS_LDO9_CTRL_STATUS_SHIFT 4 +#define PALMAS_LDO9_CTRL_MODE_SLEEP 0x04 +#define PALMAS_LDO9_CTRL_MODE_SLEEP_SHIFT 2 +#define PALMAS_LDO9_CTRL_MODE_ACTIVE 0x01 +#define PALMAS_LDO9_CTRL_MODE_ACTIVE_SHIFT 0 + +/* Bit definitions for LDO9_VOLTAGE */ +#define PALMAS_LDO9_VOLTAGE_VSEL_MASK 0x3f +#define PALMAS_LDO9_VOLTAGE_VSEL_SHIFT 0 + +/* Bit definitions for LDOLN_CTRL */ +#define PALMAS_LDOLN_CTRL_WR_S 0x80 +#define PALMAS_LDOLN_CTRL_WR_S_SHIFT 7 +#define PALMAS_LDOLN_CTRL_STATUS 0x10 +#define PALMAS_LDOLN_CTRL_STATUS_SHIFT 4 +#define PALMAS_LDOLN_CTRL_MODE_SLEEP 0x04 +#define PALMAS_LDOLN_CTRL_MODE_SLEEP_SHIFT 2 +#define PALMAS_LDOLN_CTRL_MODE_ACTIVE 0x01 +#define PALMAS_LDOLN_CTRL_MODE_ACTIVE_SHIFT 0 + +/* Bit definitions for LDOLN_VOLTAGE */ +#define PALMAS_LDOLN_VOLTAGE_VSEL_MASK 0x3f +#define PALMAS_LDOLN_VOLTAGE_VSEL_SHIFT 0 + +/* Bit definitions for LDOUSB_CTRL */ +#define PALMAS_LDOUSB_CTRL_WR_S 0x80 +#define PALMAS_LDOUSB_CTRL_WR_S_SHIFT 7 +#define PALMAS_LDOUSB_CTRL_STATUS 0x10 +#define PALMAS_LDOUSB_CTRL_STATUS_SHIFT 4 +#define PALMAS_LDOUSB_CTRL_MODE_SLEEP 0x04 +#define PALMAS_LDOUSB_CTRL_MODE_SLEEP_SHIFT 2 +#define PALMAS_LDOUSB_CTRL_MODE_ACTIVE 0x01 +#define PALMAS_LDOUSB_CTRL_MODE_ACTIVE_SHIFT 0 + +/* Bit definitions for LDOUSB_VOLTAGE */ +#define PALMAS_LDOUSB_VOLTAGE_VSEL_MASK 0x3f +#define PALMAS_LDOUSB_VOLTAGE_VSEL_SHIFT 0 + +/* Bit definitions for LDO_CTRL */ +#define PALMAS_LDO_CTRL_LDOUSB_ON_VBUS_VSYS 0x01 +#define PALMAS_LDO_CTRL_LDOUSB_ON_VBUS_VSYS_SHIFT 0 + +/* Bit definitions for LDO_PD_CTRL1 */ +#define PALMAS_LDO_PD_CTRL1_LDO8 0x80 +#define PALMAS_LDO_PD_CTRL1_LDO8_SHIFT 7 +#define PALMAS_LDO_PD_CTRL1_LDO7 0x40 +#define PALMAS_LDO_PD_CTRL1_LDO7_SHIFT 6 +#define PALMAS_LDO_PD_CTRL1_LDO6 0x20 +#define PALMAS_LDO_PD_CTRL1_LDO6_SHIFT 5 +#define PALMAS_LDO_PD_CTRL1_LDO5 0x10 +#define PALMAS_LDO_PD_CTRL1_LDO5_SHIFT 4 +#define PALMAS_LDO_PD_CTRL1_LDO4 0x08 +#define PALMAS_LDO_PD_CTRL1_LDO4_SHIFT 3 +#define PALMAS_LDO_PD_CTRL1_LDO3 0x04 +#define PALMAS_LDO_PD_CTRL1_LDO3_SHIFT 2 +#define PALMAS_LDO_PD_CTRL1_LDO2 0x02 +#define PALMAS_LDO_PD_CTRL1_LDO2_SHIFT 1 +#define PALMAS_LDO_PD_CTRL1_LDO1 0x01 +#define PALMAS_LDO_PD_CTRL1_LDO1_SHIFT 0 + +/* Bit definitions for LDO_PD_CTRL2 */ +#define PALMAS_LDO_PD_CTRL2_LDOUSB 0x04 +#define PALMAS_LDO_PD_CTRL2_LDOUSB_SHIFT 2 +#define PALMAS_LDO_PD_CTRL2_LDOLN 0x02 +#define PALMAS_LDO_PD_CTRL2_LDOLN_SHIFT 1 +#define PALMAS_LDO_PD_CTRL2_LDO9 0x01 +#define PALMAS_LDO_PD_CTRL2_LDO9_SHIFT 0 + +/* Bit definitions for LDO_SHORT_STATUS1 */ +#define PALMAS_LDO_SHORT_STATUS1_LDO8 0x80 +#define PALMAS_LDO_SHORT_STATUS1_LDO8_SHIFT 7 +#define PALMAS_LDO_SHORT_STATUS1_LDO7 0x40 +#define PALMAS_LDO_SHORT_STATUS1_LDO7_SHIFT 6 +#define PALMAS_LDO_SHORT_STATUS1_LDO6 0x20 +#define PALMAS_LDO_SHORT_STATUS1_LDO6_SHIFT 5 +#define PALMAS_LDO_SHORT_STATUS1_LDO5 0x10 +#define PALMAS_LDO_SHORT_STATUS1_LDO5_SHIFT 4 +#define PALMAS_LDO_SHORT_STATUS1_LDO4 0x08 +#define PALMAS_LDO_SHORT_STATUS1_LDO4_SHIFT 3 +#define PALMAS_LDO_SHORT_STATUS1_LDO3 0x04 +#define PALMAS_LDO_SHORT_STATUS1_LDO3_SHIFT 2 +#define PALMAS_LDO_SHORT_STATUS1_LDO2 0x02 +#define PALMAS_LDO_SHORT_STATUS1_LDO2_SHIFT 1 +#define PALMAS_LDO_SHORT_STATUS1_LDO1 0x01 +#define PALMAS_LDO_SHORT_STATUS1_LDO1_SHIFT 0 + +/* Bit definitions for LDO_SHORT_STATUS2 */ +#define PALMAS_LDO_SHORT_STATUS2_LDOVANA 0x08 +#define PALMAS_LDO_SHORT_STATUS2_LDOVANA_SHIFT 3 +#define PALMAS_LDO_SHORT_STATUS2_LDOUSB 0x04 +#define PALMAS_LDO_SHORT_STATUS2_LDOUSB_SHIFT 2 +#define PALMAS_LDO_SHORT_STATUS2_LDOLN 0x02 +#define PALMAS_LDO_SHORT_STATUS2_LDOLN_SHIFT 1 +#define PALMAS_LDO_SHORT_STATUS2_LDO9 0x01 +#define PALMAS_LDO_SHORT_STATUS2_LDO9_SHIFT 0 + +/* Registers for function PMU_CONTROL */ +#define PALMAS_DEV_CTRL 0x0 +#define PALMAS_POWER_CTRL 0x1 +#define PALMAS_VSYS_LO 0x2 +#define PALMAS_VSYS_MON 0x3 +#define PALMAS_VBAT_MON 0x4 +#define PALMAS_WATCHDOG 0x5 +#define PALMAS_BOOT_STATUS 0x6 +#define PALMAS_BATTERY_BOUNCE 0x7 +#define PALMAS_BACKUP_BATTERY_CTRL 0x8 +#define PALMAS_LONG_PRESS_KEY 0x9 +#define PALMAS_OSC_THERM_CTRL 0xA +#define PALMAS_BATDEBOUNCING 0xB +#define PALMAS_SWOFF_HWRST 0xF +#define PALMAS_SWOFF_COLDRST 0x10 +#define PALMAS_SWOFF_STATUS 0x11 +#define PALMAS_PMU_CONFIG 0x12 +#define PALMAS_SPARE 0x14 +#define PALMAS_PMU_SECONDARY_INT 0x15 +#define PALMAS_SW_REVISION 0x17 +#define PALMAS_EXT_CHRG_CTRL 0x18 +#define PALMAS_PMU_SECONDARY_INT2 0x19 + +/* Bit definitions for DEV_CTRL */ +#define PALMAS_DEV_CTRL_DEV_STATUS_MASK 0x0c +#define PALMAS_DEV_CTRL_DEV_STATUS_SHIFT 2 +#define PALMAS_DEV_CTRL_SW_RST 0x02 +#define PALMAS_DEV_CTRL_SW_RST_SHIFT 1 +#define PALMAS_DEV_CTRL_DEV_ON 0x01 +#define PALMAS_DEV_CTRL_DEV_ON_SHIFT 0 + +/* Bit definitions for POWER_CTRL */ +#define PALMAS_POWER_CTRL_ENABLE2_MASK 0x04 +#define PALMAS_POWER_CTRL_ENABLE2_MASK_SHIFT 2 +#define PALMAS_POWER_CTRL_ENABLE1_MASK 0x02 +#define PALMAS_POWER_CTRL_ENABLE1_MASK_SHIFT 1 +#define PALMAS_POWER_CTRL_NSLEEP_MASK 0x01 +#define PALMAS_POWER_CTRL_NSLEEP_MASK_SHIFT 0 + +/* Bit definitions for VSYS_LO */ +#define PALMAS_VSYS_LO_THRESHOLD_MASK 0x1f +#define PALMAS_VSYS_LO_THRESHOLD_SHIFT 0 + +/* Bit definitions for VSYS_MON */ +#define PALMAS_VSYS_MON_ENABLE 0x80 +#define PALMAS_VSYS_MON_ENABLE_SHIFT 7 +#define PALMAS_VSYS_MON_THRESHOLD_MASK 0x3f +#define PALMAS_VSYS_MON_THRESHOLD_SHIFT 0 + +/* Bit definitions for VBAT_MON */ +#define PALMAS_VBAT_MON_ENABLE 0x80 +#define PALMAS_VBAT_MON_ENABLE_SHIFT 7 +#define PALMAS_VBAT_MON_THRESHOLD_MASK 0x3f +#define PALMAS_VBAT_MON_THRESHOLD_SHIFT 0 + +/* Bit definitions for WATCHDOG */ +#define PALMAS_WATCHDOG_LOCK 0x20 +#define PALMAS_WATCHDOG_LOCK_SHIFT 5 +#define PALMAS_WATCHDOG_ENABLE 0x10 +#define PALMAS_WATCHDOG_ENABLE_SHIFT 4 +#define PALMAS_WATCHDOG_MODE 0x08 +#define PALMAS_WATCHDOG_MODE_SHIFT 3 +#define PALMAS_WATCHDOG_TIMER_MASK 0x07 +#define PALMAS_WATCHDOG_TIMER_SHIFT 0 + +/* Bit definitions for BOOT_STATUS */ +#define PALMAS_BOOT_STATUS_BOOT1 0x02 +#define PALMAS_BOOT_STATUS_BOOT1_SHIFT 1 +#define PALMAS_BOOT_STATUS_BOOT0 0x01 +#define PALMAS_BOOT_STATUS_BOOT0_SHIFT 0 + +/* Bit definitions for BATTERY_BOUNCE */ +#define PALMAS_BATTERY_BOUNCE_BB_DELAY_MASK 0x3f +#define PALMAS_BATTERY_BOUNCE_BB_DELAY_SHIFT 0 + +/* Bit definitions for BACKUP_BATTERY_CTRL */ +#define PALMAS_BACKUP_BATTERY_CTRL_VRTC_18_15 0x80 +#define PALMAS_BACKUP_BATTERY_CTRL_VRTC_18_15_SHIFT 7 +#define PALMAS_BACKUP_BATTERY_CTRL_VRTC_EN_SLP 0x40 +#define PALMAS_BACKUP_BATTERY_CTRL_VRTC_EN_SLP_SHIFT 6 +#define PALMAS_BACKUP_BATTERY_CTRL_VRTC_EN_OFF 0x20 +#define PALMAS_BACKUP_BATTERY_CTRL_VRTC_EN_OFF_SHIFT 5 +#define PALMAS_BACKUP_BATTERY_CTRL_VRTC_PWEN 0x10 +#define PALMAS_BACKUP_BATTERY_CTRL_VRTC_PWEN_SHIFT 4 +#define PALMAS_BACKUP_BATTERY_CTRL_BBS_BBC_LOW_ICHRG 0x08 +#define PALMAS_BACKUP_BATTERY_CTRL_BBS_BBC_LOW_ICHRG_SHIFT 3 +#define PALMAS_BACKUP_BATTERY_CTRL_BB_SEL_MASK 0x06 +#define PALMAS_BACKUP_BATTERY_CTRL_BB_SEL_SHIFT 1 +#define PALMAS_BACKUP_BATTERY_CTRL_BB_CHG_EN 0x01 +#define PALMAS_BACKUP_BATTERY_CTRL_BB_CHG_EN_SHIFT 0 + +/* Bit definitions for LONG_PRESS_KEY */ +#define PALMAS_LONG_PRESS_KEY_LPK_LOCK 0x80 +#define PALMAS_LONG_PRESS_KEY_LPK_LOCK_SHIFT 7 +#define PALMAS_LONG_PRESS_KEY_LPK_INT_CLR 0x10 +#define PALMAS_LONG_PRESS_KEY_LPK_INT_CLR_SHIFT 4 +#define PALMAS_LONG_PRESS_KEY_LPK_TIME_MASK 0x0c +#define PALMAS_LONG_PRESS_KEY_LPK_TIME_SHIFT 2 +#define PALMAS_LONG_PRESS_KEY_PWRON_DEBOUNCE_MASK 0x03 +#define PALMAS_LONG_PRESS_KEY_PWRON_DEBOUNCE_SHIFT 0 + +/* Bit definitions for OSC_THERM_CTRL */ +#define PALMAS_OSC_THERM_CTRL_VANA_ON_IN_SLEEP 0x80 +#define PALMAS_OSC_THERM_CTRL_VANA_ON_IN_SLEEP_SHIFT 7 +#define PALMAS_OSC_THERM_CTRL_INT_MASK_IN_SLEEP 0x40 +#define PALMAS_OSC_THERM_CTRL_INT_MASK_IN_SLEEP_SHIFT 6 +#define PALMAS_OSC_THERM_CTRL_RC15MHZ_ON_IN_SLEEP 0x20 +#define PALMAS_OSC_THERM_CTRL_RC15MHZ_ON_IN_SLEEP_SHIFT 5 +#define PALMAS_OSC_THERM_CTRL_THERM_OFF_IN_SLEEP 0x10 +#define PALMAS_OSC_THERM_CTRL_THERM_OFF_IN_SLEEP_SHIFT 4 +#define PALMAS_OSC_THERM_CTRL_THERM_HD_SEL_MASK 0x0c +#define PALMAS_OSC_THERM_CTRL_THERM_HD_SEL_SHIFT 2 +#define PALMAS_OSC_THERM_CTRL_OSC_BYPASS 0x02 +#define PALMAS_OSC_THERM_CTRL_OSC_BYPASS_SHIFT 1 +#define PALMAS_OSC_THERM_CTRL_OSC_HPMODE 0x01 +#define PALMAS_OSC_THERM_CTRL_OSC_HPMODE_SHIFT 0 + +/* Bit definitions for BATDEBOUNCING */ +#define PALMAS_BATDEBOUNCING_BAT_DEB_BYPASS 0x80 +#define PALMAS_BATDEBOUNCING_BAT_DEB_BYPASS_SHIFT 7 +#define PALMAS_BATDEBOUNCING_BINS_DEB_MASK 0x78 +#define PALMAS_BATDEBOUNCING_BINS_DEB_SHIFT 3 +#define PALMAS_BATDEBOUNCING_BEXT_DEB_MASK 0x07 +#define PALMAS_BATDEBOUNCING_BEXT_DEB_SHIFT 0 + +/* Bit definitions for SWOFF_HWRST */ +#define PALMAS_SWOFF_HWRST_PWRON_LPK 0x80 +#define PALMAS_SWOFF_HWRST_PWRON_LPK_SHIFT 7 +#define PALMAS_SWOFF_HWRST_PWRDOWN 0x40 +#define PALMAS_SWOFF_HWRST_PWRDOWN_SHIFT 6 +#define PALMAS_SWOFF_HWRST_WTD 0x20 +#define PALMAS_SWOFF_HWRST_WTD_SHIFT 5 +#define PALMAS_SWOFF_HWRST_TSHUT 0x10 +#define PALMAS_SWOFF_HWRST_TSHUT_SHIFT 4 +#define PALMAS_SWOFF_HWRST_RESET_IN 0x08 +#define PALMAS_SWOFF_HWRST_RESET_IN_SHIFT 3 +#define PALMAS_SWOFF_HWRST_SW_RST 0x04 +#define PALMAS_SWOFF_HWRST_SW_RST_SHIFT 2 +#define PALMAS_SWOFF_HWRST_VSYS_LO 0x02 +#define PALMAS_SWOFF_HWRST_VSYS_LO_SHIFT 1 +#define PALMAS_SWOFF_HWRST_GPADC_SHUTDOWN 0x01 +#define PALMAS_SWOFF_HWRST_GPADC_SHUTDOWN_SHIFT 0 + +/* Bit definitions for SWOFF_COLDRST */ +#define PALMAS_SWOFF_COLDRST_PWRON_LPK 0x80 +#define PALMAS_SWOFF_COLDRST_PWRON_LPK_SHIFT 7 +#define PALMAS_SWOFF_COLDRST_PWRDOWN 0x40 +#define PALMAS_SWOFF_COLDRST_PWRDOWN_SHIFT 6 +#define PALMAS_SWOFF_COLDRST_WTD 0x20 +#define PALMAS_SWOFF_COLDRST_WTD_SHIFT 5 +#define PALMAS_SWOFF_COLDRST_TSHUT 0x10 +#define PALMAS_SWOFF_COLDRST_TSHUT_SHIFT 4 +#define PALMAS_SWOFF_COLDRST_RESET_IN 0x08 +#define PALMAS_SWOFF_COLDRST_RESET_IN_SHIFT 3 +#define PALMAS_SWOFF_COLDRST_SW_RST 0x04 +#define PALMAS_SWOFF_COLDRST_SW_RST_SHIFT 2 +#define PALMAS_SWOFF_COLDRST_VSYS_LO 0x02 +#define PALMAS_SWOFF_COLDRST_VSYS_LO_SHIFT 1 +#define PALMAS_SWOFF_COLDRST_GPADC_SHUTDOWN 0x01 +#define PALMAS_SWOFF_COLDRST_GPADC_SHUTDOWN_SHIFT 0 + +/* Bit definitions for SWOFF_STATUS */ +#define PALMAS_SWOFF_STATUS_PWRON_LPK 0x80 +#define PALMAS_SWOFF_STATUS_PWRON_LPK_SHIFT 7 +#define PALMAS_SWOFF_STATUS_PWRDOWN 0x40 +#define PALMAS_SWOFF_STATUS_PWRDOWN_SHIFT 6 +#define PALMAS_SWOFF_STATUS_WTD 0x20 +#define PALMAS_SWOFF_STATUS_WTD_SHIFT 5 +#define PALMAS_SWOFF_STATUS_TSHUT 0x10 +#define PALMAS_SWOFF_STATUS_TSHUT_SHIFT 4 +#define PALMAS_SWOFF_STATUS_RESET_IN 0x08 +#define PALMAS_SWOFF_STATUS_RESET_IN_SHIFT 3 +#define PALMAS_SWOFF_STATUS_SW_RST 0x04 +#define PALMAS_SWOFF_STATUS_SW_RST_SHIFT 2 +#define PALMAS_SWOFF_STATUS_VSYS_LO 0x02 +#define PALMAS_SWOFF_STATUS_VSYS_LO_SHIFT 1 +#define PALMAS_SWOFF_STATUS_GPADC_SHUTDOWN 0x01 +#define PALMAS_SWOFF_STATUS_GPADC_SHUTDOWN_SHIFT 0 + +/* Bit definitions for PMU_CONFIG */ +#define PALMAS_PMU_CONFIG_MULTI_CELL_EN 0x40 +#define PALMAS_PMU_CONFIG_MULTI_CELL_EN_SHIFT 6 +#define PALMAS_PMU_CONFIG_SPARE_MASK 0x30 +#define PALMAS_PMU_CONFIG_SPARE_SHIFT 4 +#define PALMAS_PMU_CONFIG_SWOFF_DLY_MASK 0x0c +#define PALMAS_PMU_CONFIG_SWOFF_DLY_SHIFT 2 +#define PALMAS_PMU_CONFIG_GATE_RESET_OUT 0x02 +#define PALMAS_PMU_CONFIG_GATE_RESET_OUT_SHIFT 1 +#define PALMAS_PMU_CONFIG_AUTODEVON 0x01 +#define PALMAS_PMU_CONFIG_AUTODEVON_SHIFT 0 + +/* Bit definitions for SPARE */ +#define PALMAS_SPARE_SPARE_MASK 0xf8 +#define PALMAS_SPARE_SPARE_SHIFT 3 +#define PALMAS_SPARE_REGEN3_OD 0x04 +#define PALMAS_SPARE_REGEN3_OD_SHIFT 2 +#define PALMAS_SPARE_REGEN2_OD 0x02 +#define PALMAS_SPARE_REGEN2_OD_SHIFT 1 +#define PALMAS_SPARE_REGEN1_OD 0x01 +#define PALMAS_SPARE_REGEN1_OD_SHIFT 0 + +/* Bit definitions for PMU_SECONDARY_INT */ +#define PALMAS_PMU_SECONDARY_INT_VBUS_OVV_INT_SRC 0x80 +#define PALMAS_PMU_SECONDARY_INT_VBUS_OVV_INT_SRC_SHIFT 7 +#define PALMAS_PMU_SECONDARY_INT_CHARG_DET_N_INT_SRC 0x40 +#define PALMAS_PMU_SECONDARY_INT_CHARG_DET_N_INT_SRC_SHIFT 6 +#define PALMAS_PMU_SECONDARY_INT_BB_INT_SRC 0x20 +#define PALMAS_PMU_SECONDARY_INT_BB_INT_SRC_SHIFT 5 +#define PALMAS_PMU_SECONDARY_INT_FBI_INT_SRC 0x10 +#define PALMAS_PMU_SECONDARY_INT_FBI_INT_SRC_SHIFT 4 +#define PALMAS_PMU_SECONDARY_INT_VBUS_OVV_MASK 0x08 +#define PALMAS_PMU_SECONDARY_INT_VBUS_OVV_MASK_SHIFT 3 +#define PALMAS_PMU_SECONDARY_INT_CHARG_DET_N_MASK 0x04 +#define PALMAS_PMU_SECONDARY_INT_CHARG_DET_N_MASK_SHIFT 2 +#define PALMAS_PMU_SECONDARY_INT_BB_MASK 0x02 +#define PALMAS_PMU_SECONDARY_INT_BB_MASK_SHIFT 1 +#define PALMAS_PMU_SECONDARY_INT_FBI_MASK 0x01 +#define PALMAS_PMU_SECONDARY_INT_FBI_MASK_SHIFT 0 + +/* Bit definitions for SW_REVISION */ +#define PALMAS_SW_REVISION_SW_REVISION_MASK 0xff +#define PALMAS_SW_REVISION_SW_REVISION_SHIFT 0 + +/* Bit definitions for EXT_CHRG_CTRL */ +#define PALMAS_EXT_CHRG_CTRL_VBUS_OVV_STATUS 0x80 +#define PALMAS_EXT_CHRG_CTRL_VBUS_OVV_STATUS_SHIFT 7 +#define PALMAS_EXT_CHRG_CTRL_CHARG_DET_N_STATUS 0x40 +#define PALMAS_EXT_CHRG_CTRL_CHARG_DET_N_STATUS_SHIFT 6 +#define PALMAS_EXT_CHRG_CTRL_VSYS_DEBOUNCE_DELAY 0x08 +#define PALMAS_EXT_CHRG_CTRL_VSYS_DEBOUNCE_DELAY_SHIFT 3 +#define PALMAS_EXT_CHRG_CTRL_CHRG_DET_N 0x04 +#define PALMAS_EXT_CHRG_CTRL_CHRG_DET_N_SHIFT 2 +#define PALMAS_EXT_CHRG_CTRL_AUTO_ACA_EN 0x02 +#define PALMAS_EXT_CHRG_CTRL_AUTO_ACA_EN_SHIFT 1 +#define PALMAS_EXT_CHRG_CTRL_AUTO_LDOUSB_EN 0x01 +#define PALMAS_EXT_CHRG_CTRL_AUTO_LDOUSB_EN_SHIFT 0 + +/* Bit definitions for PMU_SECONDARY_INT2 */ +#define PALMAS_PMU_SECONDARY_INT2_DVFS2_INT_SRC 0x20 +#define PALMAS_PMU_SECONDARY_INT2_DVFS2_INT_SRC_SHIFT 5 +#define PALMAS_PMU_SECONDARY_INT2_DVFS1_INT_SRC 0x10 +#define PALMAS_PMU_SECONDARY_INT2_DVFS1_INT_SRC_SHIFT 4 +#define PALMAS_PMU_SECONDARY_INT2_DVFS2_MASK 0x02 +#define PALMAS_PMU_SECONDARY_INT2_DVFS2_MASK_SHIFT 1 +#define PALMAS_PMU_SECONDARY_INT2_DVFS1_MASK 0x01 +#define PALMAS_PMU_SECONDARY_INT2_DVFS1_MASK_SHIFT 0 + +/* Registers for function RESOURCE */ +#define PALMAS_CLK32KG_CTRL 0x0 +#define PALMAS_CLK32KGAUDIO_CTRL 0x1 +#define PALMAS_REGEN1_CTRL 0x2 +#define PALMAS_REGEN2_CTRL 0x3 +#define PALMAS_SYSEN1_CTRL 0x4 +#define PALMAS_SYSEN2_CTRL 0x5 +#define PALMAS_NSLEEP_RES_ASSIGN 0x6 +#define PALMAS_NSLEEP_SMPS_ASSIGN 0x7 +#define PALMAS_NSLEEP_LDO_ASSIGN1 0x8 +#define PALMAS_NSLEEP_LDO_ASSIGN2 0x9 +#define PALMAS_ENABLE1_RES_ASSIGN 0xA +#define PALMAS_ENABLE1_SMPS_ASSIGN 0xB +#define PALMAS_ENABLE1_LDO_ASSIGN1 0xC +#define PALMAS_ENABLE1_LDO_ASSIGN2 0xD +#define PALMAS_ENABLE2_RES_ASSIGN 0xE +#define PALMAS_ENABLE2_SMPS_ASSIGN 0xF +#define PALMAS_ENABLE2_LDO_ASSIGN1 0x10 +#define PALMAS_ENABLE2_LDO_ASSIGN2 0x11 +#define PALMAS_REGEN3_CTRL 0x12 + +/* Bit definitions for CLK32KG_CTRL */ +#define PALMAS_CLK32KG_CTRL_STATUS 0x10 +#define PALMAS_CLK32KG_CTRL_STATUS_SHIFT 4 +#define PALMAS_CLK32KG_CTRL_MODE_SLEEP 0x04 +#define PALMAS_CLK32KG_CTRL_MODE_SLEEP_SHIFT 2 +#define PALMAS_CLK32KG_CTRL_MODE_ACTIVE 0x01 +#define PALMAS_CLK32KG_CTRL_MODE_ACTIVE_SHIFT 0 + +/* Bit definitions for CLK32KGAUDIO_CTRL */ +#define PALMAS_CLK32KGAUDIO_CTRL_STATUS 0x10 +#define PALMAS_CLK32KGAUDIO_CTRL_STATUS_SHIFT 4 +#define PALMAS_CLK32KGAUDIO_CTRL_RESERVED3 0x08 +#define PALMAS_CLK32KGAUDIO_CTRL_RESERVED3_SHIFT 3 +#define PALMAS_CLK32KGAUDIO_CTRL_MODE_SLEEP 0x04 +#define PALMAS_CLK32KGAUDIO_CTRL_MODE_SLEEP_SHIFT 2 +#define PALMAS_CLK32KGAUDIO_CTRL_MODE_ACTIVE 0x01 +#define PALMAS_CLK32KGAUDIO_CTRL_MODE_ACTIVE_SHIFT 0 + +/* Bit definitions for REGEN1_CTRL */ +#define PALMAS_REGEN1_CTRL_STATUS 0x10 +#define PALMAS_REGEN1_CTRL_STATUS_SHIFT 4 +#define PALMAS_REGEN1_CTRL_MODE_SLEEP 0x04 +#define PALMAS_REGEN1_CTRL_MODE_SLEEP_SHIFT 2 +#define PALMAS_REGEN1_CTRL_MODE_ACTIVE 0x01 +#define PALMAS_REGEN1_CTRL_MODE_ACTIVE_SHIFT 0 + +/* Bit definitions for REGEN2_CTRL */ +#define PALMAS_REGEN2_CTRL_STATUS 0x10 +#define PALMAS_REGEN2_CTRL_STATUS_SHIFT 4 +#define PALMAS_REGEN2_CTRL_MODE_SLEEP 0x04 +#define PALMAS_REGEN2_CTRL_MODE_SLEEP_SHIFT 2 +#define PALMAS_REGEN2_CTRL_MODE_ACTIVE 0x01 +#define PALMAS_REGEN2_CTRL_MODE_ACTIVE_SHIFT 0 + +/* Bit definitions for SYSEN1_CTRL */ +#define PALMAS_SYSEN1_CTRL_STATUS 0x10 +#define PALMAS_SYSEN1_CTRL_STATUS_SHIFT 4 +#define PALMAS_SYSEN1_CTRL_MODE_SLEEP 0x04 +#define PALMAS_SYSEN1_CTRL_MODE_SLEEP_SHIFT 2 +#define PALMAS_SYSEN1_CTRL_MODE_ACTIVE 0x01 +#define PALMAS_SYSEN1_CTRL_MODE_ACTIVE_SHIFT 0 + +/* Bit definitions for SYSEN2_CTRL */ +#define PALMAS_SYSEN2_CTRL_STATUS 0x10 +#define PALMAS_SYSEN2_CTRL_STATUS_SHIFT 4 +#define PALMAS_SYSEN2_CTRL_MODE_SLEEP 0x04 +#define PALMAS_SYSEN2_CTRL_MODE_SLEEP_SHIFT 2 +#define PALMAS_SYSEN2_CTRL_MODE_ACTIVE 0x01 +#define PALMAS_SYSEN2_CTRL_MODE_ACTIVE_SHIFT 0 + +/* Bit definitions for NSLEEP_RES_ASSIGN */ +#define PALMAS_NSLEEP_RES_ASSIGN_REGEN3 0x40 +#define PALMAS_NSLEEP_RES_ASSIGN_REGEN3_SHIFT 6 +#define PALMAS_NSLEEP_RES_ASSIGN_CLK32KGAUDIO 0x20 +#define PALMAS_NSLEEP_RES_ASSIGN_CLK32KGAUDIO_SHIFT 5 +#define PALMAS_NSLEEP_RES_ASSIGN_CLK32KG 0x10 +#define PALMAS_NSLEEP_RES_ASSIGN_CLK32KG_SHIFT 4 +#define PALMAS_NSLEEP_RES_ASSIGN_SYSEN2 0x08 +#define PALMAS_NSLEEP_RES_ASSIGN_SYSEN2_SHIFT 3 +#define PALMAS_NSLEEP_RES_ASSIGN_SYSEN1 0x04 +#define PALMAS_NSLEEP_RES_ASSIGN_SYSEN1_SHIFT 2 +#define PALMAS_NSLEEP_RES_ASSIGN_REGEN2 0x02 +#define PALMAS_NSLEEP_RES_ASSIGN_REGEN2_SHIFT 1 +#define PALMAS_NSLEEP_RES_ASSIGN_REGEN1 0x01 +#define PALMAS_NSLEEP_RES_ASSIGN_REGEN1_SHIFT 0 + +/* Bit definitions for NSLEEP_SMPS_ASSIGN */ +#define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS10 0x80 +#define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS10_SHIFT 7 +#define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS9 0x40 +#define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS9_SHIFT 6 +#define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS8 0x20 +#define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS8_SHIFT 5 +#define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS7 0x10 +#define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS7_SHIFT 4 +#define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS6 0x08 +#define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS6_SHIFT 3 +#define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS45 0x04 +#define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS45_SHIFT 2 +#define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS3 0x02 +#define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS3_SHIFT 1 +#define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS12 0x01 +#define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS12_SHIFT 0 + +/* Bit definitions for NSLEEP_LDO_ASSIGN1 */ +#define PALMAS_NSLEEP_LDO_ASSIGN1_LDO8 0x80 +#define PALMAS_NSLEEP_LDO_ASSIGN1_LDO8_SHIFT 7 +#define PALMAS_NSLEEP_LDO_ASSIGN1_LDO7 0x40 +#define PALMAS_NSLEEP_LDO_ASSIGN1_LDO7_SHIFT 6 +#define PALMAS_NSLEEP_LDO_ASSIGN1_LDO6 0x20 +#define PALMAS_NSLEEP_LDO_ASSIGN1_LDO6_SHIFT 5 +#define PALMAS_NSLEEP_LDO_ASSIGN1_LDO5 0x10 +#define PALMAS_NSLEEP_LDO_ASSIGN1_LDO5_SHIFT 4 +#define PALMAS_NSLEEP_LDO_ASSIGN1_LDO4 0x08 +#define PALMAS_NSLEEP_LDO_ASSIGN1_LDO4_SHIFT 3 +#define PALMAS_NSLEEP_LDO_ASSIGN1_LDO3 0x04 +#define PALMAS_NSLEEP_LDO_ASSIGN1_LDO3_SHIFT 2 +#define PALMAS_NSLEEP_LDO_ASSIGN1_LDO2 0x02 +#define PALMAS_NSLEEP_LDO_ASSIGN1_LDO2_SHIFT 1 +#define PALMAS_NSLEEP_LDO_ASSIGN1_LDO1 0x01 +#define PALMAS_NSLEEP_LDO_ASSIGN1_LDO1_SHIFT 0 + +/* Bit definitions for NSLEEP_LDO_ASSIGN2 */ +#define PALMAS_NSLEEP_LDO_ASSIGN2_LDOUSB 0x04 +#define PALMAS_NSLEEP_LDO_ASSIGN2_LDOUSB_SHIFT 2 +#define PALMAS_NSLEEP_LDO_ASSIGN2_LDOLN 0x02 +#define PALMAS_NSLEEP_LDO_ASSIGN2_LDOLN_SHIFT 1 +#define PALMAS_NSLEEP_LDO_ASSIGN2_LDO9 0x01 +#define PALMAS_NSLEEP_LDO_ASSIGN2_LDO9_SHIFT 0 + +/* Bit definitions for ENABLE1_RES_ASSIGN */ +#define PALMAS_ENABLE1_RES_ASSIGN_REGEN3 0x40 +#define PALMAS_ENABLE1_RES_ASSIGN_REGEN3_SHIFT 6 +#define PALMAS_ENABLE1_RES_ASSIGN_CLK32KGAUDIO 0x20 +#define PALMAS_ENABLE1_RES_ASSIGN_CLK32KGAUDIO_SHIFT 5 +#define PALMAS_ENABLE1_RES_ASSIGN_CLK32KG 0x10 +#define PALMAS_ENABLE1_RES_ASSIGN_CLK32KG_SHIFT 4 +#define PALMAS_ENABLE1_RES_ASSIGN_SYSEN2 0x08 +#define PALMAS_ENABLE1_RES_ASSIGN_SYSEN2_SHIFT 3 +#define PALMAS_ENABLE1_RES_ASSIGN_SYSEN1 0x04 +#define PALMAS_ENABLE1_RES_ASSIGN_SYSEN1_SHIFT 2 +#define PALMAS_ENABLE1_RES_ASSIGN_REGEN2 0x02 +#define PALMAS_ENABLE1_RES_ASSIGN_REGEN2_SHIFT 1 +#define PALMAS_ENABLE1_RES_ASSIGN_REGEN1 0x01 +#define PALMAS_ENABLE1_RES_ASSIGN_REGEN1_SHIFT 0 + +/* Bit definitions for ENABLE1_SMPS_ASSIGN */ +#define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS10 0x80 +#define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS10_SHIFT 7 +#define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS9 0x40 +#define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS9_SHIFT 6 +#define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS8 0x20 +#define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS8_SHIFT 5 +#define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS7 0x10 +#define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS7_SHIFT 4 +#define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS6 0x08 +#define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS6_SHIFT 3 +#define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS45 0x04 +#define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS45_SHIFT 2 +#define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS3 0x02 +#define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS3_SHIFT 1 +#define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS12 0x01 +#define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS12_SHIFT 0 + +/* Bit definitions for ENABLE1_LDO_ASSIGN1 */ +#define PALMAS_ENABLE1_LDO_ASSIGN1_LDO8 0x80 +#define PALMAS_ENABLE1_LDO_ASSIGN1_LDO8_SHIFT 7 +#define PALMAS_ENABLE1_LDO_ASSIGN1_LDO7 0x40 +#define PALMAS_ENABLE1_LDO_ASSIGN1_LDO7_SHIFT 6 +#define PALMAS_ENABLE1_LDO_ASSIGN1_LDO6 0x20 +#define PALMAS_ENABLE1_LDO_ASSIGN1_LDO6_SHIFT 5 +#define PALMAS_ENABLE1_LDO_ASSIGN1_LDO5 0x10 +#define PALMAS_ENABLE1_LDO_ASSIGN1_LDO5_SHIFT 4 +#define PALMAS_ENABLE1_LDO_ASSIGN1_LDO4 0x08 +#define PALMAS_ENABLE1_LDO_ASSIGN1_LDO4_SHIFT 3 +#define PALMAS_ENABLE1_LDO_ASSIGN1_LDO3 0x04 +#define PALMAS_ENABLE1_LDO_ASSIGN1_LDO3_SHIFT 2 +#define PALMAS_ENABLE1_LDO_ASSIGN1_LDO2 0x02 +#define PALMAS_ENABLE1_LDO_ASSIGN1_LDO2_SHIFT 1 +#define PALMAS_ENABLE1_LDO_ASSIGN1_LDO1 0x01 +#define PALMAS_ENABLE1_LDO_ASSIGN1_LDO1_SHIFT 0 + +/* Bit definitions for ENABLE1_LDO_ASSIGN2 */ +#define PALMAS_ENABLE1_LDO_ASSIGN2_LDOUSB 0x04 +#define PALMAS_ENABLE1_LDO_ASSIGN2_LDOUSB_SHIFT 2 +#define PALMAS_ENABLE1_LDO_ASSIGN2_LDOLN 0x02 +#define PALMAS_ENABLE1_LDO_ASSIGN2_LDOLN_SHIFT 1 +#define PALMAS_ENABLE1_LDO_ASSIGN2_LDO9 0x01 +#define PALMAS_ENABLE1_LDO_ASSIGN2_LDO9_SHIFT 0 + +/* Bit definitions for ENABLE2_RES_ASSIGN */ +#define PALMAS_ENABLE2_RES_ASSIGN_REGEN3 0x40 +#define PALMAS_ENABLE2_RES_ASSIGN_REGEN3_SHIFT 6 +#define PALMAS_ENABLE2_RES_ASSIGN_CLK32KGAUDIO 0x20 +#define PALMAS_ENABLE2_RES_ASSIGN_CLK32KGAUDIO_SHIFT 5 +#define PALMAS_ENABLE2_RES_ASSIGN_CLK32KG 0x10 +#define PALMAS_ENABLE2_RES_ASSIGN_CLK32KG_SHIFT 4 +#define PALMAS_ENABLE2_RES_ASSIGN_SYSEN2 0x08 +#define PALMAS_ENABLE2_RES_ASSIGN_SYSEN2_SHIFT 3 +#define PALMAS_ENABLE2_RES_ASSIGN_SYSEN1 0x04 +#define PALMAS_ENABLE2_RES_ASSIGN_SYSEN1_SHIFT 2 +#define PALMAS_ENABLE2_RES_ASSIGN_REGEN2 0x02 +#define PALMAS_ENABLE2_RES_ASSIGN_REGEN2_SHIFT 1 +#define PALMAS_ENABLE2_RES_ASSIGN_REGEN1 0x01 +#define PALMAS_ENABLE2_RES_ASSIGN_REGEN1_SHIFT 0 + +/* Bit definitions for ENABLE2_SMPS_ASSIGN */ +#define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS10 0x80 +#define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS10_SHIFT 7 +#define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS9 0x40 +#define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS9_SHIFT 6 +#define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS8 0x20 +#define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS8_SHIFT 5 +#define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS7 0x10 +#define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS7_SHIFT 4 +#define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS6 0x08 +#define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS6_SHIFT 3 +#define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS45 0x04 +#define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS45_SHIFT 2 +#define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS3 0x02 +#define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS3_SHIFT 1 +#define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS12 0x01 +#define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS12_SHIFT 0 + +/* Bit definitions for ENABLE2_LDO_ASSIGN1 */ +#define PALMAS_ENABLE2_LDO_ASSIGN1_LDO8 0x80 +#define PALMAS_ENABLE2_LDO_ASSIGN1_LDO8_SHIFT 7 +#define PALMAS_ENABLE2_LDO_ASSIGN1_LDO7 0x40 +#define PALMAS_ENABLE2_LDO_ASSIGN1_LDO7_SHIFT 6 +#define PALMAS_ENABLE2_LDO_ASSIGN1_LDO6 0x20 +#define PALMAS_ENABLE2_LDO_ASSIGN1_LDO6_SHIFT 5 +#define PALMAS_ENABLE2_LDO_ASSIGN1_LDO5 0x10 +#define PALMAS_ENABLE2_LDO_ASSIGN1_LDO5_SHIFT 4 +#define PALMAS_ENABLE2_LDO_ASSIGN1_LDO4 0x08 +#define PALMAS_ENABLE2_LDO_ASSIGN1_LDO4_SHIFT 3 +#define PALMAS_ENABLE2_LDO_ASSIGN1_LDO3 0x04 +#define PALMAS_ENABLE2_LDO_ASSIGN1_LDO3_SHIFT 2 +#define PALMAS_ENABLE2_LDO_ASSIGN1_LDO2 0x02 +#define PALMAS_ENABLE2_LDO_ASSIGN1_LDO2_SHIFT 1 +#define PALMAS_ENABLE2_LDO_ASSIGN1_LDO1 0x01 +#define PALMAS_ENABLE2_LDO_ASSIGN1_LDO1_SHIFT 0 + +/* Bit definitions for ENABLE2_LDO_ASSIGN2 */ +#define PALMAS_ENABLE2_LDO_ASSIGN2_LDOUSB 0x04 +#define PALMAS_ENABLE2_LDO_ASSIGN2_LDOUSB_SHIFT 2 +#define PALMAS_ENABLE2_LDO_ASSIGN2_LDOLN 0x02 +#define PALMAS_ENABLE2_LDO_ASSIGN2_LDOLN_SHIFT 1 +#define PALMAS_ENABLE2_LDO_ASSIGN2_LDO9 0x01 +#define PALMAS_ENABLE2_LDO_ASSIGN2_LDO9_SHIFT 0 + +/* Bit definitions for REGEN3_CTRL */ +#define PALMAS_REGEN3_CTRL_STATUS 0x10 +#define PALMAS_REGEN3_CTRL_STATUS_SHIFT 4 +#define PALMAS_REGEN3_CTRL_MODE_SLEEP 0x04 +#define PALMAS_REGEN3_CTRL_MODE_SLEEP_SHIFT 2 +#define PALMAS_REGEN3_CTRL_MODE_ACTIVE 0x01 +#define PALMAS_REGEN3_CTRL_MODE_ACTIVE_SHIFT 0 + +/* Registers for function PAD_CONTROL */ +#define PALMAS_PU_PD_INPUT_CTRL1 0x0 +#define PALMAS_PU_PD_INPUT_CTRL2 0x1 +#define PALMAS_PU_PD_INPUT_CTRL3 0x2 +#define PALMAS_OD_OUTPUT_CTRL 0x4 +#define PALMAS_POLARITY_CTRL 0x5 +#define PALMAS_PRIMARY_SECONDARY_PAD1 0x6 +#define PALMAS_PRIMARY_SECONDARY_PAD2 0x7 +#define PALMAS_I2C_SPI 0x8 +#define PALMAS_PU_PD_INPUT_CTRL4 0x9 +#define PALMAS_PRIMARY_SECONDARY_PAD3 0xA + +/* Bit definitions for PU_PD_INPUT_CTRL1 */ +#define PALMAS_PU_PD_INPUT_CTRL1_RESET_IN_PD 0x40 +#define PALMAS_PU_PD_INPUT_CTRL1_RESET_IN_PD_SHIFT 6 +#define PALMAS_PU_PD_INPUT_CTRL1_GPADC_START_PU 0x20 +#define PALMAS_PU_PD_INPUT_CTRL1_GPADC_START_PU_SHIFT 5 +#define PALMAS_PU_PD_INPUT_CTRL1_GPADC_START_PD 0x10 +#define PALMAS_PU_PD_INPUT_CTRL1_GPADC_START_PD_SHIFT 4 +#define PALMAS_PU_PD_INPUT_CTRL1_PWRDOWN_PD 0x04 +#define PALMAS_PU_PD_INPUT_CTRL1_PWRDOWN_PD_SHIFT 2 +#define PALMAS_PU_PD_INPUT_CTRL1_NRESWARM_PU 0x02 +#define PALMAS_PU_PD_INPUT_CTRL1_NRESWARM_PU_SHIFT 1 + +/* Bit definitions for PU_PD_INPUT_CTRL2 */ +#define PALMAS_PU_PD_INPUT_CTRL2_ENABLE2_PU 0x20 +#define PALMAS_PU_PD_INPUT_CTRL2_ENABLE2_PU_SHIFT 5 +#define PALMAS_PU_PD_INPUT_CTRL2_ENABLE2_PD 0x10 +#define PALMAS_PU_PD_INPUT_CTRL2_ENABLE2_PD_SHIFT 4 +#define PALMAS_PU_PD_INPUT_CTRL2_ENABLE1_PU 0x08 +#define PALMAS_PU_PD_INPUT_CTRL2_ENABLE1_PU_SHIFT 3 +#define PALMAS_PU_PD_INPUT_CTRL2_ENABLE1_PD 0x04 +#define PALMAS_PU_PD_INPUT_CTRL2_ENABLE1_PD_SHIFT 2 +#define PALMAS_PU_PD_INPUT_CTRL2_NSLEEP_PU 0x02 +#define PALMAS_PU_PD_INPUT_CTRL2_NSLEEP_PU_SHIFT 1 +#define PALMAS_PU_PD_INPUT_CTRL2_NSLEEP_PD 0x01 +#define PALMAS_PU_PD_INPUT_CTRL2_NSLEEP_PD_SHIFT 0 + +/* Bit definitions for PU_PD_INPUT_CTRL3 */ +#define PALMAS_PU_PD_INPUT_CTRL3_ACOK_PD 0x40 +#define PALMAS_PU_PD_INPUT_CTRL3_ACOK_PD_SHIFT 6 +#define PALMAS_PU_PD_INPUT_CTRL3_CHRG_DET_N_PD 0x10 +#define PALMAS_PU_PD_INPUT_CTRL3_CHRG_DET_N_PD_SHIFT 4 +#define PALMAS_PU_PD_INPUT_CTRL3_POWERHOLD_PD 0x04 +#define PALMAS_PU_PD_INPUT_CTRL3_POWERHOLD_PD_SHIFT 2 +#define PALMAS_PU_PD_INPUT_CTRL3_MSECURE_PD 0x01 +#define PALMAS_PU_PD_INPUT_CTRL3_MSECURE_PD_SHIFT 0 + +/* Bit definitions for OD_OUTPUT_CTRL */ +#define PALMAS_OD_OUTPUT_CTRL_PWM_2_OD 0x80 +#define PALMAS_OD_OUTPUT_CTRL_PWM_2_OD_SHIFT 7 +#define PALMAS_OD_OUTPUT_CTRL_VBUSDET_OD 0x40 +#define PALMAS_OD_OUTPUT_CTRL_VBUSDET_OD_SHIFT 6 +#define PALMAS_OD_OUTPUT_CTRL_PWM_1_OD 0x20 +#define PALMAS_OD_OUTPUT_CTRL_PWM_1_OD_SHIFT 5 +#define PALMAS_OD_OUTPUT_CTRL_INT_OD 0x08 +#define PALMAS_OD_OUTPUT_CTRL_INT_OD_SHIFT 3 + +/* Bit definitions for POLARITY_CTRL */ +#define PALMAS_POLARITY_CTRL_INT_POLARITY 0x80 +#define PALMAS_POLARITY_CTRL_INT_POLARITY_SHIFT 7 +#define PALMAS_POLARITY_CTRL_ENABLE2_POLARITY 0x40 +#define PALMAS_POLARITY_CTRL_ENABLE2_POLARITY_SHIFT 6 +#define PALMAS_POLARITY_CTRL_ENABLE1_POLARITY 0x20 +#define PALMAS_POLARITY_CTRL_ENABLE1_POLARITY_SHIFT 5 +#define PALMAS_POLARITY_CTRL_NSLEEP_POLARITY 0x10 +#define PALMAS_POLARITY_CTRL_NSLEEP_POLARITY_SHIFT 4 +#define PALMAS_POLARITY_CTRL_RESET_IN_POLARITY 0x08 +#define PALMAS_POLARITY_CTRL_RESET_IN_POLARITY_SHIFT 3 +#define PALMAS_POLARITY_CTRL_GPIO_3_CHRG_DET_N_POLARITY 0x04 +#define PALMAS_POLARITY_CTRL_GPIO_3_CHRG_DET_N_POLARITY_SHIFT 2 +#define PALMAS_POLARITY_CTRL_POWERGOOD_USB_PSEL_POLARITY 0x02 +#define PALMAS_POLARITY_CTRL_POWERGOOD_USB_PSEL_POLARITY_SHIFT 1 +#define PALMAS_POLARITY_CTRL_PWRDOWN_POLARITY 0x01 +#define PALMAS_POLARITY_CTRL_PWRDOWN_POLARITY_SHIFT 0 + +/* Bit definitions for PRIMARY_SECONDARY_PAD1 */ +#define PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_3 0x80 +#define PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_3_SHIFT 7 +#define PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_2_MASK 0x60 +#define PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_2_SHIFT 5 +#define PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_1_MASK 0x18 +#define PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_1_SHIFT 3 +#define PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_0 0x04 +#define PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_0_SHIFT 2 +#define PALMAS_PRIMARY_SECONDARY_PAD1_VAC 0x02 +#define PALMAS_PRIMARY_SECONDARY_PAD1_VAC_SHIFT 1 +#define PALMAS_PRIMARY_SECONDARY_PAD1_POWERGOOD 0x01 +#define PALMAS_PRIMARY_SECONDARY_PAD1_POWERGOOD_SHIFT 0 + +/* Bit definitions for PRIMARY_SECONDARY_PAD2 */ +#define PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_7_MASK 0x30 +#define PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_7_SHIFT 4 +#define PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_6 0x08 +#define PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_6_SHIFT 3 +#define PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_5_MASK 0x06 +#define PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_5_SHIFT 1 +#define PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_4 0x01 +#define PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_4_SHIFT 0 + +/* Bit definitions for I2C_SPI */ +#define PALMAS_I2C_SPI_I2C2OTP_EN 0x80 +#define PALMAS_I2C_SPI_I2C2OTP_EN_SHIFT 7 +#define PALMAS_I2C_SPI_I2C2OTP_PAGESEL 0x40 +#define PALMAS_I2C_SPI_I2C2OTP_PAGESEL_SHIFT 6 +#define PALMAS_I2C_SPI_ID_I2C2 0x20 +#define PALMAS_I2C_SPI_ID_I2C2_SHIFT 5 +#define PALMAS_I2C_SPI_I2C_SPI 0x10 +#define PALMAS_I2C_SPI_I2C_SPI_SHIFT 4 +#define PALMAS_I2C_SPI_ID_I2C1_MASK 0x0f +#define PALMAS_I2C_SPI_ID_I2C1_SHIFT 0 + +/* Bit definitions for PU_PD_INPUT_CTRL4 */ +#define PALMAS_PU_PD_INPUT_CTRL4_DVFS2_DAT_PD 0x40 +#define PALMAS_PU_PD_INPUT_CTRL4_DVFS2_DAT_PD_SHIFT 6 +#define PALMAS_PU_PD_INPUT_CTRL4_DVFS2_CLK_PD 0x10 +#define PALMAS_PU_PD_INPUT_CTRL4_DVFS2_CLK_PD_SHIFT 4 +#define PALMAS_PU_PD_INPUT_CTRL4_DVFS1_DAT_PD 0x04 +#define PALMAS_PU_PD_INPUT_CTRL4_DVFS1_DAT_PD_SHIFT 2 +#define PALMAS_PU_PD_INPUT_CTRL4_DVFS1_CLK_PD 0x01 +#define PALMAS_PU_PD_INPUT_CTRL4_DVFS1_CLK_PD_SHIFT 0 + +/* Bit definitions for PRIMARY_SECONDARY_PAD3 */ +#define PALMAS_PRIMARY_SECONDARY_PAD3_DVFS2 0x02 +#define PALMAS_PRIMARY_SECONDARY_PAD3_DVFS2_SHIFT 1 +#define PALMAS_PRIMARY_SECONDARY_PAD3_DVFS1 0x01 +#define PALMAS_PRIMARY_SECONDARY_PAD3_DVFS1_SHIFT 0 + +/* Registers for function LED_PWM */ +#define PALMAS_LED_PERIOD_CTRL 0x0 +#define PALMAS_LED_CTRL 0x1 +#define PALMAS_PWM_CTRL1 0x2 +#define PALMAS_PWM_CTRL2 0x3 + +/* Bit definitions for LED_PERIOD_CTRL */ +#define PALMAS_LED_PERIOD_CTRL_LED_2_PERIOD_MASK 0x38 +#define PALMAS_LED_PERIOD_CTRL_LED_2_PERIOD_SHIFT 3 +#define PALMAS_LED_PERIOD_CTRL_LED_1_PERIOD_MASK 0x07 +#define PALMAS_LED_PERIOD_CTRL_LED_1_PERIOD_SHIFT 0 + +/* Bit definitions for LED_CTRL */ +#define PALMAS_LED_CTRL_LED_2_SEQ 0x20 +#define PALMAS_LED_CTRL_LED_2_SEQ_SHIFT 5 +#define PALMAS_LED_CTRL_LED_1_SEQ 0x10 +#define PALMAS_LED_CTRL_LED_1_SEQ_SHIFT 4 +#define PALMAS_LED_CTRL_LED_2_ON_TIME_MASK 0x0c +#define PALMAS_LED_CTRL_LED_2_ON_TIME_SHIFT 2 +#define PALMAS_LED_CTRL_LED_1_ON_TIME_MASK 0x03 +#define PALMAS_LED_CTRL_LED_1_ON_TIME_SHIFT 0 + +/* Bit definitions for PWM_CTRL1 */ +#define PALMAS_PWM_CTRL1_PWM_FREQ_EN 0x02 +#define PALMAS_PWM_CTRL1_PWM_FREQ_EN_SHIFT 1 +#define PALMAS_PWM_CTRL1_PWM_FREQ_SEL 0x01 +#define PALMAS_PWM_CTRL1_PWM_FREQ_SEL_SHIFT 0 + +/* Bit definitions for PWM_CTRL2 */ +#define PALMAS_PWM_CTRL2_PWM_DUTY_SEL_MASK 0xff +#define PALMAS_PWM_CTRL2_PWM_DUTY_SEL_SHIFT 0 + +/* Registers for function INTERRUPT */ +#define PALMAS_INT1_STATUS 0x0 +#define PALMAS_INT1_MASK 0x1 +#define PALMAS_INT1_LINE_STATE 0x2 +#define PALMAS_INT1_EDGE_DETECT1_RESERVED 0x3 +#define PALMAS_INT1_EDGE_DETECT2_RESERVED 0x4 +#define PALMAS_INT2_STATUS 0x5 +#define PALMAS_INT2_MASK 0x6 +#define PALMAS_INT2_LINE_STATE 0x7 +#define PALMAS_INT2_EDGE_DETECT1_RESERVED 0x8 +#define PALMAS_INT2_EDGE_DETECT2_RESERVED 0x9 +#define PALMAS_INT3_STATUS 0xA +#define PALMAS_INT3_MASK 0xB +#define PALMAS_INT3_LINE_STATE 0xC +#define PALMAS_INT3_EDGE_DETECT1_RESERVED 0xD +#define PALMAS_INT3_EDGE_DETECT2_RESERVED 0xE +#define PALMAS_INT4_STATUS 0xF +#define PALMAS_INT4_MASK 0x10 +#define PALMAS_INT4_LINE_STATE 0x11 +#define PALMAS_INT4_EDGE_DETECT1 0x12 +#define PALMAS_INT4_EDGE_DETECT2 0x13 +#define PALMAS_INT_CTRL 0x14 + +/* Bit definitions for INT1_STATUS */ +#define PALMAS_INT1_STATUS_VBAT_MON 0x80 +#define PALMAS_INT1_STATUS_VBAT_MON_SHIFT 7 +#define PALMAS_INT1_STATUS_VSYS_MON 0x40 +#define PALMAS_INT1_STATUS_VSYS_MON_SHIFT 6 +#define PALMAS_INT1_STATUS_HOTDIE 0x20 +#define PALMAS_INT1_STATUS_HOTDIE_SHIFT 5 +#define PALMAS_INT1_STATUS_PWRDOWN 0x10 +#define PALMAS_INT1_STATUS_PWRDOWN_SHIFT 4 +#define PALMAS_INT1_STATUS_RPWRON 0x08 +#define PALMAS_INT1_STATUS_RPWRON_SHIFT 3 +#define PALMAS_INT1_STATUS_LONG_PRESS_KEY 0x04 +#define PALMAS_INT1_STATUS_LONG_PRESS_KEY_SHIFT 2 +#define PALMAS_INT1_STATUS_PWRON 0x02 +#define PALMAS_INT1_STATUS_PWRON_SHIFT 1 +#define PALMAS_INT1_STATUS_CHARG_DET_N_VBUS_OVV 0x01 +#define PALMAS_INT1_STATUS_CHARG_DET_N_VBUS_OVV_SHIFT 0 + +/* Bit definitions for INT1_MASK */ +#define PALMAS_INT1_MASK_VBAT_MON 0x80 +#define PALMAS_INT1_MASK_VBAT_MON_SHIFT 7 +#define PALMAS_INT1_MASK_VSYS_MON 0x40 +#define PALMAS_INT1_MASK_VSYS_MON_SHIFT 6 +#define PALMAS_INT1_MASK_HOTDIE 0x20 +#define PALMAS_INT1_MASK_HOTDIE_SHIFT 5 +#define PALMAS_INT1_MASK_PWRDOWN 0x10 +#define PALMAS_INT1_MASK_PWRDOWN_SHIFT 4 +#define PALMAS_INT1_MASK_RPWRON 0x08 +#define PALMAS_INT1_MASK_RPWRON_SHIFT 3 +#define PALMAS_INT1_MASK_LONG_PRESS_KEY 0x04 +#define PALMAS_INT1_MASK_LONG_PRESS_KEY_SHIFT 2 +#define PALMAS_INT1_MASK_PWRON 0x02 +#define PALMAS_INT1_MASK_PWRON_SHIFT 1 +#define PALMAS_INT1_MASK_CHARG_DET_N_VBUS_OVV 0x01 +#define PALMAS_INT1_MASK_CHARG_DET_N_VBUS_OVV_SHIFT 0 + +/* Bit definitions for INT1_LINE_STATE */ +#define PALMAS_INT1_LINE_STATE_VBAT_MON 0x80 +#define PALMAS_INT1_LINE_STATE_VBAT_MON_SHIFT 7 +#define PALMAS_INT1_LINE_STATE_VSYS_MON 0x40 +#define PALMAS_INT1_LINE_STATE_VSYS_MON_SHIFT 6 +#define PALMAS_INT1_LINE_STATE_HOTDIE 0x20 +#define PALMAS_INT1_LINE_STATE_HOTDIE_SHIFT 5 +#define PALMAS_INT1_LINE_STATE_PWRDOWN 0x10 +#define PALMAS_INT1_LINE_STATE_PWRDOWN_SHIFT 4 +#define PALMAS_INT1_LINE_STATE_RPWRON 0x08 +#define PALMAS_INT1_LINE_STATE_RPWRON_SHIFT 3 +#define PALMAS_INT1_LINE_STATE_LONG_PRESS_KEY 0x04 +#define PALMAS_INT1_LINE_STATE_LONG_PRESS_KEY_SHIFT 2 +#define PALMAS_INT1_LINE_STATE_PWRON 0x02 +#define PALMAS_INT1_LINE_STATE_PWRON_SHIFT 1 +#define PALMAS_INT1_LINE_STATE_CHARG_DET_N_VBUS_OVV 0x01 +#define PALMAS_INT1_LINE_STATE_CHARG_DET_N_VBUS_OVV_SHIFT 0 + +/* Bit definitions for INT2_STATUS */ +#define PALMAS_INT2_STATUS_VAC_ACOK 0x80 +#define PALMAS_INT2_STATUS_VAC_ACOK_SHIFT 7 +#define PALMAS_INT2_STATUS_SHORT 0x40 +#define PALMAS_INT2_STATUS_SHORT_SHIFT 6 +#define PALMAS_INT2_STATUS_FBI_BB 0x20 +#define PALMAS_INT2_STATUS_FBI_BB_SHIFT 5 +#define PALMAS_INT2_STATUS_RESET_IN 0x10 +#define PALMAS_INT2_STATUS_RESET_IN_SHIFT 4 +#define PALMAS_INT2_STATUS_BATREMOVAL 0x08 +#define PALMAS_INT2_STATUS_BATREMOVAL_SHIFT 3 +#define PALMAS_INT2_STATUS_WDT 0x04 +#define PALMAS_INT2_STATUS_WDT_SHIFT 2 +#define PALMAS_INT2_STATUS_RTC_TIMER 0x02 +#define PALMAS_INT2_STATUS_RTC_TIMER_SHIFT 1 +#define PALMAS_INT2_STATUS_RTC_ALARM 0x01 +#define PALMAS_INT2_STATUS_RTC_ALARM_SHIFT 0 + +/* Bit definitions for INT2_MASK */ +#define PALMAS_INT2_MASK_VAC_ACOK 0x80 +#define PALMAS_INT2_MASK_VAC_ACOK_SHIFT 7 +#define PALMAS_INT2_MASK_SHORT 0x40 +#define PALMAS_INT2_MASK_SHORT_SHIFT 6 +#define PALMAS_INT2_MASK_FBI_BB 0x20 +#define PALMAS_INT2_MASK_FBI_BB_SHIFT 5 +#define PALMAS_INT2_MASK_RESET_IN 0x10 +#define PALMAS_INT2_MASK_RESET_IN_SHIFT 4 +#define PALMAS_INT2_MASK_BATREMOVAL 0x08 +#define PALMAS_INT2_MASK_BATREMOVAL_SHIFT 3 +#define PALMAS_INT2_MASK_WDT 0x04 +#define PALMAS_INT2_MASK_WDT_SHIFT 2 +#define PALMAS_INT2_MASK_RTC_TIMER 0x02 +#define PALMAS_INT2_MASK_RTC_TIMER_SHIFT 1 +#define PALMAS_INT2_MASK_RTC_ALARM 0x01 +#define PALMAS_INT2_MASK_RTC_ALARM_SHIFT 0 + +/* Bit definitions for INT2_LINE_STATE */ +#define PALMAS_INT2_LINE_STATE_VAC_ACOK 0x80 +#define PALMAS_INT2_LINE_STATE_VAC_ACOK_SHIFT 7 +#define PALMAS_INT2_LINE_STATE_SHORT 0x40 +#define PALMAS_INT2_LINE_STATE_SHORT_SHIFT 6 +#define PALMAS_INT2_LINE_STATE_FBI_BB 0x20 +#define PALMAS_INT2_LINE_STATE_FBI_BB_SHIFT 5 +#define PALMAS_INT2_LINE_STATE_RESET_IN 0x10 +#define PALMAS_INT2_LINE_STATE_RESET_IN_SHIFT 4 +#define PALMAS_INT2_LINE_STATE_BATREMOVAL 0x08 +#define PALMAS_INT2_LINE_STATE_BATREMOVAL_SHIFT 3 +#define PALMAS_INT2_LINE_STATE_WDT 0x04 +#define PALMAS_INT2_LINE_STATE_WDT_SHIFT 2 +#define PALMAS_INT2_LINE_STATE_RTC_TIMER 0x02 +#define PALMAS_INT2_LINE_STATE_RTC_TIMER_SHIFT 1 +#define PALMAS_INT2_LINE_STATE_RTC_ALARM 0x01 +#define PALMAS_INT2_LINE_STATE_RTC_ALARM_SHIFT 0 + +/* Bit definitions for INT3_STATUS */ +#define PALMAS_INT3_STATUS_VBUS 0x80 +#define PALMAS_INT3_STATUS_VBUS_SHIFT 7 +#define PALMAS_INT3_STATUS_VBUS_OTG 0x40 +#define PALMAS_INT3_STATUS_VBUS_OTG_SHIFT 6 +#define PALMAS_INT3_STATUS_ID 0x20 +#define PALMAS_INT3_STATUS_ID_SHIFT 5 +#define PALMAS_INT3_STATUS_ID_OTG 0x10 +#define PALMAS_INT3_STATUS_ID_OTG_SHIFT 4 +#define PALMAS_INT3_STATUS_GPADC_EOC_RT 0x08 +#define PALMAS_INT3_STATUS_GPADC_EOC_RT_SHIFT 3 +#define PALMAS_INT3_STATUS_GPADC_EOC_SW 0x04 +#define PALMAS_INT3_STATUS_GPADC_EOC_SW_SHIFT 2 +#define PALMAS_INT3_STATUS_GPADC_AUTO_1 0x02 +#define PALMAS_INT3_STATUS_GPADC_AUTO_1_SHIFT 1 +#define PALMAS_INT3_STATUS_GPADC_AUTO_0 0x01 +#define PALMAS_INT3_STATUS_GPADC_AUTO_0_SHIFT 0 + +/* Bit definitions for INT3_MASK */ +#define PALMAS_INT3_MASK_VBUS 0x80 +#define PALMAS_INT3_MASK_VBUS_SHIFT 7 +#define PALMAS_INT3_MASK_VBUS_OTG 0x40 +#define PALMAS_INT3_MASK_VBUS_OTG_SHIFT 6 +#define PALMAS_INT3_MASK_ID 0x20 +#define PALMAS_INT3_MASK_ID_SHIFT 5 +#define PALMAS_INT3_MASK_ID_OTG 0x10 +#define PALMAS_INT3_MASK_ID_OTG_SHIFT 4 +#define PALMAS_INT3_MASK_GPADC_EOC_RT 0x08 +#define PALMAS_INT3_MASK_GPADC_EOC_RT_SHIFT 3 +#define PALMAS_INT3_MASK_GPADC_EOC_SW 0x04 +#define PALMAS_INT3_MASK_GPADC_EOC_SW_SHIFT 2 +#define PALMAS_INT3_MASK_GPADC_AUTO_1 0x02 +#define PALMAS_INT3_MASK_GPADC_AUTO_1_SHIFT 1 +#define PALMAS_INT3_MASK_GPADC_AUTO_0 0x01 +#define PALMAS_INT3_MASK_GPADC_AUTO_0_SHIFT 0 + +/* Bit definitions for INT3_LINE_STATE */ +#define PALMAS_INT3_LINE_STATE_VBUS 0x80 +#define PALMAS_INT3_LINE_STATE_VBUS_SHIFT 7 +#define PALMAS_INT3_LINE_STATE_VBUS_OTG 0x40 +#define PALMAS_INT3_LINE_STATE_VBUS_OTG_SHIFT 6 +#define PALMAS_INT3_LINE_STATE_ID 0x20 +#define PALMAS_INT3_LINE_STATE_ID_SHIFT 5 +#define PALMAS_INT3_LINE_STATE_ID_OTG 0x10 +#define PALMAS_INT3_LINE_STATE_ID_OTG_SHIFT 4 +#define PALMAS_INT3_LINE_STATE_GPADC_EOC_RT 0x08 +#define PALMAS_INT3_LINE_STATE_GPADC_EOC_RT_SHIFT 3 +#define PALMAS_INT3_LINE_STATE_GPADC_EOC_SW 0x04 +#define PALMAS_INT3_LINE_STATE_GPADC_EOC_SW_SHIFT 2 +#define PALMAS_INT3_LINE_STATE_GPADC_AUTO_1 0x02 +#define PALMAS_INT3_LINE_STATE_GPADC_AUTO_1_SHIFT 1 +#define PALMAS_INT3_LINE_STATE_GPADC_AUTO_0 0x01 +#define PALMAS_INT3_LINE_STATE_GPADC_AUTO_0_SHIFT 0 + +/* Bit definitions for INT4_STATUS */ +#define PALMAS_INT4_STATUS_GPIO_7 0x80 +#define PALMAS_INT4_STATUS_GPIO_7_SHIFT 7 +#define PALMAS_INT4_STATUS_GPIO_6 0x40 +#define PALMAS_INT4_STATUS_GPIO_6_SHIFT 6 +#define PALMAS_INT4_STATUS_GPIO_5 0x20 +#define PALMAS_INT4_STATUS_GPIO_5_SHIFT 5 +#define PALMAS_INT4_STATUS_GPIO_4 0x10 +#define PALMAS_INT4_STATUS_GPIO_4_SHIFT 4 +#define PALMAS_INT4_STATUS_GPIO_3 0x08 +#define PALMAS_INT4_STATUS_GPIO_3_SHIFT 3 +#define PALMAS_INT4_STATUS_GPIO_2 0x04 +#define PALMAS_INT4_STATUS_GPIO_2_SHIFT 2 +#define PALMAS_INT4_STATUS_GPIO_1 0x02 +#define PALMAS_INT4_STATUS_GPIO_1_SHIFT 1 +#define PALMAS_INT4_STATUS_GPIO_0 0x01 +#define PALMAS_INT4_STATUS_GPIO_0_SHIFT 0 + +/* Bit definitions for INT4_MASK */ +#define PALMAS_INT4_MASK_GPIO_7 0x80 +#define PALMAS_INT4_MASK_GPIO_7_SHIFT 7 +#define PALMAS_INT4_MASK_GPIO_6 0x40 +#define PALMAS_INT4_MASK_GPIO_6_SHIFT 6 +#define PALMAS_INT4_MASK_GPIO_5 0x20 +#define PALMAS_INT4_MASK_GPIO_5_SHIFT 5 +#define PALMAS_INT4_MASK_GPIO_4 0x10 +#define PALMAS_INT4_MASK_GPIO_4_SHIFT 4 +#define PALMAS_INT4_MASK_GPIO_3 0x08 +#define PALMAS_INT4_MASK_GPIO_3_SHIFT 3 +#define PALMAS_INT4_MASK_GPIO_2 0x04 +#define PALMAS_INT4_MASK_GPIO_2_SHIFT 2 +#define PALMAS_INT4_MASK_GPIO_1 0x02 +#define PALMAS_INT4_MASK_GPIO_1_SHIFT 1 +#define PALMAS_INT4_MASK_GPIO_0 0x01 +#define PALMAS_INT4_MASK_GPIO_0_SHIFT 0 + +/* Bit definitions for INT4_LINE_STATE */ +#define PALMAS_INT4_LINE_STATE_GPIO_7 0x80 +#define PALMAS_INT4_LINE_STATE_GPIO_7_SHIFT 7 +#define PALMAS_INT4_LINE_STATE_GPIO_6 0x40 +#define PALMAS_INT4_LINE_STATE_GPIO_6_SHIFT 6 +#define PALMAS_INT4_LINE_STATE_GPIO_5 0x20 +#define PALMAS_INT4_LINE_STATE_GPIO_5_SHIFT 5 +#define PALMAS_INT4_LINE_STATE_GPIO_4 0x10 +#define PALMAS_INT4_LINE_STATE_GPIO_4_SHIFT 4 +#define PALMAS_INT4_LINE_STATE_GPIO_3 0x08 +#define PALMAS_INT4_LINE_STATE_GPIO_3_SHIFT 3 +#define PALMAS_INT4_LINE_STATE_GPIO_2 0x04 +#define PALMAS_INT4_LINE_STATE_GPIO_2_SHIFT 2 +#define PALMAS_INT4_LINE_STATE_GPIO_1 0x02 +#define PALMAS_INT4_LINE_STATE_GPIO_1_SHIFT 1 +#define PALMAS_INT4_LINE_STATE_GPIO_0 0x01 +#define PALMAS_INT4_LINE_STATE_GPIO_0_SHIFT 0 + +/* Bit definitions for INT4_EDGE_DETECT1 */ +#define PALMAS_INT4_EDGE_DETECT1_GPIO_3_RISING 0x80 +#define PALMAS_INT4_EDGE_DETECT1_GPIO_3_RISING_SHIFT 7 +#define PALMAS_INT4_EDGE_DETECT1_GPIO_3_FALLING 0x40 +#define PALMAS_INT4_EDGE_DETECT1_GPIO_3_FALLING_SHIFT 6 +#define PALMAS_INT4_EDGE_DETECT1_GPIO_2_RISING 0x20 +#define PALMAS_INT4_EDGE_DETECT1_GPIO_2_RISING_SHIFT 5 +#define PALMAS_INT4_EDGE_DETECT1_GPIO_2_FALLING 0x10 +#define PALMAS_INT4_EDGE_DETECT1_GPIO_2_FALLING_SHIFT 4 +#define PALMAS_INT4_EDGE_DETECT1_GPIO_1_RISING 0x08 +#define PALMAS_INT4_EDGE_DETECT1_GPIO_1_RISING_SHIFT 3 +#define PALMAS_INT4_EDGE_DETECT1_GPIO_1_FALLING 0x04 +#define PALMAS_INT4_EDGE_DETECT1_GPIO_1_FALLING_SHIFT 2 +#define PALMAS_INT4_EDGE_DETECT1_GPIO_0_RISING 0x02 +#define PALMAS_INT4_EDGE_DETECT1_GPIO_0_RISING_SHIFT 1 +#define PALMAS_INT4_EDGE_DETECT1_GPIO_0_FALLING 0x01 +#define PALMAS_INT4_EDGE_DETECT1_GPIO_0_FALLING_SHIFT 0 + +/* Bit definitions for INT4_EDGE_DETECT2 */ +#define PALMAS_INT4_EDGE_DETECT2_GPIO_7_RISING 0x80 +#define PALMAS_INT4_EDGE_DETECT2_GPIO_7_RISING_SHIFT 7 +#define PALMAS_INT4_EDGE_DETECT2_GPIO_7_FALLING 0x40 +#define PALMAS_INT4_EDGE_DETECT2_GPIO_7_FALLING_SHIFT 6 +#define PALMAS_INT4_EDGE_DETECT2_GPIO_6_RISING 0x20 +#define PALMAS_INT4_EDGE_DETECT2_GPIO_6_RISING_SHIFT 5 +#define PALMAS_INT4_EDGE_DETECT2_GPIO_6_FALLING 0x10 +#define PALMAS_INT4_EDGE_DETECT2_GPIO_6_FALLING_SHIFT 4 +#define PALMAS_INT4_EDGE_DETECT2_GPIO_5_RISING 0x08 +#define PALMAS_INT4_EDGE_DETECT2_GPIO_5_RISING_SHIFT 3 +#define PALMAS_INT4_EDGE_DETECT2_GPIO_5_FALLING 0x04 +#define PALMAS_INT4_EDGE_DETECT2_GPIO_5_FALLING_SHIFT 2 +#define PALMAS_INT4_EDGE_DETECT2_GPIO_4_RISING 0x02 +#define PALMAS_INT4_EDGE_DETECT2_GPIO_4_RISING_SHIFT 1 +#define PALMAS_INT4_EDGE_DETECT2_GPIO_4_FALLING 0x01 +#define PALMAS_INT4_EDGE_DETECT2_GPIO_4_FALLING_SHIFT 0 + +/* Bit definitions for INT_CTRL */ +#define PALMAS_INT_CTRL_INT_PENDING 0x04 +#define PALMAS_INT_CTRL_INT_PENDING_SHIFT 2 +#define PALMAS_INT_CTRL_INT_CLEAR 0x01 +#define PALMAS_INT_CTRL_INT_CLEAR_SHIFT 0 + +/* Registers for function USB_OTG */ +#define PALMAS_USB_WAKEUP 0x3 +#define PALMAS_USB_VBUS_CTRL_SET 0x4 +#define PALMAS_USB_VBUS_CTRL_CLR 0x5 +#define PALMAS_USB_ID_CTRL_SET 0x6 +#define PALMAS_USB_ID_CTRL_CLEAR 0x7 +#define PALMAS_USB_VBUS_INT_SRC 0x8 +#define PALMAS_USB_VBUS_INT_LATCH_SET 0x9 +#define PALMAS_USB_VBUS_INT_LATCH_CLR 0xA +#define PALMAS_USB_VBUS_INT_EN_LO_SET 0xB +#define PALMAS_USB_VBUS_INT_EN_LO_CLR 0xC +#define PALMAS_USB_VBUS_INT_EN_HI_SET 0xD +#define PALMAS_USB_VBUS_INT_EN_HI_CLR 0xE +#define PALMAS_USB_ID_INT_SRC 0xF +#define PALMAS_USB_ID_INT_LATCH_SET 0x10 +#define PALMAS_USB_ID_INT_LATCH_CLR 0x11 +#define PALMAS_USB_ID_INT_EN_LO_SET 0x12 +#define PALMAS_USB_ID_INT_EN_LO_CLR 0x13 +#define PALMAS_USB_ID_INT_EN_HI_SET 0x14 +#define PALMAS_USB_ID_INT_EN_HI_CLR 0x15 +#define PALMAS_USB_OTG_ADP_CTRL 0x16 +#define PALMAS_USB_OTG_ADP_HIGH 0x17 +#define PALMAS_USB_OTG_ADP_LOW 0x18 +#define PALMAS_USB_OTG_ADP_RISE 0x19 +#define PALMAS_USB_OTG_REVISION 0x1A + +/* Bit definitions for USB_WAKEUP */ +#define PALMAS_USB_WAKEUP_ID_WK_UP_COMP 0x01 +#define PALMAS_USB_WAKEUP_ID_WK_UP_COMP_SHIFT 0 + +/* Bit definitions for USB_VBUS_CTRL_SET */ +#define PALMAS_USB_VBUS_CTRL_SET_VBUS_CHRG_VSYS 0x80 +#define PALMAS_USB_VBUS_CTRL_SET_VBUS_CHRG_VSYS_SHIFT 7 +#define PALMAS_USB_VBUS_CTRL_SET_VBUS_DISCHRG 0x20 +#define PALMAS_USB_VBUS_CTRL_SET_VBUS_DISCHRG_SHIFT 5 +#define PALMAS_USB_VBUS_CTRL_SET_VBUS_IADP_SRC 0x10 +#define PALMAS_USB_VBUS_CTRL_SET_VBUS_IADP_SRC_SHIFT 4 +#define PALMAS_USB_VBUS_CTRL_SET_VBUS_IADP_SINK 0x08 +#define PALMAS_USB_VBUS_CTRL_SET_VBUS_IADP_SINK_SHIFT 3 +#define PALMAS_USB_VBUS_CTRL_SET_VBUS_ACT_COMP 0x04 +#define PALMAS_USB_VBUS_CTRL_SET_VBUS_ACT_COMP_SHIFT 2 + +/* Bit definitions for USB_VBUS_CTRL_CLR */ +#define PALMAS_USB_VBUS_CTRL_CLR_VBUS_CHRG_VSYS 0x80 +#define PALMAS_USB_VBUS_CTRL_CLR_VBUS_CHRG_VSYS_SHIFT 7 +#define PALMAS_USB_VBUS_CTRL_CLR_VBUS_DISCHRG 0x20 +#define PALMAS_USB_VBUS_CTRL_CLR_VBUS_DISCHRG_SHIFT 5 +#define PALMAS_USB_VBUS_CTRL_CLR_VBUS_IADP_SRC 0x10 +#define PALMAS_USB_VBUS_CTRL_CLR_VBUS_IADP_SRC_SHIFT 4 +#define PALMAS_USB_VBUS_CTRL_CLR_VBUS_IADP_SINK 0x08 +#define PALMAS_USB_VBUS_CTRL_CLR_VBUS_IADP_SINK_SHIFT 3 +#define PALMAS_USB_VBUS_CTRL_CLR_VBUS_ACT_COMP 0x04 +#define PALMAS_USB_VBUS_CTRL_CLR_VBUS_ACT_COMP_SHIFT 2 + +/* Bit definitions for USB_ID_CTRL_SET */ +#define PALMAS_USB_ID_CTRL_SET_ID_PU_220K 0x80 +#define PALMAS_USB_ID_CTRL_SET_ID_PU_220K_SHIFT 7 +#define PALMAS_USB_ID_CTRL_SET_ID_PU_100K 0x40 +#define PALMAS_USB_ID_CTRL_SET_ID_PU_100K_SHIFT 6 +#define PALMAS_USB_ID_CTRL_SET_ID_GND_DRV 0x20 +#define PALMAS_USB_ID_CTRL_SET_ID_GND_DRV_SHIFT 5 +#define PALMAS_USB_ID_CTRL_SET_ID_SRC_16U 0x10 +#define PALMAS_USB_ID_CTRL_SET_ID_SRC_16U_SHIFT 4 +#define PALMAS_USB_ID_CTRL_SET_ID_SRC_5U 0x08 +#define PALMAS_USB_ID_CTRL_SET_ID_SRC_5U_SHIFT 3 +#define PALMAS_USB_ID_CTRL_SET_ID_ACT_COMP 0x04 +#define PALMAS_USB_ID_CTRL_SET_ID_ACT_COMP_SHIFT 2 + +/* Bit definitions for USB_ID_CTRL_CLEAR */ +#define PALMAS_USB_ID_CTRL_CLEAR_ID_PU_220K 0x80 +#define PALMAS_USB_ID_CTRL_CLEAR_ID_PU_220K_SHIFT 7 +#define PALMAS_USB_ID_CTRL_CLEAR_ID_PU_100K 0x40 +#define PALMAS_USB_ID_CTRL_CLEAR_ID_PU_100K_SHIFT 6 +#define PALMAS_USB_ID_CTRL_CLEAR_ID_GND_DRV 0x20 +#define PALMAS_USB_ID_CTRL_CLEAR_ID_GND_DRV_SHIFT 5 +#define PALMAS_USB_ID_CTRL_CLEAR_ID_SRC_16U 0x10 +#define PALMAS_USB_ID_CTRL_CLEAR_ID_SRC_16U_SHIFT 4 +#define PALMAS_USB_ID_CTRL_CLEAR_ID_SRC_5U 0x08 +#define PALMAS_USB_ID_CTRL_CLEAR_ID_SRC_5U_SHIFT 3 +#define PALMAS_USB_ID_CTRL_CLEAR_ID_ACT_COMP 0x04 +#define PALMAS_USB_ID_CTRL_CLEAR_ID_ACT_COMP_SHIFT 2 + +/* Bit definitions for USB_VBUS_INT_SRC */ +#define PALMAS_USB_VBUS_INT_SRC_VOTG_SESS_VLD 0x80 +#define PALMAS_USB_VBUS_INT_SRC_VOTG_SESS_VLD_SHIFT 7 +#define PALMAS_USB_VBUS_INT_SRC_VADP_PRB 0x40 +#define PALMAS_USB_VBUS_INT_SRC_VADP_PRB_SHIFT 6 +#define PALMAS_USB_VBUS_INT_SRC_VADP_SNS 0x20 +#define PALMAS_USB_VBUS_INT_SRC_VADP_SNS_SHIFT 5 +#define PALMAS_USB_VBUS_INT_SRC_VA_VBUS_VLD 0x08 +#define PALMAS_USB_VBUS_INT_SRC_VA_VBUS_VLD_SHIFT 3 +#define PALMAS_USB_VBUS_INT_SRC_VA_SESS_VLD 0x04 +#define PALMAS_USB_VBUS_INT_SRC_VA_SESS_VLD_SHIFT 2 +#define PALMAS_USB_VBUS_INT_SRC_VB_SESS_VLD 0x02 +#define PALMAS_USB_VBUS_INT_SRC_VB_SESS_VLD_SHIFT 1 +#define PALMAS_USB_VBUS_INT_SRC_VB_SESS_END 0x01 +#define PALMAS_USB_VBUS_INT_SRC_VB_SESS_END_SHIFT 0 + +/* Bit definitions for USB_VBUS_INT_LATCH_SET */ +#define PALMAS_USB_VBUS_INT_LATCH_SET_VOTG_SESS_VLD 0x80 +#define PALMAS_USB_VBUS_INT_LATCH_SET_VOTG_SESS_VLD_SHIFT 7 +#define PALMAS_USB_VBUS_INT_LATCH_SET_VADP_PRB 0x40 +#define PALMAS_USB_VBUS_INT_LATCH_SET_VADP_PRB_SHIFT 6 +#define PALMAS_USB_VBUS_INT_LATCH_SET_VADP_SNS 0x20 +#define PALMAS_USB_VBUS_INT_LATCH_SET_VADP_SNS_SHIFT 5 +#define PALMAS_USB_VBUS_INT_LATCH_SET_ADP 0x10 +#define PALMAS_USB_VBUS_INT_LATCH_SET_ADP_SHIFT 4 +#define PALMAS_USB_VBUS_INT_LATCH_SET_VA_VBUS_VLD 0x08 +#define PALMAS_USB_VBUS_INT_LATCH_SET_VA_VBUS_VLD_SHIFT 3 +#define PALMAS_USB_VBUS_INT_LATCH_SET_VA_SESS_VLD 0x04 +#define PALMAS_USB_VBUS_INT_LATCH_SET_VA_SESS_VLD_SHIFT 2 +#define PALMAS_USB_VBUS_INT_LATCH_SET_VB_SESS_VLD 0x02 +#define PALMAS_USB_VBUS_INT_LATCH_SET_VB_SESS_VLD_SHIFT 1 +#define PALMAS_USB_VBUS_INT_LATCH_SET_VB_SESS_END 0x01 +#define PALMAS_USB_VBUS_INT_LATCH_SET_VB_SESS_END_SHIFT 0 + +/* Bit definitions for USB_VBUS_INT_LATCH_CLR */ +#define PALMAS_USB_VBUS_INT_LATCH_CLR_VOTG_SESS_VLD 0x80 +#define PALMAS_USB_VBUS_INT_LATCH_CLR_VOTG_SESS_VLD_SHIFT 7 +#define PALMAS_USB_VBUS_INT_LATCH_CLR_VADP_PRB 0x40 +#define PALMAS_USB_VBUS_INT_LATCH_CLR_VADP_PRB_SHIFT 6 +#define PALMAS_USB_VBUS_INT_LATCH_CLR_VADP_SNS 0x20 +#define PALMAS_USB_VBUS_INT_LATCH_CLR_VADP_SNS_SHIFT 5 +#define PALMAS_USB_VBUS_INT_LATCH_CLR_ADP 0x10 +#define PALMAS_USB_VBUS_INT_LATCH_CLR_ADP_SHIFT 4 +#define PALMAS_USB_VBUS_INT_LATCH_CLR_VA_VBUS_VLD 0x08 +#define PALMAS_USB_VBUS_INT_LATCH_CLR_VA_VBUS_VLD_SHIFT 3 +#define PALMAS_USB_VBUS_INT_LATCH_CLR_VA_SESS_VLD 0x04 +#define PALMAS_USB_VBUS_INT_LATCH_CLR_VA_SESS_VLD_SHIFT 2 +#define PALMAS_USB_VBUS_INT_LATCH_CLR_VB_SESS_VLD 0x02 +#define PALMAS_USB_VBUS_INT_LATCH_CLR_VB_SESS_VLD_SHIFT 1 +#define PALMAS_USB_VBUS_INT_LATCH_CLR_VB_SESS_END 0x01 +#define PALMAS_USB_VBUS_INT_LATCH_CLR_VB_SESS_END_SHIFT 0 + +/* Bit definitions for USB_VBUS_INT_EN_LO_SET */ +#define PALMAS_USB_VBUS_INT_EN_LO_SET_VOTG_SESS_VLD 0x80 +#define PALMAS_USB_VBUS_INT_EN_LO_SET_VOTG_SESS_VLD_SHIFT 7 +#define PALMAS_USB_VBUS_INT_EN_LO_SET_VADP_PRB 0x40 +#define PALMAS_USB_VBUS_INT_EN_LO_SET_VADP_PRB_SHIFT 6 +#define PALMAS_USB_VBUS_INT_EN_LO_SET_VADP_SNS 0x20 +#define PALMAS_USB_VBUS_INT_EN_LO_SET_VADP_SNS_SHIFT 5 +#define PALMAS_USB_VBUS_INT_EN_LO_SET_VA_VBUS_VLD 0x08 +#define PALMAS_USB_VBUS_INT_EN_LO_SET_VA_VBUS_VLD_SHIFT 3 +#define PALMAS_USB_VBUS_INT_EN_LO_SET_VA_SESS_VLD 0x04 +#define PALMAS_USB_VBUS_INT_EN_LO_SET_VA_SESS_VLD_SHIFT 2 +#define PALMAS_USB_VBUS_INT_EN_LO_SET_VB_SESS_VLD 0x02 +#define PALMAS_USB_VBUS_INT_EN_LO_SET_VB_SESS_VLD_SHIFT 1 +#define PALMAS_USB_VBUS_INT_EN_LO_SET_VB_SESS_END 0x01 +#define PALMAS_USB_VBUS_INT_EN_LO_SET_VB_SESS_END_SHIFT 0 + +/* Bit definitions for USB_VBUS_INT_EN_LO_CLR */ +#define PALMAS_USB_VBUS_INT_EN_LO_CLR_VOTG_SESS_VLD 0x80 +#define PALMAS_USB_VBUS_INT_EN_LO_CLR_VOTG_SESS_VLD_SHIFT 7 +#define PALMAS_USB_VBUS_INT_EN_LO_CLR_VADP_PRB 0x40 +#define PALMAS_USB_VBUS_INT_EN_LO_CLR_VADP_PRB_SHIFT 6 +#define PALMAS_USB_VBUS_INT_EN_LO_CLR_VADP_SNS 0x20 +#define PALMAS_USB_VBUS_INT_EN_LO_CLR_VADP_SNS_SHIFT 5 +#define PALMAS_USB_VBUS_INT_EN_LO_CLR_VA_VBUS_VLD 0x08 +#define PALMAS_USB_VBUS_INT_EN_LO_CLR_VA_VBUS_VLD_SHIFT 3 +#define PALMAS_USB_VBUS_INT_EN_LO_CLR_VA_SESS_VLD 0x04 +#define PALMAS_USB_VBUS_INT_EN_LO_CLR_VA_SESS_VLD_SHIFT 2 +#define PALMAS_USB_VBUS_INT_EN_LO_CLR_VB_SESS_VLD 0x02 +#define PALMAS_USB_VBUS_INT_EN_LO_CLR_VB_SESS_VLD_SHIFT 1 +#define PALMAS_USB_VBUS_INT_EN_LO_CLR_VB_SESS_END 0x01 +#define PALMAS_USB_VBUS_INT_EN_LO_CLR_VB_SESS_END_SHIFT 0 + +/* Bit definitions for USB_VBUS_INT_EN_HI_SET */ +#define PALMAS_USB_VBUS_INT_EN_HI_SET_VOTG_SESS_VLD 0x80 +#define PALMAS_USB_VBUS_INT_EN_HI_SET_VOTG_SESS_VLD_SHIFT 7 +#define PALMAS_USB_VBUS_INT_EN_HI_SET_VADP_PRB 0x40 +#define PALMAS_USB_VBUS_INT_EN_HI_SET_VADP_PRB_SHIFT 6 +#define PALMAS_USB_VBUS_INT_EN_HI_SET_VADP_SNS 0x20 +#define PALMAS_USB_VBUS_INT_EN_HI_SET_VADP_SNS_SHIFT 5 +#define PALMAS_USB_VBUS_INT_EN_HI_SET_ADP 0x10 +#define PALMAS_USB_VBUS_INT_EN_HI_SET_ADP_SHIFT 4 +#define PALMAS_USB_VBUS_INT_EN_HI_SET_VA_VBUS_VLD 0x08 +#define PALMAS_USB_VBUS_INT_EN_HI_SET_VA_VBUS_VLD_SHIFT 3 +#define PALMAS_USB_VBUS_INT_EN_HI_SET_VA_SESS_VLD 0x04 +#define PALMAS_USB_VBUS_INT_EN_HI_SET_VA_SESS_VLD_SHIFT 2 +#define PALMAS_USB_VBUS_INT_EN_HI_SET_VB_SESS_VLD 0x02 +#define PALMAS_USB_VBUS_INT_EN_HI_SET_VB_SESS_VLD_SHIFT 1 +#define PALMAS_USB_VBUS_INT_EN_HI_SET_VB_SESS_END 0x01 +#define PALMAS_USB_VBUS_INT_EN_HI_SET_VB_SESS_END_SHIFT 0 + +/* Bit definitions for USB_VBUS_INT_EN_HI_CLR */ +#define PALMAS_USB_VBUS_INT_EN_HI_CLR_VOTG_SESS_VLD 0x80 +#define PALMAS_USB_VBUS_INT_EN_HI_CLR_VOTG_SESS_VLD_SHIFT 7 +#define PALMAS_USB_VBUS_INT_EN_HI_CLR_VADP_PRB 0x40 +#define PALMAS_USB_VBUS_INT_EN_HI_CLR_VADP_PRB_SHIFT 6 +#define PALMAS_USB_VBUS_INT_EN_HI_CLR_VADP_SNS 0x20 +#define PALMAS_USB_VBUS_INT_EN_HI_CLR_VADP_SNS_SHIFT 5 +#define PALMAS_USB_VBUS_INT_EN_HI_CLR_ADP 0x10 +#define PALMAS_USB_VBUS_INT_EN_HI_CLR_ADP_SHIFT 4 +#define PALMAS_USB_VBUS_INT_EN_HI_CLR_VA_VBUS_VLD 0x08 +#define PALMAS_USB_VBUS_INT_EN_HI_CLR_VA_VBUS_VLD_SHIFT 3 +#define PALMAS_USB_VBUS_INT_EN_HI_CLR_VA_SESS_VLD 0x04 +#define PALMAS_USB_VBUS_INT_EN_HI_CLR_VA_SESS_VLD_SHIFT 2 +#define PALMAS_USB_VBUS_INT_EN_HI_CLR_VB_SESS_VLD 0x02 +#define PALMAS_USB_VBUS_INT_EN_HI_CLR_VB_SESS_VLD_SHIFT 1 +#define PALMAS_USB_VBUS_INT_EN_HI_CLR_VB_SESS_END 0x01 +#define PALMAS_USB_VBUS_INT_EN_HI_CLR_VB_SESS_END_SHIFT 0 + +/* Bit definitions for USB_ID_INT_SRC */ +#define PALMAS_USB_ID_INT_SRC_ID_FLOAT 0x10 +#define PALMAS_USB_ID_INT_SRC_ID_FLOAT_SHIFT 4 +#define PALMAS_USB_ID_INT_SRC_ID_A 0x08 +#define PALMAS_USB_ID_INT_SRC_ID_A_SHIFT 3 +#define PALMAS_USB_ID_INT_SRC_ID_B 0x04 +#define PALMAS_USB_ID_INT_SRC_ID_B_SHIFT 2 +#define PALMAS_USB_ID_INT_SRC_ID_C 0x02 +#define PALMAS_USB_ID_INT_SRC_ID_C_SHIFT 1 +#define PALMAS_USB_ID_INT_SRC_ID_GND 0x01 +#define PALMAS_USB_ID_INT_SRC_ID_GND_SHIFT 0 + +/* Bit definitions for USB_ID_INT_LATCH_SET */ +#define PALMAS_USB_ID_INT_LATCH_SET_ID_FLOAT 0x10 +#define PALMAS_USB_ID_INT_LATCH_SET_ID_FLOAT_SHIFT 4 +#define PALMAS_USB_ID_INT_LATCH_SET_ID_A 0x08 +#define PALMAS_USB_ID_INT_LATCH_SET_ID_A_SHIFT 3 +#define PALMAS_USB_ID_INT_LATCH_SET_ID_B 0x04 +#define PALMAS_USB_ID_INT_LATCH_SET_ID_B_SHIFT 2 +#define PALMAS_USB_ID_INT_LATCH_SET_ID_C 0x02 +#define PALMAS_USB_ID_INT_LATCH_SET_ID_C_SHIFT 1 +#define PALMAS_USB_ID_INT_LATCH_SET_ID_GND 0x01 +#define PALMAS_USB_ID_INT_LATCH_SET_ID_GND_SHIFT 0 + +/* Bit definitions for USB_ID_INT_LATCH_CLR */ +#define PALMAS_USB_ID_INT_LATCH_CLR_ID_FLOAT 0x10 +#define PALMAS_USB_ID_INT_LATCH_CLR_ID_FLOAT_SHIFT 4 +#define PALMAS_USB_ID_INT_LATCH_CLR_ID_A 0x08 +#define PALMAS_USB_ID_INT_LATCH_CLR_ID_A_SHIFT 3 +#define PALMAS_USB_ID_INT_LATCH_CLR_ID_B 0x04 +#define PALMAS_USB_ID_INT_LATCH_CLR_ID_B_SHIFT 2 +#define PALMAS_USB_ID_INT_LATCH_CLR_ID_C 0x02 +#define PALMAS_USB_ID_INT_LATCH_CLR_ID_C_SHIFT 1 +#define PALMAS_USB_ID_INT_LATCH_CLR_ID_GND 0x01 +#define PALMAS_USB_ID_INT_LATCH_CLR_ID_GND_SHIFT 0 + +/* Bit definitions for USB_ID_INT_EN_LO_SET */ +#define PALMAS_USB_ID_INT_EN_LO_SET_ID_FLOAT 0x10 +#define PALMAS_USB_ID_INT_EN_LO_SET_ID_FLOAT_SHIFT 4 +#define PALMAS_USB_ID_INT_EN_LO_SET_ID_A 0x08 +#define PALMAS_USB_ID_INT_EN_LO_SET_ID_A_SHIFT 3 +#define PALMAS_USB_ID_INT_EN_LO_SET_ID_B 0x04 +#define PALMAS_USB_ID_INT_EN_LO_SET_ID_B_SHIFT 2 +#define PALMAS_USB_ID_INT_EN_LO_SET_ID_C 0x02 +#define PALMAS_USB_ID_INT_EN_LO_SET_ID_C_SHIFT 1 +#define PALMAS_USB_ID_INT_EN_LO_SET_ID_GND 0x01 +#define PALMAS_USB_ID_INT_EN_LO_SET_ID_GND_SHIFT 0 + +/* Bit definitions for USB_ID_INT_EN_LO_CLR */ +#define PALMAS_USB_ID_INT_EN_LO_CLR_ID_FLOAT 0x10 +#define PALMAS_USB_ID_INT_EN_LO_CLR_ID_FLOAT_SHIFT 4 +#define PALMAS_USB_ID_INT_EN_LO_CLR_ID_A 0x08 +#define PALMAS_USB_ID_INT_EN_LO_CLR_ID_A_SHIFT 3 +#define PALMAS_USB_ID_INT_EN_LO_CLR_ID_B 0x04 +#define PALMAS_USB_ID_INT_EN_LO_CLR_ID_B_SHIFT 2 +#define PALMAS_USB_ID_INT_EN_LO_CLR_ID_C 0x02 +#define PALMAS_USB_ID_INT_EN_LO_CLR_ID_C_SHIFT 1 +#define PALMAS_USB_ID_INT_EN_LO_CLR_ID_GND 0x01 +#define PALMAS_USB_ID_INT_EN_LO_CLR_ID_GND_SHIFT 0 + +/* Bit definitions for USB_ID_INT_EN_HI_SET */ +#define PALMAS_USB_ID_INT_EN_HI_SET_ID_FLOAT 0x10 +#define PALMAS_USB_ID_INT_EN_HI_SET_ID_FLOAT_SHIFT 4 +#define PALMAS_USB_ID_INT_EN_HI_SET_ID_A 0x08 +#define PALMAS_USB_ID_INT_EN_HI_SET_ID_A_SHIFT 3 +#define PALMAS_USB_ID_INT_EN_HI_SET_ID_B 0x04 +#define PALMAS_USB_ID_INT_EN_HI_SET_ID_B_SHIFT 2 +#define PALMAS_USB_ID_INT_EN_HI_SET_ID_C 0x02 +#define PALMAS_USB_ID_INT_EN_HI_SET_ID_C_SHIFT 1 +#define PALMAS_USB_ID_INT_EN_HI_SET_ID_GND 0x01 +#define PALMAS_USB_ID_INT_EN_HI_SET_ID_GND_SHIFT 0 + +/* Bit definitions for USB_ID_INT_EN_HI_CLR */ +#define PALMAS_USB_ID_INT_EN_HI_CLR_ID_FLOAT 0x10 +#define PALMAS_USB_ID_INT_EN_HI_CLR_ID_FLOAT_SHIFT 4 +#define PALMAS_USB_ID_INT_EN_HI_CLR_ID_A 0x08 +#define PALMAS_USB_ID_INT_EN_HI_CLR_ID_A_SHIFT 3 +#define PALMAS_USB_ID_INT_EN_HI_CLR_ID_B 0x04 +#define PALMAS_USB_ID_INT_EN_HI_CLR_ID_B_SHIFT 2 +#define PALMAS_USB_ID_INT_EN_HI_CLR_ID_C 0x02 +#define PALMAS_USB_ID_INT_EN_HI_CLR_ID_C_SHIFT 1 +#define PALMAS_USB_ID_INT_EN_HI_CLR_ID_GND 0x01 +#define PALMAS_USB_ID_INT_EN_HI_CLR_ID_GND_SHIFT 0 + +/* Bit definitions for USB_OTG_ADP_CTRL */ +#define PALMAS_USB_OTG_ADP_CTRL_ADP_EN 0x04 +#define PALMAS_USB_OTG_ADP_CTRL_ADP_EN_SHIFT 2 +#define PALMAS_USB_OTG_ADP_CTRL_ADP_MODE_MASK 0x03 +#define PALMAS_USB_OTG_ADP_CTRL_ADP_MODE_SHIFT 0 + +/* Bit definitions for USB_OTG_ADP_HIGH */ +#define PALMAS_USB_OTG_ADP_HIGH_T_ADP_HIGH_MASK 0xff +#define PALMAS_USB_OTG_ADP_HIGH_T_ADP_HIGH_SHIFT 0 + +/* Bit definitions for USB_OTG_ADP_LOW */ +#define PALMAS_USB_OTG_ADP_LOW_T_ADP_LOW_MASK 0xff +#define PALMAS_USB_OTG_ADP_LOW_T_ADP_LOW_SHIFT 0 + +/* Bit definitions for USB_OTG_ADP_RISE */ +#define PALMAS_USB_OTG_ADP_RISE_T_ADP_RISE_MASK 0xff +#define PALMAS_USB_OTG_ADP_RISE_T_ADP_RISE_SHIFT 0 + +/* Bit definitions for USB_OTG_REVISION */ +#define PALMAS_USB_OTG_REVISION_OTG_REV 0x01 +#define PALMAS_USB_OTG_REVISION_OTG_REV_SHIFT 0 + +/* Registers for function VIBRATOR */ +#define PALMAS_VIBRA_CTRL 0x0 + +/* Bit definitions for VIBRA_CTRL */ +#define PALMAS_VIBRA_CTRL_PWM_DUTY_SEL_MASK 0x06 +#define PALMAS_VIBRA_CTRL_PWM_DUTY_SEL_SHIFT 1 +#define PALMAS_VIBRA_CTRL_PWM_FREQ_SEL 0x01 +#define PALMAS_VIBRA_CTRL_PWM_FREQ_SEL_SHIFT 0 + +/* Registers for function GPIO */ +#define PALMAS_GPIO_DATA_IN 0x0 +#define PALMAS_GPIO_DATA_DIR 0x1 +#define PALMAS_GPIO_DATA_OUT 0x2 +#define PALMAS_GPIO_DEBOUNCE_EN 0x3 +#define PALMAS_GPIO_CLEAR_DATA_OUT 0x4 +#define PALMAS_GPIO_SET_DATA_OUT 0x5 +#define PALMAS_PU_PD_GPIO_CTRL1 0x6 +#define PALMAS_PU_PD_GPIO_CTRL2 0x7 +#define PALMAS_OD_OUTPUT_GPIO_CTRL 0x8 + +/* Bit definitions for GPIO_DATA_IN */ +#define PALMAS_GPIO_DATA_IN_GPIO_7_IN 0x80 +#define PALMAS_GPIO_DATA_IN_GPIO_7_IN_SHIFT 7 +#define PALMAS_GPIO_DATA_IN_GPIO_6_IN 0x40 +#define PALMAS_GPIO_DATA_IN_GPIO_6_IN_SHIFT 6 +#define PALMAS_GPIO_DATA_IN_GPIO_5_IN 0x20 +#define PALMAS_GPIO_DATA_IN_GPIO_5_IN_SHIFT 5 +#define PALMAS_GPIO_DATA_IN_GPIO_4_IN 0x10 +#define PALMAS_GPIO_DATA_IN_GPIO_4_IN_SHIFT 4 +#define PALMAS_GPIO_DATA_IN_GPIO_3_IN 0x08 +#define PALMAS_GPIO_DATA_IN_GPIO_3_IN_SHIFT 3 +#define PALMAS_GPIO_DATA_IN_GPIO_2_IN 0x04 +#define PALMAS_GPIO_DATA_IN_GPIO_2_IN_SHIFT 2 +#define PALMAS_GPIO_DATA_IN_GPIO_1_IN 0x02 +#define PALMAS_GPIO_DATA_IN_GPIO_1_IN_SHIFT 1 +#define PALMAS_GPIO_DATA_IN_GPIO_0_IN 0x01 +#define PALMAS_GPIO_DATA_IN_GPIO_0_IN_SHIFT 0 + +/* Bit definitions for GPIO_DATA_DIR */ +#define PALMAS_GPIO_DATA_DIR_GPIO_7_DIR 0x80 +#define PALMAS_GPIO_DATA_DIR_GPIO_7_DIR_SHIFT 7 +#define PALMAS_GPIO_DATA_DIR_GPIO_6_DIR 0x40 +#define PALMAS_GPIO_DATA_DIR_GPIO_6_DIR_SHIFT 6 +#define PALMAS_GPIO_DATA_DIR_GPIO_5_DIR 0x20 +#define PALMAS_GPIO_DATA_DIR_GPIO_5_DIR_SHIFT 5 +#define PALMAS_GPIO_DATA_DIR_GPIO_4_DIR 0x10 +#define PALMAS_GPIO_DATA_DIR_GPIO_4_DIR_SHIFT 4 +#define PALMAS_GPIO_DATA_DIR_GPIO_3_DIR 0x08 +#define PALMAS_GPIO_DATA_DIR_GPIO_3_DIR_SHIFT 3 +#define PALMAS_GPIO_DATA_DIR_GPIO_2_DIR 0x04 +#define PALMAS_GPIO_DATA_DIR_GPIO_2_DIR_SHIFT 2 +#define PALMAS_GPIO_DATA_DIR_GPIO_1_DIR 0x02 +#define PALMAS_GPIO_DATA_DIR_GPIO_1_DIR_SHIFT 1 +#define PALMAS_GPIO_DATA_DIR_GPIO_0_DIR 0x01 +#define PALMAS_GPIO_DATA_DIR_GPIO_0_DIR_SHIFT 0 + +/* Bit definitions for GPIO_DATA_OUT */ +#define PALMAS_GPIO_DATA_OUT_GPIO_7_OUT 0x80 +#define PALMAS_GPIO_DATA_OUT_GPIO_7_OUT_SHIFT 7 +#define PALMAS_GPIO_DATA_OUT_GPIO_6_OUT 0x40 +#define PALMAS_GPIO_DATA_OUT_GPIO_6_OUT_SHIFT 6 +#define PALMAS_GPIO_DATA_OUT_GPIO_5_OUT 0x20 +#define PALMAS_GPIO_DATA_OUT_GPIO_5_OUT_SHIFT 5 +#define PALMAS_GPIO_DATA_OUT_GPIO_4_OUT 0x10 +#define PALMAS_GPIO_DATA_OUT_GPIO_4_OUT_SHIFT 4 +#define PALMAS_GPIO_DATA_OUT_GPIO_3_OUT 0x08 +#define PALMAS_GPIO_DATA_OUT_GPIO_3_OUT_SHIFT 3 +#define PALMAS_GPIO_DATA_OUT_GPIO_2_OUT 0x04 +#define PALMAS_GPIO_DATA_OUT_GPIO_2_OUT_SHIFT 2 +#define PALMAS_GPIO_DATA_OUT_GPIO_1_OUT 0x02 +#define PALMAS_GPIO_DATA_OUT_GPIO_1_OUT_SHIFT 1 +#define PALMAS_GPIO_DATA_OUT_GPIO_0_OUT 0x01 +#define PALMAS_GPIO_DATA_OUT_GPIO_0_OUT_SHIFT 0 + +/* Bit definitions for GPIO_DEBOUNCE_EN */ +#define PALMAS_GPIO_DEBOUNCE_EN_GPIO_7_DEBOUNCE_EN 0x80 +#define PALMAS_GPIO_DEBOUNCE_EN_GPIO_7_DEBOUNCE_EN_SHIFT 7 +#define PALMAS_GPIO_DEBOUNCE_EN_GPIO_6_DEBOUNCE_EN 0x40 +#define PALMAS_GPIO_DEBOUNCE_EN_GPIO_6_DEBOUNCE_EN_SHIFT 6 +#define PALMAS_GPIO_DEBOUNCE_EN_GPIO_5_DEBOUNCE_EN 0x20 +#define PALMAS_GPIO_DEBOUNCE_EN_GPIO_5_DEBOUNCE_EN_SHIFT 5 +#define PALMAS_GPIO_DEBOUNCE_EN_GPIO_4_DEBOUNCE_EN 0x10 +#define PALMAS_GPIO_DEBOUNCE_EN_GPIO_4_DEBOUNCE_EN_SHIFT 4 +#define PALMAS_GPIO_DEBOUNCE_EN_GPIO_3_DEBOUNCE_EN 0x08 +#define PALMAS_GPIO_DEBOUNCE_EN_GPIO_3_DEBOUNCE_EN_SHIFT 3 +#define PALMAS_GPIO_DEBOUNCE_EN_GPIO_2_DEBOUNCE_EN 0x04 +#define PALMAS_GPIO_DEBOUNCE_EN_GPIO_2_DEBOUNCE_EN_SHIFT 2 +#define PALMAS_GPIO_DEBOUNCE_EN_GPIO_1_DEBOUNCE_EN 0x02 +#define PALMAS_GPIO_DEBOUNCE_EN_GPIO_1_DEBOUNCE_EN_SHIFT 1 +#define PALMAS_GPIO_DEBOUNCE_EN_GPIO_0_DEBOUNCE_EN 0x01 +#define PALMAS_GPIO_DEBOUNCE_EN_GPIO_0_DEBOUNCE_EN_SHIFT 0 + +/* Bit definitions for GPIO_CLEAR_DATA_OUT */ +#define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_7_CLEAR_DATA_OUT 0x80 +#define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_7_CLEAR_DATA_OUT_SHIFT 7 +#define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_6_CLEAR_DATA_OUT 0x40 +#define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_6_CLEAR_DATA_OUT_SHIFT 6 +#define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_5_CLEAR_DATA_OUT 0x20 +#define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_5_CLEAR_DATA_OUT_SHIFT 5 +#define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_4_CLEAR_DATA_OUT 0x10 +#define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_4_CLEAR_DATA_OUT_SHIFT 4 +#define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_3_CLEAR_DATA_OUT 0x08 +#define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_3_CLEAR_DATA_OUT_SHIFT 3 +#define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_2_CLEAR_DATA_OUT 0x04 +#define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_2_CLEAR_DATA_OUT_SHIFT 2 +#define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_1_CLEAR_DATA_OUT 0x02 +#define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_1_CLEAR_DATA_OUT_SHIFT 1 +#define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_0_CLEAR_DATA_OUT 0x01 +#define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_0_CLEAR_DATA_OUT_SHIFT 0 + +/* Bit definitions for GPIO_SET_DATA_OUT */ +#define PALMAS_GPIO_SET_DATA_OUT_GPIO_7_SET_DATA_OUT 0x80 +#define PALMAS_GPIO_SET_DATA_OUT_GPIO_7_SET_DATA_OUT_SHIFT 7 +#define PALMAS_GPIO_SET_DATA_OUT_GPIO_6_SET_DATA_OUT 0x40 +#define PALMAS_GPIO_SET_DATA_OUT_GPIO_6_SET_DATA_OUT_SHIFT 6 +#define PALMAS_GPIO_SET_DATA_OUT_GPIO_5_SET_DATA_OUT 0x20 +#define PALMAS_GPIO_SET_DATA_OUT_GPIO_5_SET_DATA_OUT_SHIFT 5 +#define PALMAS_GPIO_SET_DATA_OUT_GPIO_4_SET_DATA_OUT 0x10 +#define PALMAS_GPIO_SET_DATA_OUT_GPIO_4_SET_DATA_OUT_SHIFT 4 +#define PALMAS_GPIO_SET_DATA_OUT_GPIO_3_SET_DATA_OUT 0x08 +#define PALMAS_GPIO_SET_DATA_OUT_GPIO_3_SET_DATA_OUT_SHIFT 3 +#define PALMAS_GPIO_SET_DATA_OUT_GPIO_2_SET_DATA_OUT 0x04 +#define PALMAS_GPIO_SET_DATA_OUT_GPIO_2_SET_DATA_OUT_SHIFT 2 +#define PALMAS_GPIO_SET_DATA_OUT_GPIO_1_SET_DATA_OUT 0x02 +#define PALMAS_GPIO_SET_DATA_OUT_GPIO_1_SET_DATA_OUT_SHIFT 1 +#define PALMAS_GPIO_SET_DATA_OUT_GPIO_0_SET_DATA_OUT 0x01 +#define PALMAS_GPIO_SET_DATA_OUT_GPIO_0_SET_DATA_OUT_SHIFT 0 + +/* Bit definitions for PU_PD_GPIO_CTRL1 */ +#define PALMAS_PU_PD_GPIO_CTRL1_GPIO_3_PD 0x40 +#define PALMAS_PU_PD_GPIO_CTRL1_GPIO_3_PD_SHIFT 6 +#define PALMAS_PU_PD_GPIO_CTRL1_GPIO_2_PU 0x20 +#define PALMAS_PU_PD_GPIO_CTRL1_GPIO_2_PU_SHIFT 5 +#define PALMAS_PU_PD_GPIO_CTRL1_GPIO_2_PD 0x10 +#define PALMAS_PU_PD_GPIO_CTRL1_GPIO_2_PD_SHIFT 4 +#define PALMAS_PU_PD_GPIO_CTRL1_GPIO_1_PU 0x08 +#define PALMAS_PU_PD_GPIO_CTRL1_GPIO_1_PU_SHIFT 3 +#define PALMAS_PU_PD_GPIO_CTRL1_GPIO_1_PD 0x04 +#define PALMAS_PU_PD_GPIO_CTRL1_GPIO_1_PD_SHIFT 2 +#define PALMAS_PU_PD_GPIO_CTRL1_GPIO_0_PD 0x01 +#define PALMAS_PU_PD_GPIO_CTRL1_GPIO_0_PD_SHIFT 0 + +/* Bit definitions for PU_PD_GPIO_CTRL2 */ +#define PALMAS_PU_PD_GPIO_CTRL2_GPIO_7_PD 0x40 +#define PALMAS_PU_PD_GPIO_CTRL2_GPIO_7_PD_SHIFT 6 +#define PALMAS_PU_PD_GPIO_CTRL2_GPIO_6_PU 0x20 +#define PALMAS_PU_PD_GPIO_CTRL2_GPIO_6_PU_SHIFT 5 +#define PALMAS_PU_PD_GPIO_CTRL2_GPIO_6_PD 0x10 +#define PALMAS_PU_PD_GPIO_CTRL2_GPIO_6_PD_SHIFT 4 +#define PALMAS_PU_PD_GPIO_CTRL2_GPIO_5_PU 0x08 +#define PALMAS_PU_PD_GPIO_CTRL2_GPIO_5_PU_SHIFT 3 +#define PALMAS_PU_PD_GPIO_CTRL2_GPIO_5_PD 0x04 +#define PALMAS_PU_PD_GPIO_CTRL2_GPIO_5_PD_SHIFT 2 +#define PALMAS_PU_PD_GPIO_CTRL2_GPIO_4_PU 0x02 +#define PALMAS_PU_PD_GPIO_CTRL2_GPIO_4_PU_SHIFT 1 +#define PALMAS_PU_PD_GPIO_CTRL2_GPIO_4_PD 0x01 +#define PALMAS_PU_PD_GPIO_CTRL2_GPIO_4_PD_SHIFT 0 + +/* Bit definitions for OD_OUTPUT_GPIO_CTRL */ +#define PALMAS_OD_OUTPUT_GPIO_CTRL_GPIO_5_OD 0x20 +#define PALMAS_OD_OUTPUT_GPIO_CTRL_GPIO_5_OD_SHIFT 5 +#define PALMAS_OD_OUTPUT_GPIO_CTRL_GPIO_2_OD 0x04 +#define PALMAS_OD_OUTPUT_GPIO_CTRL_GPIO_2_OD_SHIFT 2 +#define PALMAS_OD_OUTPUT_GPIO_CTRL_GPIO_1_OD 0x02 +#define PALMAS_OD_OUTPUT_GPIO_CTRL_GPIO_1_OD_SHIFT 1 + +/* Registers for function GPADC */ +#define PALMAS_GPADC_CTRL1 0x0 +#define PALMAS_GPADC_CTRL2 0x1 +#define PALMAS_GPADC_RT_CTRL 0x2 +#define PALMAS_GPADC_AUTO_CTRL 0x3 +#define PALMAS_GPADC_STATUS 0x4 +#define PALMAS_GPADC_RT_SELECT 0x5 +#define PALMAS_GPADC_RT_CONV0_LSB 0x6 +#define PALMAS_GPADC_RT_CONV0_MSB 0x7 +#define PALMAS_GPADC_AUTO_SELECT 0x8 +#define PALMAS_GPADC_AUTO_CONV0_LSB 0x9 +#define PALMAS_GPADC_AUTO_CONV0_MSB 0xA +#define PALMAS_GPADC_AUTO_CONV1_LSB 0xB +#define PALMAS_GPADC_AUTO_CONV1_MSB 0xC +#define PALMAS_GPADC_SW_SELECT 0xD +#define PALMAS_GPADC_SW_CONV0_LSB 0xE +#define PALMAS_GPADC_SW_CONV0_MSB 0xF +#define PALMAS_GPADC_THRES_CONV0_LSB 0x10 +#define PALMAS_GPADC_THRES_CONV0_MSB 0x11 +#define PALMAS_GPADC_THRES_CONV1_LSB 0x12 +#define PALMAS_GPADC_THRES_CONV1_MSB 0x13 +#define PALMAS_GPADC_SMPS_ILMONITOR_EN 0x14 +#define PALMAS_GPADC_SMPS_VSEL_MONITORING 0x15 + +/* Bit definitions for GPADC_CTRL1 */ +#define PALMAS_GPADC_CTRL1_RESERVED_MASK 0xc0 +#define PALMAS_GPADC_CTRL1_RESERVED_SHIFT 6 +#define PALMAS_GPADC_CTRL1_CURRENT_SRC_CH3_MASK 0x30 +#define PALMAS_GPADC_CTRL1_CURRENT_SRC_CH3_SHIFT 4 +#define PALMAS_GPADC_CTRL1_CURRENT_SRC_CH0_MASK 0x0c +#define PALMAS_GPADC_CTRL1_CURRENT_SRC_CH0_SHIFT 2 +#define PALMAS_GPADC_CTRL1_BAT_REMOVAL_DET 0x02 +#define PALMAS_GPADC_CTRL1_BAT_REMOVAL_DET_SHIFT 1 +#define PALMAS_GPADC_CTRL1_GPADC_FORCE 0x01 +#define PALMAS_GPADC_CTRL1_GPADC_FORCE_SHIFT 0 + +/* Bit definitions for GPADC_CTRL2 */ +#define PALMAS_GPADC_CTRL2_RESERVED_MASK 0x06 +#define PALMAS_GPADC_CTRL2_RESERVED_SHIFT 1 + +/* Bit definitions for GPADC_RT_CTRL */ +#define PALMAS_GPADC_RT_CTRL_EXTEND_DELAY 0x02 +#define PALMAS_GPADC_RT_CTRL_EXTEND_DELAY_SHIFT 1 +#define PALMAS_GPADC_RT_CTRL_START_POLARITY 0x01 +#define PALMAS_GPADC_RT_CTRL_START_POLARITY_SHIFT 0 + +/* Bit definitions for GPADC_AUTO_CTRL */ +#define PALMAS_GPADC_AUTO_CTRL_SHUTDOWN_CONV1 0x80 +#define PALMAS_GPADC_AUTO_CTRL_SHUTDOWN_CONV1_SHIFT 7 +#define PALMAS_GPADC_AUTO_CTRL_SHUTDOWN_CONV0 0x40 +#define PALMAS_GPADC_AUTO_CTRL_SHUTDOWN_CONV0_SHIFT 6 +#define PALMAS_GPADC_AUTO_CTRL_AUTO_CONV1_EN 0x20 +#define PALMAS_GPADC_AUTO_CTRL_AUTO_CONV1_EN_SHIFT 5 +#define PALMAS_GPADC_AUTO_CTRL_AUTO_CONV0_EN 0x10 +#define PALMAS_GPADC_AUTO_CTRL_AUTO_CONV0_EN_SHIFT 4 +#define PALMAS_GPADC_AUTO_CTRL_COUNTER_CONV_MASK 0x0f +#define PALMAS_GPADC_AUTO_CTRL_COUNTER_CONV_SHIFT 0 + +/* Bit definitions for GPADC_STATUS */ +#define PALMAS_GPADC_STATUS_GPADC_AVAILABLE 0x10 +#define PALMAS_GPADC_STATUS_GPADC_AVAILABLE_SHIFT 4 + +/* Bit definitions for GPADC_RT_SELECT */ +#define PALMAS_GPADC_RT_SELECT_RT_CONV_EN 0x80 +#define PALMAS_GPADC_RT_SELECT_RT_CONV_EN_SHIFT 7 +#define PALMAS_GPADC_RT_SELECT_RT_CONV0_SEL_MASK 0x0f +#define PALMAS_GPADC_RT_SELECT_RT_CONV0_SEL_SHIFT 0 + +/* Bit definitions for GPADC_RT_CONV0_LSB */ +#define PALMAS_GPADC_RT_CONV0_LSB_RT_CONV0_LSB_MASK 0xff +#define PALMAS_GPADC_RT_CONV0_LSB_RT_CONV0_LSB_SHIFT 0 + +/* Bit definitions for GPADC_RT_CONV0_MSB */ +#define PALMAS_GPADC_RT_CONV0_MSB_RT_CONV0_MSB_MASK 0x0f +#define PALMAS_GPADC_RT_CONV0_MSB_RT_CONV0_MSB_SHIFT 0 + +/* Bit definitions for GPADC_AUTO_SELECT */ +#define PALMAS_GPADC_AUTO_SELECT_AUTO_CONV1_SEL_MASK 0xf0 +#define PALMAS_GPADC_AUTO_SELECT_AUTO_CONV1_SEL_SHIFT 4 +#define PALMAS_GPADC_AUTO_SELECT_AUTO_CONV0_SEL_MASK 0x0f +#define PALMAS_GPADC_AUTO_SELECT_AUTO_CONV0_SEL_SHIFT 0 + +/* Bit definitions for GPADC_AUTO_CONV0_LSB */ +#define PALMAS_GPADC_AUTO_CONV0_LSB_AUTO_CONV0_LSB_MASK 0xff +#define PALMAS_GPADC_AUTO_CONV0_LSB_AUTO_CONV0_LSB_SHIFT 0 + +/* Bit definitions for GPADC_AUTO_CONV0_MSB */ +#define PALMAS_GPADC_AUTO_CONV0_MSB_AUTO_CONV0_MSB_MASK 0x0f +#define PALMAS_GPADC_AUTO_CONV0_MSB_AUTO_CONV0_MSB_SHIFT 0 + +/* Bit definitions for GPADC_AUTO_CONV1_LSB */ +#define PALMAS_GPADC_AUTO_CONV1_LSB_AUTO_CONV1_LSB_MASK 0xff +#define PALMAS_GPADC_AUTO_CONV1_LSB_AUTO_CONV1_LSB_SHIFT 0 + +/* Bit definitions for GPADC_AUTO_CONV1_MSB */ +#define PALMAS_GPADC_AUTO_CONV1_MSB_AUTO_CONV1_MSB_MASK 0x0f +#define PALMAS_GPADC_AUTO_CONV1_MSB_AUTO_CONV1_MSB_SHIFT 0 + +/* Bit definitions for GPADC_SW_SELECT */ +#define PALMAS_GPADC_SW_SELECT_SW_CONV_EN 0x80 +#define PALMAS_GPADC_SW_SELECT_SW_CONV_EN_SHIFT 7 +#define PALMAS_GPADC_SW_SELECT_SW_START_CONV0 0x10 +#define PALMAS_GPADC_SW_SELECT_SW_START_CONV0_SHIFT 4 +#define PALMAS_GPADC_SW_SELECT_SW_CONV0_SEL_MASK 0x0f +#define PALMAS_GPADC_SW_SELECT_SW_CONV0_SEL_SHIFT 0 + +/* Bit definitions for GPADC_SW_CONV0_LSB */ +#define PALMAS_GPADC_SW_CONV0_LSB_SW_CONV0_LSB_MASK 0xff +#define PALMAS_GPADC_SW_CONV0_LSB_SW_CONV0_LSB_SHIFT 0 + +/* Bit definitions for GPADC_SW_CONV0_MSB */ +#define PALMAS_GPADC_SW_CONV0_MSB_SW_CONV0_MSB_MASK 0x0f +#define PALMAS_GPADC_SW_CONV0_MSB_SW_CONV0_MSB_SHIFT 0 + +/* Bit definitions for GPADC_THRES_CONV0_LSB */ +#define PALMAS_GPADC_THRES_CONV0_LSB_THRES_CONV0_LSB_MASK 0xff +#define PALMAS_GPADC_THRES_CONV0_LSB_THRES_CONV0_LSB_SHIFT 0 + +/* Bit definitions for GPADC_THRES_CONV0_MSB */ +#define PALMAS_GPADC_THRES_CONV0_MSB_THRES_CONV0_POL 0x80 +#define PALMAS_GPADC_THRES_CONV0_MSB_THRES_CONV0_POL_SHIFT 7 +#define PALMAS_GPADC_THRES_CONV0_MSB_THRES_CONV0_MSB_MASK 0x0f +#define PALMAS_GPADC_THRES_CONV0_MSB_THRES_CONV0_MSB_SHIFT 0 + +/* Bit definitions for GPADC_THRES_CONV1_LSB */ +#define PALMAS_GPADC_THRES_CONV1_LSB_THRES_CONV1_LSB_MASK 0xff +#define PALMAS_GPADC_THRES_CONV1_LSB_THRES_CONV1_LSB_SHIFT 0 + +/* Bit definitions for GPADC_THRES_CONV1_MSB */ +#define PALMAS_GPADC_THRES_CONV1_MSB_THRES_CONV1_POL 0x80 +#define PALMAS_GPADC_THRES_CONV1_MSB_THRES_CONV1_POL_SHIFT 7 +#define PALMAS_GPADC_THRES_CONV1_MSB_THRES_CONV1_MSB_MASK 0x0f +#define PALMAS_GPADC_THRES_CONV1_MSB_THRES_CONV1_MSB_SHIFT 0 + +/* Bit definitions for GPADC_SMPS_ILMONITOR_EN */ +#define PALMAS_GPADC_SMPS_ILMONITOR_EN_SMPS_ILMON_EN 0x20 +#define PALMAS_GPADC_SMPS_ILMONITOR_EN_SMPS_ILMON_EN_SHIFT 5 +#define PALMAS_GPADC_SMPS_ILMONITOR_EN_SMPS_ILMON_REXT 0x10 +#define PALMAS_GPADC_SMPS_ILMONITOR_EN_SMPS_ILMON_REXT_SHIFT 4 +#define PALMAS_GPADC_SMPS_ILMONITOR_EN_SMPS_ILMON_SEL_MASK 0x0f +#define PALMAS_GPADC_SMPS_ILMONITOR_EN_SMPS_ILMON_SEL_SHIFT 0 + +/* Bit definitions for GPADC_SMPS_VSEL_MONITORING */ +#define PALMAS_GPADC_SMPS_VSEL_MONITORING_ACTIVE_PHASE 0x80 +#define PALMAS_GPADC_SMPS_VSEL_MONITORING_ACTIVE_PHASE_SHIFT 7 +#define PALMAS_GPADC_SMPS_VSEL_MONITORING_SMPS_VSEL_MONITORING_MASK 0x7f +#define PALMAS_GPADC_SMPS_VSEL_MONITORING_SMPS_VSEL_MONITORING_SHIFT 0 + +/* Registers for function GPADC */ +#define PALMAS_GPADC_TRIM1 0x0 +#define PALMAS_GPADC_TRIM2 0x1 +#define PALMAS_GPADC_TRIM3 0x2 +#define PALMAS_GPADC_TRIM4 0x3 +#define PALMAS_GPADC_TRIM5 0x4 +#define PALMAS_GPADC_TRIM6 0x5 +#define PALMAS_GPADC_TRIM7 0x6 +#define PALMAS_GPADC_TRIM8 0x7 +#define PALMAS_GPADC_TRIM9 0x8 +#define PALMAS_GPADC_TRIM10 0x9 +#define PALMAS_GPADC_TRIM11 0xA +#define PALMAS_GPADC_TRIM12 0xB +#define PALMAS_GPADC_TRIM13 0xC +#define PALMAS_GPADC_TRIM14 0xD +#define PALMAS_GPADC_TRIM15 0xE +#define PALMAS_GPADC_TRIM16 0xF + +#endif /* __LINUX_MFD_PALMAS_H */ diff --git a/include/linux/mfd/rc5t583.h b/include/linux/mfd/rc5t583.h index 0b64b19d81ab..c42fe92a727d 100644 --- a/include/linux/mfd/rc5t583.h +++ b/include/linux/mfd/rc5t583.h @@ -250,6 +250,26 @@ enum { RC5T583_EXT_PWRREQ2_CONTROL = 0x2, }; +enum { + RC5T583_REGULATOR_DC0, + RC5T583_REGULATOR_DC1, + RC5T583_REGULATOR_DC2, + RC5T583_REGULATOR_DC3, + RC5T583_REGULATOR_LDO0, + RC5T583_REGULATOR_LDO1, + RC5T583_REGULATOR_LDO2, + RC5T583_REGULATOR_LDO3, + RC5T583_REGULATOR_LDO4, + RC5T583_REGULATOR_LDO5, + RC5T583_REGULATOR_LDO6, + RC5T583_REGULATOR_LDO7, + RC5T583_REGULATOR_LDO8, + RC5T583_REGULATOR_LDO9, + + /* Should be last entry */ + RC5T583_REGULATOR_MAX, +}; + struct rc5t583 { struct device *dev; struct regmap *regmap; @@ -273,11 +293,20 @@ struct rc5t583 { * The board specific data is provided through this structure. * @irq_base: Irq base number on which this device registers their interrupts. * @enable_shutdown: Enable shutdown through the input pin "shutdown". + * @regulator_deepsleep_slot: The slot number on which device goes to sleep + * in device sleep mode. + * @regulator_ext_pwr_control: External power request regulator control. The + * regulator output enable/disable is controlled by the external + * power request input state. + * @reg_init_data: Regulator init data. */ struct rc5t583_platform_data { int irq_base; bool enable_shutdown; + int regulator_deepsleep_slot[RC5T583_REGULATOR_MAX]; + unsigned long regulator_ext_pwr_control[RC5T583_REGULATOR_MAX]; + struct regulator_init_data *reg_init_data[RC5T583_REGULATOR_MAX]; }; static inline int rc5t583_write(struct device *dev, uint8_t reg, uint8_t val) diff --git a/include/linux/mfd/s5m87xx/s5m-core.h b/include/linux/mfd/s5m87xx/s5m-core.h index a7480b57f92d..21603b42f22f 100644 --- a/include/linux/mfd/s5m87xx/s5m-core.h +++ b/include/linux/mfd/s5m87xx/s5m-core.h @@ -335,6 +335,7 @@ extern int s5m_reg_update(struct s5m87xx_dev *s5m87xx, u8 reg, u8 val, u8 mask); struct s5m_platform_data { struct s5m_regulator_data *regulators; + struct s5m_opmode_data *opmode; int device_type; int num_regulators; diff --git a/include/linux/mfd/s5m87xx/s5m-pmic.h b/include/linux/mfd/s5m87xx/s5m-pmic.h index a72a5d27e62e..7c719f20f58a 100644 --- a/include/linux/mfd/s5m87xx/s5m-pmic.h +++ b/include/linux/mfd/s5m87xx/s5m-pmic.h @@ -58,6 +58,8 @@ enum s5m8767_regulators { S5M8767_REG_MAX, }; +#define S5M8767_ENCTRL_SHIFT 6 + /* S5M8763 regulator ids */ enum s5m8763_regulators { S5M8763_LDO1, @@ -97,4 +99,31 @@ struct s5m_regulator_data { struct regulator_init_data *initdata; }; +/* + * s5m_opmode_data - regulator operation mode data + * @id: regulator id + * @mode: regulator operation mode + */ +struct s5m_opmode_data { + int id; + int mode; +}; + +/* + * s5m regulator operation mode + * S5M_OPMODE_OFF Regulator always OFF + * S5M_OPMODE_ON Regulator always ON + * S5M_OPMODE_LOWPOWER Regulator is on in low-power mode + * S5M_OPMODE_SUSPEND Regulator is changed by PWREN pin + * If PWREN is high, regulator is on + * If PWREN is low, regulator is off + */ + +enum s5m_opmode { + S5M_OPMODE_OFF, + S5M_OPMODE_ON, + S5M_OPMODE_LOWPOWER, + S5M_OPMODE_SUSPEND, +}; + #endif /* __LINUX_MFD_S5M_PMIC_H */ diff --git a/include/linux/mfd/tps65090.h b/include/linux/mfd/tps65090.h index 38e31c55adbb..6bc31d854626 100644 --- a/include/linux/mfd/tps65090.h +++ b/include/linux/mfd/tps65090.h @@ -22,6 +22,19 @@ #ifndef __LINUX_MFD_TPS65090_H #define __LINUX_MFD_TPS65090_H +#include <linux/irq.h> + +struct tps65090 { + struct mutex lock; + struct device *dev; + struct i2c_client *client; + struct regmap *rmap; + struct irq_chip irq_chip; + struct mutex irq_lock; + int irq_base; + unsigned int id; +}; + struct tps65090_subdev_info { int id; const char *name; diff --git a/include/linux/mfd/tps6586x.h b/include/linux/mfd/tps6586x.h index b19176eab44d..f350fd0ba1df 100644 --- a/include/linux/mfd/tps6586x.h +++ b/include/linux/mfd/tps6586x.h @@ -68,6 +68,7 @@ struct tps6586x_subdev_info { int id; const char *name; void *platform_data; + struct device_node *of_node; }; struct tps6586x_platform_data { diff --git a/include/linux/mfd/wm8994/core.h b/include/linux/mfd/wm8994/core.h index 9eff2a351ec5..6695c3ec4518 100644 --- a/include/linux/mfd/wm8994/core.h +++ b/include/linux/mfd/wm8994/core.h @@ -17,6 +17,7 @@ #include <linux/mutex.h> #include <linux/interrupt.h> +#include <linux/regmap.h> enum wm8994_type { WM8994 = 0, @@ -26,7 +27,6 @@ enum wm8994_type { struct regulator_dev; struct regulator_bulk_data; -struct regmap; #define WM8994_NUM_GPIO_REGS 11 #define WM8994_NUM_LDO_REGS 2 @@ -94,17 +94,17 @@ static inline int wm8994_request_irq(struct wm8994 *wm8994, int irq, irq_handler_t handler, const char *name, void *data) { - if (!wm8994->irq_base) + if (!wm8994->irq_data) return -EINVAL; - return request_threaded_irq(wm8994->irq_base + irq, NULL, handler, - IRQF_TRIGGER_RISING, name, + return request_threaded_irq(regmap_irq_get_virq(wm8994->irq_data, irq), + NULL, handler, IRQF_TRIGGER_RISING, name, data); } static inline void wm8994_free_irq(struct wm8994 *wm8994, int irq, void *data) { - if (!wm8994->irq_base) + if (!wm8994->irq_data) return; - free_irq(wm8994->irq_base + irq, data); + free_irq(regmap_irq_get_virq(wm8994->irq_data, irq), data); } int wm8994_irq_init(struct wm8994 *wm8994); diff --git a/include/linux/mlx4/cmd.h b/include/linux/mlx4/cmd.h index 9958ff2cad3c..1f3860a8a109 100644 --- a/include/linux/mlx4/cmd.h +++ b/include/linux/mlx4/cmd.h @@ -150,6 +150,10 @@ enum { /* statistics commands */ MLX4_CMD_QUERY_IF_STAT = 0X54, MLX4_CMD_SET_IF_STAT = 0X55, + + /* set port opcode modifiers */ + MLX4_SET_PORT_PRIO2TC = 0x8, + MLX4_SET_PORT_SCHEDULER = 0x9, }; enum { diff --git a/include/linux/mlx4/device.h b/include/linux/mlx4/device.h index 834c96c5d879..6e27fa99e8b9 100644 --- a/include/linux/mlx4/device.h +++ b/include/linux/mlx4/device.h @@ -98,6 +98,12 @@ enum { MLX4_DEV_CAP_FLAG_SENSE_SUPPORT = 1LL << 55 }; +enum { + MLX4_DEV_CAP_FLAG2_RSS = 1LL << 0, + MLX4_DEV_CAP_FLAG2_RSS_TOP = 1LL << 1, + MLX4_DEV_CAP_FLAG2_RSS_XOR = 1LL << 2 +}; + #define MLX4_ATTR_EXTENDED_PORT_INFO cpu_to_be16(0xff90) enum { @@ -292,11 +298,13 @@ struct mlx4_caps { u32 max_msg_sz; u32 page_size_cap; u64 flags; + u64 flags2; u32 bmme_flags; u32 reserved_lkey; u16 stat_rate_support; u8 port_width_cap[MLX4_MAX_PORTS + 1]; int max_gso_sz; + int max_rss_tbl_sz; int reserved_qps_cnt[MLX4_NUM_QP_REGION]; int reserved_qps; int reserved_qps_base[MLX4_NUM_QP_REGION]; @@ -628,6 +636,9 @@ int mlx4_SET_PORT_general(struct mlx4_dev *dev, u8 port, int mtu, u8 pptx, u8 pfctx, u8 pprx, u8 pfcrx); int mlx4_SET_PORT_qpn_calc(struct mlx4_dev *dev, u8 port, u32 base_qpn, u8 promisc); +int mlx4_SET_PORT_PRIO2TC(struct mlx4_dev *dev, u8 port, u8 *prio2tc); +int mlx4_SET_PORT_SCHEDULER(struct mlx4_dev *dev, u8 port, u8 *tc_tx_bw, + u8 *pg, u16 *ratelimit); int mlx4_find_cached_vlan(struct mlx4_dev *dev, u8 port, u16 vid, int *idx); int mlx4_register_vlan(struct mlx4_dev *dev, u8 port, u16 vlan, int *index); void mlx4_unregister_vlan(struct mlx4_dev *dev, u8 port, int index); diff --git a/include/linux/mlx4/qp.h b/include/linux/mlx4/qp.h index 091f9e7dc8b9..338388ba260a 100644 --- a/include/linux/mlx4/qp.h +++ b/include/linux/mlx4/qp.h @@ -139,7 +139,8 @@ struct mlx4_qp_path { u8 rgid[16]; u8 sched_queue; u8 vlan_index; - u8 reserved3[2]; + u8 feup; + u8 reserved3; u8 reserved4[2]; u8 dmac[6]; }; @@ -233,7 +234,8 @@ struct mlx4_wqe_mlx_seg { u8 owner; u8 reserved1[2]; u8 opcode; - u8 reserved2[3]; + __be16 sched_prio; + u8 reserved2; u8 size; /* * [17] VL15 diff --git a/include/linux/mm.h b/include/linux/mm.h index 74aa71bea1e4..7d5c37f24c63 100644 --- a/include/linux/mm.h +++ b/include/linux/mm.h @@ -896,10 +896,8 @@ int zap_vma_ptes(struct vm_area_struct *vma, unsigned long address, unsigned long size); void zap_page_range(struct vm_area_struct *vma, unsigned long address, unsigned long size, struct zap_details *); -void unmap_vmas(struct mmu_gather *tlb, - struct vm_area_struct *start_vma, unsigned long start_addr, - unsigned long end_addr, unsigned long *nr_accounted, - struct zap_details *); +void unmap_vmas(struct mmu_gather *tlb, struct vm_area_struct *start_vma, + unsigned long start, unsigned long end); /** * mm_walk - callbacks for walk_page_range diff --git a/include/linux/neighbour.h b/include/linux/neighbour.h index b188f68a08c9..275e5d65dcb2 100644 --- a/include/linux/neighbour.h +++ b/include/linux/neighbour.h @@ -33,6 +33,9 @@ enum { #define NTF_PROXY 0x08 /* == ATF_PUBL */ #define NTF_ROUTER 0x80 +#define NTF_SELF 0x02 +#define NTF_MASTER 0x04 + /* * Neighbor Cache Entry States. */ diff --git a/include/linux/net.h b/include/linux/net.h index be60c7f5e145..2d7510f38934 100644 --- a/include/linux/net.h +++ b/include/linux/net.h @@ -250,6 +250,29 @@ extern struct socket *sockfd_lookup(int fd, int *err); #define sockfd_put(sock) fput(sock->file) extern int net_ratelimit(void); +#define net_ratelimited_function(function, ...) \ +do { \ + if (net_ratelimit()) \ + function(__VA_ARGS__); \ +} while (0) + +#define net_emerg_ratelimited(fmt, ...) \ + net_ratelimited_function(pr_emerg, fmt, ##__VA_ARGS__) +#define net_alert_ratelimited(fmt, ...) \ + net_ratelimited_function(pr_alert, fmt, ##__VA_ARGS__) +#define net_crit_ratelimited(fmt, ...) \ + net_ratelimited_function(pr_crit, fmt, ##__VA_ARGS__) +#define net_err_ratelimited(fmt, ...) \ + net_ratelimited_function(pr_err, fmt, ##__VA_ARGS__) +#define net_notice_ratelimited(fmt, ...) \ + net_ratelimited_function(pr_notice, fmt, ##__VA_ARGS__) +#define net_warn_ratelimited(fmt, ...) \ + net_ratelimited_function(pr_warn, fmt, ##__VA_ARGS__) +#define net_info_ratelimited(fmt, ...) \ + net_ratelimited_function(pr_info, fmt, ##__VA_ARGS__) +#define net_dbg_ratelimited(fmt, ...) \ + net_ratelimited_function(pr_debug, fmt, ##__VA_ARGS__) + #define net_random() random32() #define net_srandom(seed) srandom32((__force u32)seed) diff --git a/include/linux/netdevice.h b/include/linux/netdevice.h index 5cbaa20f1659..e7fd468f7126 100644 --- a/include/linux/netdevice.h +++ b/include/linux/netdevice.h @@ -54,6 +54,7 @@ #include <net/netprio_cgroup.h> #include <linux/netdev_features.h> +#include <linux/neighbour.h> struct netpoll_info; struct device; @@ -288,7 +289,7 @@ struct hh_cache { struct header_ops { int (*create) (struct sk_buff *skb, struct net_device *dev, unsigned short type, const void *daddr, - const void *saddr, unsigned len); + const void *saddr, unsigned int len); int (*parse)(const struct sk_buff *skb, unsigned char *haddr); int (*rebuild)(struct sk_buff *skb); int (*cache)(const struct neighbour *neigh, struct hh_cache *hh, __be16 type); @@ -905,6 +906,16 @@ struct netdev_fcoe_hbainfo { * feature set might be less than what was returned by ndo_fix_features()). * Must return >0 or -errno if it changed dev->features itself. * + * int (*ndo_fdb_add)(struct ndmsg *ndm, struct net_device *dev, + * unsigned char *addr, u16 flags) + * Adds an FDB entry to dev for addr. + * int (*ndo_fdb_del)(struct ndmsg *ndm, struct net_device *dev, + * unsigned char *addr) + * Deletes the FDB entry from dev coresponding to addr. + * int (*ndo_fdb_dump)(struct sk_buff *skb, struct netlink_callback *cb, + * struct net_device *dev, int idx) + * Used to add FDB entries to dump requests. Implementers should add + * entries to skb and update idx with the number of entries. */ struct net_device_ops { int (*ndo_init)(struct net_device *dev); @@ -1002,6 +1013,18 @@ struct net_device_ops { netdev_features_t features); int (*ndo_neigh_construct)(struct neighbour *n); void (*ndo_neigh_destroy)(struct neighbour *n); + + int (*ndo_fdb_add)(struct ndmsg *ndm, + struct net_device *dev, + unsigned char *addr, + u16 flags); + int (*ndo_fdb_del)(struct ndmsg *ndm, + struct net_device *dev, + unsigned char *addr); + int (*ndo_fdb_dump)(struct sk_buff *skb, + struct netlink_callback *cb, + struct net_device *dev, + int idx); }; /* @@ -1132,7 +1155,6 @@ struct net_device { struct in_device __rcu *ip_ptr; /* IPv4 specific data */ struct dn_dev __rcu *dn_ptr; /* DECnet specific data */ struct inet6_dev __rcu *ip6_ptr; /* IPv6 specific data */ - void *ec_ptr; /* Econet specific data */ void *ax25_ptr; /* AX.25 specific data */ struct wireless_dev *ieee80211_ptr; /* IEEE 802.11 specific data, assign before registering */ @@ -1403,15 +1425,6 @@ static inline bool netdev_uses_dsa_tags(struct net_device *dev) return 0; } -#ifndef CONFIG_NET_NS -static inline void skb_set_dev(struct sk_buff *skb, struct net_device *dev) -{ - skb->dev = dev; -} -#else /* CONFIG_NET_NS */ -void skb_set_dev(struct sk_buff *skb, struct net_device *dev); -#endif - static inline bool netdev_uses_trailer_tags(struct net_device *dev) { #ifdef CONFIG_NET_DSA_TAG_TRAILER @@ -1486,6 +1499,8 @@ struct napi_gro_cb { /* Free the skb? */ int free; +#define NAPI_GRO_FREE 1 +#define NAPI_GRO_FREE_STOLEN_HEAD 2 }; #define NAPI_GRO_CB(skb) ((struct napi_gro_cb *)(skb)->cb) @@ -1689,7 +1704,7 @@ static inline void *skb_gro_network_header(struct sk_buff *skb) static inline int dev_hard_header(struct sk_buff *skb, struct net_device *dev, unsigned short type, const void *daddr, const void *saddr, - unsigned len) + unsigned int len) { if (!dev->header_ops || !dev->header_ops->create) return 0; @@ -1740,7 +1755,7 @@ struct softnet_data { unsigned int input_queue_head; unsigned int input_queue_tail; #endif - unsigned dropped; + unsigned int dropped; struct sk_buff_head input_pkt_queue; struct napi_struct backlog; }; @@ -1925,7 +1940,7 @@ static inline void netdev_sent_queue(struct net_device *dev, unsigned int bytes) } static inline void netdev_tx_completed_queue(struct netdev_queue *dev_queue, - unsigned pkts, unsigned bytes) + unsigned int pkts, unsigned int bytes) { #ifdef CONFIG_BQL if (unlikely(!bytes)) @@ -1949,7 +1964,7 @@ static inline void netdev_tx_completed_queue(struct netdev_queue *dev_queue, } static inline void netdev_completed_queue(struct net_device *dev, - unsigned pkts, unsigned bytes) + unsigned int pkts, unsigned int bytes) { netdev_tx_completed_queue(netdev_get_tx_queue(dev, 0), pkts, bytes); } @@ -2127,7 +2142,6 @@ extern struct sk_buff * napi_get_frags(struct napi_struct *napi); extern gro_result_t napi_frags_finish(struct napi_struct *napi, struct sk_buff *skb, gro_result_t ret); -extern struct sk_buff * napi_frags_skb(struct napi_struct *napi); extern gro_result_t napi_gro_frags(struct napi_struct *napi); static inline void napi_free_frags(struct napi_struct *napi) @@ -2144,9 +2158,9 @@ extern void netdev_rx_handler_unregister(struct net_device *dev); extern bool dev_valid_name(const char *name); extern int dev_ioctl(struct net *net, unsigned int cmd, void __user *); extern int dev_ethtool(struct net *net, struct ifreq *); -extern unsigned dev_get_flags(const struct net_device *); +extern unsigned int dev_get_flags(const struct net_device *); extern int __dev_change_flags(struct net_device *, unsigned int flags); -extern int dev_change_flags(struct net_device *, unsigned); +extern int dev_change_flags(struct net_device *, unsigned int); extern void __dev_notify_flags(struct net_device *, unsigned int old_flags); extern int dev_change_name(struct net_device *, const char *); extern int dev_set_alias(struct net_device *, const char *, size_t); @@ -2546,6 +2560,7 @@ extern int dev_addr_init(struct net_device *dev); /* Functions used for unicast addresses handling */ extern int dev_uc_add(struct net_device *dev, unsigned char *addr); +extern int dev_uc_add_excl(struct net_device *dev, unsigned char *addr); extern int dev_uc_del(struct net_device *dev, unsigned char *addr); extern int dev_uc_sync(struct net_device *to, struct net_device *from); extern void dev_uc_unsync(struct net_device *to, struct net_device *from); @@ -2555,6 +2570,7 @@ extern void dev_uc_init(struct net_device *dev); /* Functions used for multicast addresses handling */ extern int dev_mc_add(struct net_device *dev, unsigned char *addr); extern int dev_mc_add_global(struct net_device *dev, unsigned char *addr); +extern int dev_mc_add_excl(struct net_device *dev, unsigned char *addr); extern int dev_mc_del(struct net_device *dev, unsigned char *addr); extern int dev_mc_del_global(struct net_device *dev, unsigned char *addr); extern int dev_mc_sync(struct net_device *to, struct net_device *from); diff --git a/include/linux/netfilter.h b/include/linux/netfilter.h index 29734be334c1..ff9c84c29b28 100644 --- a/include/linux/netfilter.h +++ b/include/linux/netfilter.h @@ -154,12 +154,6 @@ void nf_unregister_hooks(struct nf_hook_ops *reg, unsigned int n); int nf_register_sockopt(struct nf_sockopt_ops *reg); void nf_unregister_sockopt(struct nf_sockopt_ops *reg); -#ifdef CONFIG_SYSCTL -/* Sysctl registration */ -extern struct ctl_path nf_net_netfilter_sysctl_path[]; -extern struct ctl_path nf_net_ipv4_netfilter_sysctl_path[]; -#endif /* CONFIG_SYSCTL */ - extern struct list_head nf_hooks[NFPROTO_NUMPROTO][NF_MAX_HOOKS]; #if defined(CONFIG_JUMP_LABEL) diff --git a/include/linux/netfilter/ipset/ip_set.h b/include/linux/netfilter/ipset/ip_set.h index 2f8e18a23227..2edc64cab739 100644 --- a/include/linux/netfilter/ipset/ip_set.h +++ b/include/linux/netfilter/ipset/ip_set.h @@ -411,26 +411,32 @@ ip_set_get_h16(const struct nlattr *attr) #define ipset_nest_start(skb, attr) nla_nest_start(skb, attr | NLA_F_NESTED) #define ipset_nest_end(skb, start) nla_nest_end(skb, start) -#define NLA_PUT_IPADDR4(skb, type, ipaddr) \ -do { \ - struct nlattr *__nested = ipset_nest_start(skb, type); \ - \ - if (!__nested) \ - goto nla_put_failure; \ - NLA_PUT_NET32(skb, IPSET_ATTR_IPADDR_IPV4, ipaddr); \ - ipset_nest_end(skb, __nested); \ -} while (0) - -#define NLA_PUT_IPADDR6(skb, type, ipaddrptr) \ -do { \ - struct nlattr *__nested = ipset_nest_start(skb, type); \ - \ - if (!__nested) \ - goto nla_put_failure; \ - NLA_PUT(skb, IPSET_ATTR_IPADDR_IPV6, \ - sizeof(struct in6_addr), ipaddrptr); \ - ipset_nest_end(skb, __nested); \ -} while (0) +static inline int nla_put_ipaddr4(struct sk_buff *skb, int type, __be32 ipaddr) +{ + struct nlattr *__nested = ipset_nest_start(skb, type); + int ret; + + if (!__nested) + return -EMSGSIZE; + ret = nla_put_net32(skb, IPSET_ATTR_IPADDR_IPV4, ipaddr); + if (!ret) + ipset_nest_end(skb, __nested); + return ret; +} + +static inline int nla_put_ipaddr6(struct sk_buff *skb, int type, const struct in6_addr *ipaddrptr) +{ + struct nlattr *__nested = ipset_nest_start(skb, type); + int ret; + + if (!__nested) + return -EMSGSIZE; + ret = nla_put(skb, IPSET_ATTR_IPADDR_IPV6, + sizeof(struct in6_addr), ipaddrptr); + if (!ret) + ipset_nest_end(skb, __nested); + return ret; +} /* Get address from skbuff */ static inline __be32 @@ -472,8 +478,8 @@ union ip_set_name_index { #define IP_SET_OP_GET_BYNAME 0x00000006 /* Get set index by name */ struct ip_set_req_get_set { - unsigned op; - unsigned version; + unsigned int op; + unsigned int version; union ip_set_name_index set; }; @@ -482,8 +488,8 @@ struct ip_set_req_get_set { #define IP_SET_OP_VERSION 0x00000100 /* Ask kernel version */ struct ip_set_req_version { - unsigned op; - unsigned version; + unsigned int op; + unsigned int version; }; #endif /*_IP_SET_H */ diff --git a/include/linux/netfilter/ipset/ip_set_ahash.h b/include/linux/netfilter/ipset/ip_set_ahash.h index 05a5d72680be..b114d35aea5e 100644 --- a/include/linux/netfilter/ipset/ip_set_ahash.h +++ b/include/linux/netfilter/ipset/ip_set_ahash.h @@ -99,6 +99,22 @@ struct ip_set_hash { #endif }; +static size_t +htable_size(u8 hbits) +{ + size_t hsize; + + /* We must fit both into u32 in jhash and size_t */ + if (hbits > 31) + return 0; + hsize = jhash_size(hbits); + if ((((size_t)-1) - sizeof(struct htable))/sizeof(struct hbucket) + < hsize) + return 0; + + return hsize * sizeof(struct hbucket) + sizeof(struct htable); +} + /* Compute htable_bits from the user input parameter hashsize */ static u8 htable_bits(u32 hashsize) @@ -594,17 +610,20 @@ type_pf_head(struct ip_set *set, struct sk_buff *skb) nested = ipset_nest_start(skb, IPSET_ATTR_DATA); if (!nested) goto nla_put_failure; - NLA_PUT_NET32(skb, IPSET_ATTR_HASHSIZE, - htonl(jhash_size(h->table->htable_bits))); - NLA_PUT_NET32(skb, IPSET_ATTR_MAXELEM, htonl(h->maxelem)); + if (nla_put_net32(skb, IPSET_ATTR_HASHSIZE, + htonl(jhash_size(h->table->htable_bits))) || + nla_put_net32(skb, IPSET_ATTR_MAXELEM, htonl(h->maxelem))) + goto nla_put_failure; #ifdef IP_SET_HASH_WITH_NETMASK - if (h->netmask != HOST_MASK) - NLA_PUT_U8(skb, IPSET_ATTR_NETMASK, h->netmask); + if (h->netmask != HOST_MASK && + nla_put_u8(skb, IPSET_ATTR_NETMASK, h->netmask)) + goto nla_put_failure; #endif - NLA_PUT_NET32(skb, IPSET_ATTR_REFERENCES, htonl(set->ref - 1)); - NLA_PUT_NET32(skb, IPSET_ATTR_MEMSIZE, htonl(memsize)); - if (with_timeout(h->timeout)) - NLA_PUT_NET32(skb, IPSET_ATTR_TIMEOUT, htonl(h->timeout)); + if (nla_put_net32(skb, IPSET_ATTR_REFERENCES, htonl(set->ref - 1)) || + nla_put_net32(skb, IPSET_ATTR_MEMSIZE, htonl(memsize)) || + (with_timeout(h->timeout) && + nla_put_net32(skb, IPSET_ATTR_TIMEOUT, htonl(h->timeout)))) + goto nla_put_failure; ipset_nest_end(skb, nested); return 0; diff --git a/include/linux/netfilter/ipset/ip_set_timeout.h b/include/linux/netfilter/ipset/ip_set_timeout.h index 47923205a4ad..41d9cfa08167 100644 --- a/include/linux/netfilter/ipset/ip_set_timeout.h +++ b/include/linux/netfilter/ipset/ip_set_timeout.h @@ -30,6 +30,10 @@ ip_set_timeout_uget(struct nlattr *tb) { unsigned int timeout = ip_set_get_h32(tb); + /* Normalize to fit into jiffies */ + if (timeout > UINT_MAX/MSEC_PER_SEC) + timeout = UINT_MAX/MSEC_PER_SEC; + /* Userspace supplied TIMEOUT parameter: adjust crazy size */ return timeout == IPSET_NO_TIMEOUT ? IPSET_NO_TIMEOUT - 1 : timeout; } diff --git a/include/linux/netfilter/nf_conntrack_common.h b/include/linux/netfilter/nf_conntrack_common.h index 0d3dd66322ec..d146872a0b91 100644 --- a/include/linux/netfilter/nf_conntrack_common.h +++ b/include/linux/netfilter/nf_conntrack_common.h @@ -83,6 +83,10 @@ enum ip_conntrack_status { /* Conntrack is a fake untracked entry */ IPS_UNTRACKED_BIT = 12, IPS_UNTRACKED = (1 << IPS_UNTRACKED_BIT), + + /* Conntrack got a helper explicitly attached via CT target. */ + IPS_HELPER_BIT = 13, + IPS_HELPER = (1 << IPS_HELPER_BIT), }; /* Connection tracking event types */ diff --git a/include/linux/netfilter/nf_conntrack_h323_types.h b/include/linux/netfilter/nf_conntrack_h323_types.h index f35b6b4801e7..b0821f45fbe4 100644 --- a/include/linux/netfilter/nf_conntrack_h323_types.h +++ b/include/linux/netfilter/nf_conntrack_h323_types.h @@ -7,12 +7,12 @@ typedef struct TransportAddress_ipAddress { /* SEQUENCE */ int options; /* No use */ - unsigned ip; + unsigned int ip; } TransportAddress_ipAddress; typedef struct TransportAddress_ip6Address { /* SEQUENCE */ int options; /* No use */ - unsigned ip; + unsigned int ip; } TransportAddress_ip6Address; typedef struct TransportAddress { /* CHOICE */ @@ -96,12 +96,12 @@ typedef struct DataType { /* CHOICE */ typedef struct UnicastAddress_iPAddress { /* SEQUENCE */ int options; /* No use */ - unsigned network; + unsigned int network; } UnicastAddress_iPAddress; typedef struct UnicastAddress_iP6Address { /* SEQUENCE */ int options; /* No use */ - unsigned network; + unsigned int network; } UnicastAddress_iP6Address; typedef struct UnicastAddress { /* CHOICE */ @@ -698,7 +698,7 @@ typedef struct RegistrationRequest { /* SEQUENCE */ } options; RegistrationRequest_callSignalAddress callSignalAddress; RegistrationRequest_rasAddress rasAddress; - unsigned timeToLive; + unsigned int timeToLive; } RegistrationRequest; typedef struct RegistrationConfirm_callSignalAddress { /* SEQUENCE OF */ @@ -730,7 +730,7 @@ typedef struct RegistrationConfirm { /* SEQUENCE */ eRegistrationConfirm_genericData = (1 << 12), } options; RegistrationConfirm_callSignalAddress callSignalAddress; - unsigned timeToLive; + unsigned int timeToLive; } RegistrationConfirm; typedef struct UnregistrationRequest_callSignalAddress { /* SEQUENCE OF */ diff --git a/include/linux/netfilter/nfnetlink.h b/include/linux/netfilter/nfnetlink.h index 6fd1f0d07e64..a1048c1587d1 100644 --- a/include/linux/netfilter/nfnetlink.h +++ b/include/linux/netfilter/nfnetlink.h @@ -80,7 +80,7 @@ extern int nfnetlink_subsys_register(const struct nfnetlink_subsystem *n); extern int nfnetlink_subsys_unregister(const struct nfnetlink_subsystem *n); extern int nfnetlink_has_listeners(struct net *net, unsigned int group); -extern int nfnetlink_send(struct sk_buff *skb, struct net *net, u32 pid, unsigned group, +extern int nfnetlink_send(struct sk_buff *skb, struct net *net, u32 pid, unsigned int group, int echo, gfp_t flags); extern int nfnetlink_set_err(struct net *net, u32 pid, u32 group, int error); extern int nfnetlink_unicast(struct sk_buff *skb, struct net *net, u_int32_t pid, int flags); diff --git a/include/linux/netfilter/xt_HMARK.h b/include/linux/netfilter/xt_HMARK.h new file mode 100644 index 000000000000..abb1650940d2 --- /dev/null +++ b/include/linux/netfilter/xt_HMARK.h @@ -0,0 +1,45 @@ +#ifndef XT_HMARK_H_ +#define XT_HMARK_H_ + +#include <linux/types.h> + +enum { + XT_HMARK_SADDR_MASK, + XT_HMARK_DADDR_MASK, + XT_HMARK_SPI, + XT_HMARK_SPI_MASK, + XT_HMARK_SPORT, + XT_HMARK_DPORT, + XT_HMARK_SPORT_MASK, + XT_HMARK_DPORT_MASK, + XT_HMARK_PROTO_MASK, + XT_HMARK_RND, + XT_HMARK_MODULUS, + XT_HMARK_OFFSET, + XT_HMARK_CT, + XT_HMARK_METHOD_L3, + XT_HMARK_METHOD_L3_4, +}; +#define XT_HMARK_FLAG(flag) (1 << flag) + +union hmark_ports { + struct { + __u16 src; + __u16 dst; + } p16; + __u32 v32; +}; + +struct xt_hmark_info { + union nf_inet_addr src_mask; + union nf_inet_addr dst_mask; + union hmark_ports port_mask; + union hmark_ports port_set; + __u32 flags; + __u16 proto_mask; + __u32 hashrnd; + __u32 hmodulus; + __u32 hoffset; /* Mark offset to start from */ +}; + +#endif /* XT_HMARK_H_ */ diff --git a/include/linux/netfilter/xt_hashlimit.h b/include/linux/netfilter/xt_hashlimit.h index b1925b5925e9..c42e52f39f8f 100644 --- a/include/linux/netfilter/xt_hashlimit.h +++ b/include/linux/netfilter/xt_hashlimit.h @@ -6,7 +6,11 @@ /* timings are in milliseconds. */ #define XT_HASHLIMIT_SCALE 10000 /* 1/10,000 sec period => max of 10,000/sec. Min rate is then 429490 - seconds, or one every 59 hours. */ + * seconds, or one packet every 59 hours. + */ + +/* packet length accounting is done in 16-byte steps */ +#define XT_HASHLIMIT_BYTE_SHIFT 4 /* details of this structure hidden by the implementation */ struct xt_hashlimit_htable; @@ -17,7 +21,13 @@ enum { XT_HASHLIMIT_HASH_SIP = 1 << 2, XT_HASHLIMIT_HASH_SPT = 1 << 3, XT_HASHLIMIT_INVERT = 1 << 4, + XT_HASHLIMIT_BYTES = 1 << 5, }; +#ifdef __KERNEL__ +#define XT_HASHLIMIT_ALL (XT_HASHLIMIT_HASH_DIP | XT_HASHLIMIT_HASH_DPT | \ + XT_HASHLIMIT_HASH_SIP | XT_HASHLIMIT_HASH_SPT | \ + XT_HASHLIMIT_INVERT | XT_HASHLIMIT_BYTES) +#endif struct hashlimit_cfg { __u32 mode; /* bitmask of XT_HASHLIMIT_HASH_* */ diff --git a/include/linux/netfilter_bridge.h b/include/linux/netfilter_bridge.h index 0ddd161f3b06..31d2844e6572 100644 --- a/include/linux/netfilter_bridge.h +++ b/include/linux/netfilter_bridge.h @@ -104,9 +104,18 @@ struct bridge_skb_cb { } daddr; }; +static inline void br_drop_fake_rtable(struct sk_buff *skb) +{ + struct dst_entry *dst = skb_dst(skb); + + if (dst && (dst->flags & DST_FAKE_RTABLE)) + skb_dst_drop(skb); +} + #else #define nf_bridge_maybe_copy_header(skb) (0) #define nf_bridge_pad(skb) (0) +#define br_drop_fake_rtable(skb) do { } while (0) #endif /* CONFIG_BRIDGE_NETFILTER */ #endif /* __KERNEL__ */ diff --git a/include/linux/netfilter_ipv4/Kbuild b/include/linux/netfilter_ipv4/Kbuild index 31f8bec95650..c61b8fb1a9ef 100644 --- a/include/linux/netfilter_ipv4/Kbuild +++ b/include/linux/netfilter_ipv4/Kbuild @@ -1,4 +1,3 @@ -header-y += ip_queue.h header-y += ip_tables.h header-y += ipt_CLUSTERIP.h header-y += ipt_ECN.h diff --git a/include/linux/netfilter_ipv4/ip_queue.h b/include/linux/netfilter_ipv4/ip_queue.h deleted file mode 100644 index a03507f465f8..000000000000 --- a/include/linux/netfilter_ipv4/ip_queue.h +++ /dev/null @@ -1,72 +0,0 @@ -/* - * This is a module which is used for queueing IPv4 packets and - * communicating with userspace via netlink. - * - * (C) 2000 James Morris, this code is GPL. - */ -#ifndef _IP_QUEUE_H -#define _IP_QUEUE_H - -#ifdef __KERNEL__ -#ifdef DEBUG_IPQ -#define QDEBUG(x...) printk(KERN_DEBUG ## x) -#else -#define QDEBUG(x...) -#endif /* DEBUG_IPQ */ -#else -#include <net/if.h> -#endif /* ! __KERNEL__ */ - -/* Messages sent from kernel */ -typedef struct ipq_packet_msg { - unsigned long packet_id; /* ID of queued packet */ - unsigned long mark; /* Netfilter mark value */ - long timestamp_sec; /* Packet arrival time (seconds) */ - long timestamp_usec; /* Packet arrvial time (+useconds) */ - unsigned int hook; /* Netfilter hook we rode in on */ - char indev_name[IFNAMSIZ]; /* Name of incoming interface */ - char outdev_name[IFNAMSIZ]; /* Name of outgoing interface */ - __be16 hw_protocol; /* Hardware protocol (network order) */ - unsigned short hw_type; /* Hardware type */ - unsigned char hw_addrlen; /* Hardware address length */ - unsigned char hw_addr[8]; /* Hardware address */ - size_t data_len; /* Length of packet data */ - unsigned char payload[0]; /* Optional packet data */ -} ipq_packet_msg_t; - -/* Messages sent from userspace */ -typedef struct ipq_mode_msg { - unsigned char value; /* Requested mode */ - size_t range; /* Optional range of packet requested */ -} ipq_mode_msg_t; - -typedef struct ipq_verdict_msg { - unsigned int value; /* Verdict to hand to netfilter */ - unsigned long id; /* Packet ID for this verdict */ - size_t data_len; /* Length of replacement data */ - unsigned char payload[0]; /* Optional replacement packet */ -} ipq_verdict_msg_t; - -typedef struct ipq_peer_msg { - union { - ipq_verdict_msg_t verdict; - ipq_mode_msg_t mode; - } msg; -} ipq_peer_msg_t; - -/* Packet delivery modes */ -enum { - IPQ_COPY_NONE, /* Initial mode, packets are dropped */ - IPQ_COPY_META, /* Copy metadata */ - IPQ_COPY_PACKET /* Copy metadata + packet (range) */ -}; -#define IPQ_COPY_MAX IPQ_COPY_PACKET - -/* Types of messages */ -#define IPQM_BASE 0x10 /* standard netlink messages below this */ -#define IPQM_MODE (IPQM_BASE + 1) /* Mode request from peer */ -#define IPQM_VERDICT (IPQM_BASE + 2) /* Verdict from peer */ -#define IPQM_PACKET (IPQM_BASE + 3) /* Packet from kernel */ -#define IPQM_MAX (IPQM_BASE + 4) - -#endif /*_IP_QUEUE_H*/ diff --git a/include/linux/netfilter_ipv6/ip6_tables.h b/include/linux/netfilter_ipv6/ip6_tables.h index 1bc898b14a80..08c2cbbaa32b 100644 --- a/include/linux/netfilter_ipv6/ip6_tables.h +++ b/include/linux/netfilter_ipv6/ip6_tables.h @@ -298,9 +298,14 @@ ip6t_ext_hdr(u8 nexthdr) (nexthdr == IPPROTO_DSTOPTS); } +enum { + IP6T_FH_F_FRAG = (1 << 0), + IP6T_FH_F_AUTH = (1 << 1), +}; + /* find specified header and get offset to it */ extern int ipv6_find_hdr(const struct sk_buff *skb, unsigned int *offset, - int target, unsigned short *fragoff); + int target, unsigned short *fragoff, int *fragflg); #ifdef CONFIG_COMPAT #include <net/compat.h> diff --git a/include/linux/netlink.h b/include/linux/netlink.h index a2092f582a78..0f628ffa420c 100644 --- a/include/linux/netlink.h +++ b/include/linux/netlink.h @@ -7,7 +7,7 @@ #define NETLINK_ROUTE 0 /* Routing/device hook */ #define NETLINK_UNUSED 1 /* Unused number */ #define NETLINK_USERSOCK 2 /* Reserved for user mode socket protocols */ -#define NETLINK_FIREWALL 3 /* Firewalling hook */ +#define NETLINK_FIREWALL 3 /* Unused number, formerly ip_queue */ #define NETLINK_SOCK_DIAG 4 /* socket monitoring */ #define NETLINK_NFLOG 5 /* netfilter/iptables ULOG */ #define NETLINK_XFRM 6 /* ipsec */ diff --git a/include/linux/nfc.h b/include/linux/nfc.h index 39c1fcf089c0..0ae9b5857c83 100644 --- a/include/linux/nfc.h +++ b/include/linux/nfc.h @@ -70,6 +70,7 @@ enum nfc_commands { NFC_EVENT_TARGETS_FOUND, NFC_EVENT_DEVICE_ADDED, NFC_EVENT_DEVICE_REMOVED, + NFC_EVENT_TARGET_LOST, /* private: internal use only */ __NFC_CMD_AFTER_LAST }; diff --git a/include/linux/nl80211.h b/include/linux/nl80211.h index e474f6e780cc..2540e86d99ab 100644 --- a/include/linux/nl80211.h +++ b/include/linux/nl80211.h @@ -548,6 +548,11 @@ * @NL80211_CMD_SET_NOACK_MAP: sets a bitmap for the individual TIDs whether * No Acknowledgement Policy should be applied. * + * @NL80211_CMD_CH_SWITCH_NOTIFY: An AP or GO may decide to switch channels + * independently of the userspace SME, send this event indicating + * %NL80211_ATTR_IFINDEX is now on %NL80211_ATTR_WIPHY_FREQ with + * %NL80211_ATTR_WIPHY_CHANNEL_TYPE. + * * @NL80211_CMD_MAX: highest used command number * @__NL80211_CMD_AFTER_LAST: internal use */ @@ -689,6 +694,8 @@ enum nl80211_commands { NL80211_CMD_SET_NOACK_MAP, + NL80211_CMD_CH_SWITCH_NOTIFY, + /* add new commands above here */ /* used to define NL80211_CMD_MAX below */ @@ -1685,6 +1692,7 @@ enum nl80211_sta_bss_param { * @NL80211_STA_INFO_CONNECTED_TIME: time since the station is last connected * @NL80211_STA_INFO_STA_FLAGS: Contains a struct nl80211_sta_flag_update. * @NL80211_STA_INFO_BEACON_LOSS: count of times beacon loss was detected (u32) + * @NL80211_STA_INFO_T_OFFSET: timing offset with respect to this STA (s64) * @__NL80211_STA_INFO_AFTER_LAST: internal * @NL80211_STA_INFO_MAX: highest possible station info attribute */ @@ -1708,6 +1716,7 @@ enum nl80211_sta_info { NL80211_STA_INFO_CONNECTED_TIME, NL80211_STA_INFO_STA_FLAGS, NL80211_STA_INFO_BEACON_LOSS, + NL80211_STA_INFO_T_OFFSET, /* keep last */ __NL80211_STA_INFO_AFTER_LAST, @@ -2142,6 +2151,11 @@ enum nl80211_mntr_flags { * * @NL80211_MESHCONF_ATTR_MAX: highest possible mesh configuration attribute * + * @NL80211_MESHCONF_SYNC_OFFSET_MAX_NEIGHBOR: maximum number of neighbors + * to synchronize to for 11s default synchronization method (see 11C.12.2.2) + * + * @NL80211_MESHCONF_HT_OPMODE: set mesh HT protection mode. + * * @__NL80211_MESHCONF_ATTR_AFTER_LAST: internal use */ enum nl80211_meshconf_params { @@ -2166,6 +2180,8 @@ enum nl80211_meshconf_params { NL80211_MESHCONF_HWMP_PERR_MIN_INTERVAL, NL80211_MESHCONF_FORWARDING, NL80211_MESHCONF_RSSI_THRESHOLD, + NL80211_MESHCONF_SYNC_OFFSET_MAX_NEIGHBOR, + NL80211_MESHCONF_HT_OPMODE, /* keep last */ __NL80211_MESHCONF_ATTR_AFTER_LAST, @@ -2205,6 +2221,11 @@ enum nl80211_meshconf_params { * complete (unsecured) mesh peering without the need of a userspace daemon. * * @NL80211_MESH_SETUP_ATTR_MAX: highest possible mesh setup attribute number + * + * @NL80211_MESH_SETUP_ENABLE_VENDOR_SYNC: Enable this option to use a + * vendor specific synchronization method or disable it to use the default + * neighbor offset synchronization + * * @__NL80211_MESH_SETUP_ATTR_AFTER_LAST: Internal use */ enum nl80211_mesh_setup_params { @@ -2214,6 +2235,7 @@ enum nl80211_mesh_setup_params { NL80211_MESH_SETUP_IE, NL80211_MESH_SETUP_USERSPACE_AUTH, NL80211_MESH_SETUP_USERSPACE_AMPE, + NL80211_MESH_SETUP_ENABLE_VENDOR_SYNC, /* keep last */ __NL80211_MESH_SETUP_ATTR_AFTER_LAST, @@ -2223,7 +2245,7 @@ enum nl80211_mesh_setup_params { /** * enum nl80211_txq_attr - TX queue parameter attributes * @__NL80211_TXQ_ATTR_INVALID: Attribute number 0 is reserved - * @NL80211_TXQ_ATTR_QUEUE: TX queue identifier (NL80211_TXQ_Q_*) + * @NL80211_TXQ_ATTR_AC: AC identifier (NL80211_AC_*) * @NL80211_TXQ_ATTR_TXOP: Maximum burst time in units of 32 usecs, 0 meaning * disabled * @NL80211_TXQ_ATTR_CWMIN: Minimum contention window [a value of the form @@ -2236,7 +2258,7 @@ enum nl80211_mesh_setup_params { */ enum nl80211_txq_attr { __NL80211_TXQ_ATTR_INVALID, - NL80211_TXQ_ATTR_QUEUE, + NL80211_TXQ_ATTR_AC, NL80211_TXQ_ATTR_TXOP, NL80211_TXQ_ATTR_CWMIN, NL80211_TXQ_ATTR_CWMAX, @@ -2247,13 +2269,21 @@ enum nl80211_txq_attr { NL80211_TXQ_ATTR_MAX = __NL80211_TXQ_ATTR_AFTER_LAST - 1 }; -enum nl80211_txq_q { - NL80211_TXQ_Q_VO, - NL80211_TXQ_Q_VI, - NL80211_TXQ_Q_BE, - NL80211_TXQ_Q_BK +enum nl80211_ac { + NL80211_AC_VO, + NL80211_AC_VI, + NL80211_AC_BE, + NL80211_AC_BK, + NL80211_NUM_ACS }; +/* backward compat */ +#define NL80211_TXQ_ATTR_QUEUE NL80211_TXQ_ATTR_AC +#define NL80211_TXQ_Q_VO NL80211_AC_VO +#define NL80211_TXQ_Q_VI NL80211_AC_VI +#define NL80211_TXQ_Q_BE NL80211_AC_BE +#define NL80211_TXQ_Q_BK NL80211_AC_BK + enum nl80211_channel_type { NL80211_CHAN_NO_HT, NL80211_CHAN_HT20, diff --git a/include/linux/nl802154.h b/include/linux/nl802154.h index 33d9f5175109..5a3db3aa5f17 100644 --- a/include/linux/nl802154.h +++ b/include/linux/nl802154.h @@ -68,6 +68,7 @@ enum { IEEE802154_ATTR_CHANNEL_PAGE_LIST, IEEE802154_ATTR_PHY_NAME, + IEEE802154_ATTR_DEV_TYPE, __IEEE802154_ATTR_MAX, }; @@ -126,4 +127,23 @@ enum { #define IEEE802154_CMD_MAX (__IEEE802154_CMD_MAX - 1) +enum { + __IEEE802154_DEV_INVALID = -1, + + /* TODO: + * Nowadays three device types supported by this stack at linux-zigbee + * project: WPAN = 0, MONITOR = 1 and SMAC = 2. + * + * Since this stack implementation exists many years, it's definitely + * bad idea to change the assigned values due to they are already used + * by third-party userspace software like: iz-tools, wireshark... + * + * Currently only monitor device is added and initialized by '1' for + * compatibility. + */ + IEEE802154_DEV_MONITOR = 1, + + __IEEE802154_DEV_MAX, +}; + #endif diff --git a/include/linux/of.h b/include/linux/of.h index fa7fb1d97458..2ec1083af7ff 100644 --- a/include/linux/of.h +++ b/include/linux/of.h @@ -193,6 +193,17 @@ extern struct device_node *of_get_next_child(const struct device_node *node, for (child = of_get_next_child(parent, NULL); child != NULL; \ child = of_get_next_child(parent, child)) +static inline int of_get_child_count(const struct device_node *np) +{ + struct device_node *child; + int num = 0; + + for_each_child_of_node(np, child) + num++; + + return num; +} + extern struct device_node *of_find_node_with_property( struct device_node *from, const char *prop_name); #define for_each_node_with_property(dn, prop_name) \ @@ -259,6 +270,37 @@ extern void of_detach_node(struct device_node *); #endif #define of_match_ptr(_ptr) (_ptr) + +/* + * struct property *prop; + * const __be32 *p; + * u32 u; + * + * of_property_for_each_u32(np, "propname", prop, p, u) + * printk("U32 value: %x\n", u); + */ +const __be32 *of_prop_next_u32(struct property *prop, const __be32 *cur, + u32 *pu); +#define of_property_for_each_u32(np, propname, prop, p, u) \ + for (prop = of_find_property(np, propname, NULL), \ + p = of_prop_next_u32(prop, NULL, &u); \ + p; \ + p = of_prop_next_u32(prop, p, &u)) + +/* + * struct property *prop; + * const char *s; + * + * of_property_for_each_string(np, "propname", prop, s) + * printk("String value: %s\n", s); + */ +const char *of_prop_next_string(struct property *prop, const char *cur); +#define of_property_for_each_string(np, propname, prop, s) \ + for (prop = of_find_property(np, propname, NULL), \ + s = of_prop_next_string(prop, NULL); \ + s; \ + s = of_prop_next_string(prop, s)) + #else /* CONFIG_OF */ static inline bool of_have_populated_dt(void) @@ -269,6 +311,11 @@ static inline bool of_have_populated_dt(void) #define for_each_child_of_node(parent, child) \ while (0) +static inline int of_get_child_count(const struct device_node *np) +{ + return 0; +} + static inline int of_device_is_compatible(const struct device_node *device, const char *name) { @@ -349,6 +396,10 @@ static inline int of_machine_is_compatible(const char *compat) #define of_match_ptr(_ptr) NULL #define of_match_node(_matches, _node) NULL +#define of_property_for_each_u32(np, propname, prop, p, u) \ + while (0) +#define of_property_for_each_string(np, propname, prop, s) \ + while (0) #endif /* CONFIG_OF */ /** diff --git a/include/linux/of_mdio.h b/include/linux/of_mdio.h index 53b94e025c7c..912c27a0f7ee 100644 --- a/include/linux/of_mdio.h +++ b/include/linux/of_mdio.h @@ -22,4 +22,6 @@ extern struct phy_device *of_phy_connect_fixed_link(struct net_device *dev, void (*hndlr)(struct net_device *), phy_interface_t iface); +extern struct mii_bus *of_mdio_find_bus(struct device_node *mdio_np); + #endif /* __LINUX_OF_MDIO_H */ diff --git a/include/linux/pci.h b/include/linux/pci.h index e444f5b49118..17b7b5b01b4a 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -375,11 +375,18 @@ struct pci_host_bridge_window { }; struct pci_host_bridge { - struct list_head list; + struct device dev; struct pci_bus *bus; /* root bus */ struct list_head windows; /* pci_host_bridge_windows */ + void (*release_fn)(struct pci_host_bridge *); + void *release_data; }; +#define to_pci_host_bridge(n) container_of(n, struct pci_host_bridge, dev) +void pci_set_host_bridge_release(struct pci_host_bridge *bridge, + void (*release_fn)(struct pci_host_bridge *), + void *release_data); + /* * The first PCI_BRIDGE_RESOURCE_NUM PCI bus resources (those that correspond * to P2P or CardBus bridge windows) go in a table. Additional ones (for diff --git a/include/linux/phy.h b/include/linux/phy.h index 6fe0a37d4abf..c291cae8ce32 100644 --- a/include/linux/phy.h +++ b/include/linux/phy.h @@ -412,6 +412,9 @@ struct phy_driver { /* Clears up any memory if needed */ void (*remove)(struct phy_device *phydev); + /* Handles ethtool queries for hardware time stamping. */ + int (*ts_info)(struct phy_device *phydev, struct ethtool_ts_info *ti); + /* Handles SIOCSHWTSTAMP ioctl for hardware time stamping. */ int (*hwtstamp)(struct phy_device *phydev, struct ifreq *ifr); @@ -477,7 +480,6 @@ static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val) return mdiobus_write(phydev->bus, phydev->addr, regnum, val); } -int get_phy_id(struct mii_bus *bus, int addr, u32 *phy_id); struct phy_device* get_phy_device(struct mii_bus *bus, int addr); int phy_device_register(struct phy_device *phy); int phy_init_hw(struct phy_device *phydev); diff --git a/include/linux/pinctrl/consumer.h b/include/linux/pinctrl/consumer.h index 191e72688481..6dd96fb45482 100644 --- a/include/linux/pinctrl/consumer.h +++ b/include/linux/pinctrl/consumer.h @@ -36,6 +36,9 @@ extern struct pinctrl_state * __must_check pinctrl_lookup_state( const char *name); extern int pinctrl_select_state(struct pinctrl *p, struct pinctrl_state *s); +extern struct pinctrl * __must_check devm_pinctrl_get(struct device *dev); +extern void devm_pinctrl_put(struct pinctrl *p); + #else /* !CONFIG_PINCTRL */ static inline int pinctrl_request_gpio(unsigned gpio) @@ -79,6 +82,15 @@ static inline int pinctrl_select_state(struct pinctrl *p, return 0; } +static inline struct pinctrl * __must_check devm_pinctrl_get(struct device *dev) +{ + return NULL; +} + +static inline void devm_pinctrl_put(struct pinctrl *p) +{ +} + #endif /* CONFIG_PINCTRL */ static inline struct pinctrl * __must_check pinctrl_get_select( @@ -113,6 +125,38 @@ static inline struct pinctrl * __must_check pinctrl_get_select_default( return pinctrl_get_select(dev, PINCTRL_STATE_DEFAULT); } +static inline struct pinctrl * __must_check devm_pinctrl_get_select( + struct device *dev, const char *name) +{ + struct pinctrl *p; + struct pinctrl_state *s; + int ret; + + p = devm_pinctrl_get(dev); + if (IS_ERR(p)) + return p; + + s = pinctrl_lookup_state(p, name); + if (IS_ERR(s)) { + devm_pinctrl_put(p); + return ERR_PTR(PTR_ERR(s)); + } + + ret = pinctrl_select_state(p, s); + if (ret < 0) { + devm_pinctrl_put(p); + return ERR_PTR(ret); + } + + return p; +} + +static inline struct pinctrl * __must_check devm_pinctrl_get_select_default( + struct device *dev) +{ + return devm_pinctrl_get_select(dev, PINCTRL_STATE_DEFAULT); +} + #ifdef CONFIG_PINCONF extern int pin_config_get(const char *dev_name, const char *name, diff --git a/include/linux/pinctrl/machine.h b/include/linux/pinctrl/machine.h index e4d1de742502..7d22ab00343f 100644 --- a/include/linux/pinctrl/machine.h +++ b/include/linux/pinctrl/machine.h @@ -154,7 +154,7 @@ struct pinctrl_map { extern int pinctrl_register_mappings(struct pinctrl_map const *map, unsigned num_maps); - +extern void pinctrl_provide_dummies(void); #else static inline int pinctrl_register_mappings(struct pinctrl_map const *map, @@ -163,5 +163,8 @@ static inline int pinctrl_register_mappings(struct pinctrl_map const *map, return 0; } -#endif /* !CONFIG_PINMUX */ +static inline void pinctrl_provide_dummies(void) +{ +} +#endif /* !CONFIG_PINCTRL */ #endif diff --git a/include/linux/pinctrl/pinconf.h b/include/linux/pinctrl/pinconf.h index ec431f03362d..e7a720104a47 100644 --- a/include/linux/pinctrl/pinconf.h +++ b/include/linux/pinctrl/pinconf.h @@ -25,7 +25,6 @@ struct seq_file; * @pin_config_get: get the config of a certain pin, if the requested config * is not available on this controller this should return -ENOTSUPP * and if it is available but disabled it should return -EINVAL - * @pin_config_get: get the config of a certain pin * @pin_config_set: configure an individual pin * @pin_config_group_get: get configurations for an entire pin group * @pin_config_group_set: configure all pins in a group @@ -33,6 +32,8 @@ struct seq_file; * per-device info for a certain pin in debugfs * @pin_config_group_dbg_show: optional debugfs display hook that will provide * per-device info for a certain group in debugfs + * @pin_config_config_dbg_show: optional debugfs display hook that will decode + * and display a driver's pin configuration parameter */ struct pinconf_ops { #ifdef CONFIG_GENERIC_PINCONF @@ -56,6 +57,9 @@ struct pinconf_ops { void (*pin_config_group_dbg_show) (struct pinctrl_dev *pctldev, struct seq_file *s, unsigned selector); + void (*pin_config_config_dbg_show) (struct pinctrl_dev *pctldev, + struct seq_file *s, + unsigned long config); }; #endif diff --git a/include/linux/pinctrl/pinctrl-state.h b/include/linux/pinctrl/pinctrl-state.h index 3920e28b4da7..634608dc6c89 100644 --- a/include/linux/pinctrl/pinctrl-state.h +++ b/include/linux/pinctrl/pinctrl-state.h @@ -2,5 +2,18 @@ * Standard pin control state definitions */ +/** + * @PINCTRL_STATE_DEFAULT: the state the pinctrl handle shall be put + * into as default, usually this means the pins are up and ready to + * be used by the device driver. This state is commonly used by + * hogs to configure muxing and pins at boot. + * @PINCTRL_STATE_IDLE: the state the pinctrl handle shall be put into + * when the pins are idle. Could typically be set from a + * pm_runtime_suspend() operation. + * @PINCTRL_STATE_SLEEP: the state the pinctrl handle shall be put into + * when the pins are sleeping. Could typically be set from a + * common suspend() function. + */ #define PINCTRL_STATE_DEFAULT "default" #define PINCTRL_STATE_IDLE "idle" +#define PINCTRL_STATE_SLEEP "sleep" diff --git a/include/linux/pinctrl/pinctrl.h b/include/linux/pinctrl/pinctrl.h index 4e9f0788c221..3b894a668d32 100644 --- a/include/linux/pinctrl/pinctrl.h +++ b/include/linux/pinctrl/pinctrl.h @@ -21,9 +21,11 @@ struct device; struct pinctrl_dev; +struct pinctrl_map; struct pinmux_ops; struct pinconf_ops; struct gpio_chip; +struct device_node; /** * struct pinctrl_pin_desc - boards/machines provide information on their @@ -64,17 +66,24 @@ struct pinctrl_gpio_range { /** * struct pinctrl_ops - global pin control operations, to be implemented by * pin controller drivers. - * @list_groups: list the number of selectable named groups available - * in this pinmux driver, the core will begin on 0 and call this - * repeatedly as long as it returns >= 0 to enumerate the groups + * @get_groups_count: Returns the count of total number of groups registered. * @get_group_name: return the group name of the pin group * @get_group_pins: return an array of pins corresponding to a certain * group selector @pins, and the size of the array in @num_pins * @pin_dbg_show: optional debugfs display hook that will provide per-device * info for a certain pin in debugfs + * @dt_node_to_map: parse a device tree "pin configuration node", and create + * mapping table entries for it. These are returned through the @map and + * @num_maps output parameters. This function is optional, and may be + * omitted for pinctrl drivers that do not support device tree. + * @dt_free_map: free mapping table entries created via @dt_node_to_map. The + * top-level @map pointer must be freed, along with any dynamically + * allocated members of the mapping table entries themselves. This + * function is optional, and may be omitted for pinctrl drivers that do + * not support device tree. */ struct pinctrl_ops { - int (*list_groups) (struct pinctrl_dev *pctldev, unsigned selector); + int (*get_groups_count) (struct pinctrl_dev *pctldev); const char *(*get_group_name) (struct pinctrl_dev *pctldev, unsigned selector); int (*get_group_pins) (struct pinctrl_dev *pctldev, @@ -83,6 +92,11 @@ struct pinctrl_ops { unsigned *num_pins); void (*pin_dbg_show) (struct pinctrl_dev *pctldev, struct seq_file *s, unsigned offset); + int (*dt_node_to_map) (struct pinctrl_dev *pctldev, + struct device_node *np_config, + struct pinctrl_map **map, unsigned *num_maps); + void (*dt_free_map) (struct pinctrl_dev *pctldev, + struct pinctrl_map *map, unsigned num_maps); }; /** diff --git a/include/linux/pinctrl/pinmux.h b/include/linux/pinctrl/pinmux.h index 47e9237edd47..1818dcbdd9ab 100644 --- a/include/linux/pinctrl/pinmux.h +++ b/include/linux/pinctrl/pinmux.h @@ -23,15 +23,14 @@ struct pinctrl_dev; /** * struct pinmux_ops - pinmux operations, to be implemented by pin controller * drivers that support pinmuxing - * @request: called by the core to see if a certain pin can be made available + * @request: called by the core to see if a certain pin can be made * available for muxing. This is called by the core to acquire the pins * before selecting any actual mux setting across a function. The driver * is allowed to answer "no" by returning a negative error code * @free: the reverse function of the request() callback, frees a pin after * being requested - * @list_functions: list the number of selectable named functions available - * in this pinmux driver, the core will begin on 0 and call this - * repeatedly as long as it returns >= 0 to enumerate mux settings + * @get_functions_count: returns number of selectable named functions available + * in this pinmux driver * @get_function_name: return the function name of the muxing selector, * called by the core to figure out which mux setting it shall map a * certain device to @@ -62,7 +61,7 @@ struct pinctrl_dev; struct pinmux_ops { int (*request) (struct pinctrl_dev *pctldev, unsigned offset); int (*free) (struct pinctrl_dev *pctldev, unsigned offset); - int (*list_functions) (struct pinctrl_dev *pctldev, unsigned selector); + int (*get_functions_count) (struct pinctrl_dev *pctldev); const char *(*get_function_name) (struct pinctrl_dev *pctldev, unsigned selector); int (*get_function_groups) (struct pinctrl_dev *pctldev, diff --git a/include/linux/pkt_sched.h b/include/linux/pkt_sched.h index 410b33d014d2..32aef0a439ef 100644 --- a/include/linux/pkt_sched.h +++ b/include/linux/pkt_sched.h @@ -509,6 +509,7 @@ enum { TCA_NETEM_CORRUPT, TCA_NETEM_LOSS, TCA_NETEM_RATE, + TCA_NETEM_ECN, __TCA_NETEM_MAX, }; @@ -654,4 +655,84 @@ struct tc_qfq_stats { __u32 lmax; }; +/* CODEL */ + +enum { + TCA_CODEL_UNSPEC, + TCA_CODEL_TARGET, + TCA_CODEL_LIMIT, + TCA_CODEL_INTERVAL, + TCA_CODEL_ECN, + __TCA_CODEL_MAX +}; + +#define TCA_CODEL_MAX (__TCA_CODEL_MAX - 1) + +struct tc_codel_xstats { + __u32 maxpacket; /* largest packet we've seen so far */ + __u32 count; /* how many drops we've done since the last time we + * entered dropping state + */ + __u32 lastcount; /* count at entry to dropping state */ + __u32 ldelay; /* in-queue delay seen by most recently dequeued packet */ + __s32 drop_next; /* time to drop next packet */ + __u32 drop_overlimit; /* number of time max qdisc packet limit was hit */ + __u32 ecn_mark; /* number of packets we ECN marked instead of dropped */ + __u32 dropping; /* are we in dropping state ? */ +}; + +/* FQ_CODEL */ + +enum { + TCA_FQ_CODEL_UNSPEC, + TCA_FQ_CODEL_TARGET, + TCA_FQ_CODEL_LIMIT, + TCA_FQ_CODEL_INTERVAL, + TCA_FQ_CODEL_ECN, + TCA_FQ_CODEL_FLOWS, + TCA_FQ_CODEL_QUANTUM, + __TCA_FQ_CODEL_MAX +}; + +#define TCA_FQ_CODEL_MAX (__TCA_FQ_CODEL_MAX - 1) + +enum { + TCA_FQ_CODEL_XSTATS_QDISC, + TCA_FQ_CODEL_XSTATS_CLASS, +}; + +struct tc_fq_codel_qd_stats { + __u32 maxpacket; /* largest packet we've seen so far */ + __u32 drop_overlimit; /* number of time max qdisc + * packet limit was hit + */ + __u32 ecn_mark; /* number of packets we ECN marked + * instead of being dropped + */ + __u32 new_flow_count; /* number of time packets + * created a 'new flow' + */ + __u32 new_flows_len; /* count of flows in new list */ + __u32 old_flows_len; /* count of flows in old list */ +}; + +struct tc_fq_codel_cl_stats { + __s32 deficit; + __u32 ldelay; /* in-queue delay seen by most recently + * dequeued packet + */ + __u32 count; + __u32 lastcount; + __u32 dropping; + __s32 drop_next; +}; + +struct tc_fq_codel_xstats { + __u32 type; + union { + struct tc_fq_codel_qd_stats qdisc_stats; + struct tc_fq_codel_cl_stats class_stats; + }; +}; + #endif diff --git a/include/linux/platform_data/ehci-sh.h b/include/linux/platform_data/ehci-sh.h new file mode 100644 index 000000000000..5c15a738e116 --- /dev/null +++ b/include/linux/platform_data/ehci-sh.h @@ -0,0 +1,28 @@ +/* + * EHCI SuperH driver platform data + * + * Copyright (C) 2012 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> + * Copyright (C) 2012 Renesas Solutions Corp. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef __USB_EHCI_SH_H +#define __USB_EHCI_SH_H + +struct ehci_sh_platdata { + void (*phy_init)(void); /* Phy init function */ +}; + +#endif /* __USB_EHCI_SH_H */ diff --git a/include/linux/platform_data/gpio-em.h b/include/linux/platform_data/gpio-em.h new file mode 100644 index 000000000000..573edfb046c4 --- /dev/null +++ b/include/linux/platform_data/gpio-em.h @@ -0,0 +1,10 @@ +#ifndef __GPIO_EM_H__ +#define __GPIO_EM_H__ + +struct gpio_em_config { + unsigned int gpio_base; + unsigned int irq_base; + unsigned int number_of_pins; +}; + +#endif /* __GPIO_EM_H__ */ diff --git a/include/linux/platform_data/s3c-hsotg.h b/include/linux/platform_data/s3c-hsotg.h new file mode 100644 index 000000000000..97ec12c2ded4 --- /dev/null +++ b/include/linux/platform_data/s3c-hsotg.h @@ -0,0 +1,35 @@ +/* include/linux/platform_data/s3c-hsotg.h + * + * Copyright 2008 Openmoko, Inc. + * Copyright 2008 Simtec Electronics + * Ben Dooks <ben@simtec.co.uk> + * http://armlinux.simtec.co.uk/ + * + * S3C USB2.0 High-speed / OtG platform information + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +enum s3c_hsotg_dmamode { + S3C_HSOTG_DMA_NONE, /* do not use DMA at-all */ + S3C_HSOTG_DMA_ONLY, /* always use DMA */ + S3C_HSOTG_DMA_DRV, /* DMA is chosen by driver */ +}; + +/** + * struct s3c_hsotg_plat - platform data for high-speed otg/udc + * @dma: Whether to use DMA or not. + * @is_osc: The clock source is an oscillator, not a crystal + */ +struct s3c_hsotg_plat { + enum s3c_hsotg_dmamode dma; + unsigned int is_osc:1; + int phy_type; + + int (*phy_init)(struct platform_device *pdev, int type); + int (*phy_exit)(struct platform_device *pdev, int type); +}; + +extern void s3c_hsotg_set_platdata(struct s3c_hsotg_plat *pd); diff --git a/include/linux/platform_data/tegra_usb.h b/include/linux/platform_data/tegra_usb.h index 6bca5b569acb..66c673fef408 100644 --- a/include/linux/platform_data/tegra_usb.h +++ b/include/linux/platform_data/tegra_usb.h @@ -26,6 +26,7 @@ struct tegra_ehci_platform_data { /* power down the phy on bus suspend */ int power_down_on_bus_suspend; void *phy_config; + int vbus_gpio; }; #endif /* _TEGRA_USB_H_ */ diff --git a/include/linux/platform_data/wiznet.h b/include/linux/platform_data/wiznet.h new file mode 100644 index 000000000000..b5d8c192d84d --- /dev/null +++ b/include/linux/platform_data/wiznet.h @@ -0,0 +1,24 @@ +/* + * Ethernet driver for the WIZnet W5x00 chip. + * + * Licensed under the GPL-2 or later. + */ + +#ifndef PLATFORM_DATA_WIZNET_H +#define PLATFORM_DATA_WIZNET_H + +#include <linux/if_ether.h> + +struct wiznet_platform_data { + int link_gpio; + u8 mac_addr[ETH_ALEN]; +}; + +#ifndef CONFIG_WIZNET_BUS_SHIFT +#define CONFIG_WIZNET_BUS_SHIFT 0 +#endif + +#define W5100_BUS_DIRECT_SIZE (0x8000 << CONFIG_WIZNET_BUS_SHIFT) +#define W5300_BUS_DIRECT_SIZE (0x0400 << CONFIG_WIZNET_BUS_SHIFT) + +#endif /* PLATFORM_DATA_WIZNET_H */ diff --git a/include/linux/prctl.h b/include/linux/prctl.h index e0cfec2490aa..78b76e24cc7e 100644 --- a/include/linux/prctl.h +++ b/include/linux/prctl.h @@ -124,4 +124,19 @@ #define PR_SET_CHILD_SUBREAPER 36 #define PR_GET_CHILD_SUBREAPER 37 +/* + * If no_new_privs is set, then operations that grant new privileges (i.e. + * execve) will either fail or not grant them. This affects suid/sgid, + * file capabilities, and LSMs. + * + * Operations that merely manipulate or drop existing privileges (setresuid, + * capset, etc.) will still work. Drop those privileges if you want them gone. + * + * Changing LSM security domain is considered a new privilege. So, for example, + * asking selinux for a specific new context (e.g. with runcon) will result + * in execve returning -EPERM. + */ +#define PR_SET_NO_NEW_PRIVS 38 +#define PR_GET_NO_NEW_PRIVS 39 + #endif /* _LINUX_PRCTL_H */ diff --git a/include/linux/ptp_clock_kernel.h b/include/linux/ptp_clock_kernel.h index dd2e44fba63e..945704c2ed65 100644 --- a/include/linux/ptp_clock_kernel.h +++ b/include/linux/ptp_clock_kernel.h @@ -136,4 +136,12 @@ struct ptp_clock_event { extern void ptp_clock_event(struct ptp_clock *ptp, struct ptp_clock_event *event); +/** + * ptp_clock_index() - obtain the device index of a PTP clock + * + * @ptp: The clock obtained from ptp_clock_register(). + */ + +extern int ptp_clock_index(struct ptp_clock *ptp); + #endif diff --git a/include/linux/ptrace.h b/include/linux/ptrace.h index 5c719627c2aa..597e4fdb97fe 100644 --- a/include/linux/ptrace.h +++ b/include/linux/ptrace.h @@ -58,6 +58,7 @@ #define PTRACE_EVENT_EXEC 4 #define PTRACE_EVENT_VFORK_DONE 5 #define PTRACE_EVENT_EXIT 6 +#define PTRACE_EVENT_SECCOMP 7 /* Extended result codes which enabled by means other than options. */ #define PTRACE_EVENT_STOP 128 @@ -69,8 +70,9 @@ #define PTRACE_O_TRACEEXEC (1 << PTRACE_EVENT_EXEC) #define PTRACE_O_TRACEVFORKDONE (1 << PTRACE_EVENT_VFORK_DONE) #define PTRACE_O_TRACEEXIT (1 << PTRACE_EVENT_EXIT) +#define PTRACE_O_TRACESECCOMP (1 << PTRACE_EVENT_SECCOMP) -#define PTRACE_O_MASK 0x0000007f +#define PTRACE_O_MASK 0x000000ff #include <asm/ptrace.h> @@ -98,6 +100,7 @@ #define PT_TRACE_EXEC PT_EVENT_FLAG(PTRACE_EVENT_EXEC) #define PT_TRACE_VFORK_DONE PT_EVENT_FLAG(PTRACE_EVENT_VFORK_DONE) #define PT_TRACE_EXIT PT_EVENT_FLAG(PTRACE_EVENT_EXIT) +#define PT_TRACE_SECCOMP PT_EVENT_FLAG(PTRACE_EVENT_SECCOMP) /* single stepping state bits (used on ARM and PA-RISC) */ #define PT_SINGLESTEP_BIT 31 diff --git a/include/linux/rculist.h b/include/linux/rculist.h index d079290843a9..e0f0fab20415 100644 --- a/include/linux/rculist.h +++ b/include/linux/rculist.h @@ -30,6 +30,7 @@ * This is only for internal list manipulation where we know * the prev/next entries already! */ +#ifndef CONFIG_DEBUG_LIST static inline void __list_add_rcu(struct list_head *new, struct list_head *prev, struct list_head *next) { @@ -38,6 +39,10 @@ static inline void __list_add_rcu(struct list_head *new, rcu_assign_pointer(list_next_rcu(prev), new); next->prev = new; } +#else +extern void __list_add_rcu(struct list_head *new, + struct list_head *prev, struct list_head *next); +#endif /** * list_add_rcu - add a new entry to rcu-protected list @@ -108,7 +113,7 @@ static inline void list_add_tail_rcu(struct list_head *new, */ static inline void list_del_rcu(struct list_head *entry) { - __list_del(entry->prev, entry->next); + __list_del_entry(entry); entry->prev = LIST_POISON2; } @@ -228,18 +233,43 @@ static inline void list_splice_init_rcu(struct list_head *list, }) /** - * list_first_entry_rcu - get the first element from a list + * Where are list_empty_rcu() and list_first_entry_rcu()? + * + * Implementing those functions following their counterparts list_empty() and + * list_first_entry() is not advisable because they lead to subtle race + * conditions as the following snippet shows: + * + * if (!list_empty_rcu(mylist)) { + * struct foo *bar = list_first_entry_rcu(mylist, struct foo, list_member); + * do_something(bar); + * } + * + * The list may not be empty when list_empty_rcu checks it, but it may be when + * list_first_entry_rcu rereads the ->next pointer. + * + * Rereading the ->next pointer is not a problem for list_empty() and + * list_first_entry() because they would be protected by a lock that blocks + * writers. + * + * See list_first_or_null_rcu for an alternative. + */ + +/** + * list_first_or_null_rcu - get the first element from a list * @ptr: the list head to take the element from. * @type: the type of the struct this is embedded in. * @member: the name of the list_struct within the struct. * - * Note, that list is expected to be not empty. + * Note that if the list is empty, it returns NULL. * * This primitive may safely run concurrently with the _rcu list-mutation * primitives such as list_add_rcu() as long as it's guarded by rcu_read_lock(). */ -#define list_first_entry_rcu(ptr, type, member) \ - list_entry_rcu((ptr)->next, type, member) +#define list_first_or_null_rcu(ptr, type, member) \ + ({struct list_head *__ptr = (ptr); \ + struct list_head __rcu *__next = list_next_rcu(__ptr); \ + likely(__ptr != __next) ? container_of(__next, type, member) : NULL; \ + }) /** * list_for_each_entry_rcu - iterate over rcu list of given type diff --git a/include/linux/rcupdate.h b/include/linux/rcupdate.h index 20fb776a1d4a..26d1a47591f1 100644 --- a/include/linux/rcupdate.h +++ b/include/linux/rcupdate.h @@ -184,12 +184,14 @@ static inline int rcu_preempt_depth(void) /* Internal to kernel */ extern void rcu_sched_qs(int cpu); extern void rcu_bh_qs(int cpu); +extern void rcu_preempt_note_context_switch(void); extern void rcu_check_callbacks(int cpu, int user); struct notifier_block; extern void rcu_idle_enter(void); extern void rcu_idle_exit(void); extern void rcu_irq_enter(void); extern void rcu_irq_exit(void); +extern void exit_rcu(void); /** * RCU_NONIDLE - Indicate idle-loop code that needs RCU readers @@ -922,6 +924,21 @@ void __kfree_rcu(struct rcu_head *head, unsigned long offset) kfree_call_rcu(head, (rcu_callback)offset); } +/* + * Does the specified offset indicate that the corresponding rcu_head + * structure can be handled by kfree_rcu()? + */ +#define __is_kfree_rcu_offset(offset) ((offset) < 4096) + +/* + * Helper macro for kfree_rcu() to prevent argument-expansion eyestrain. + */ +#define __kfree_rcu(head, offset) \ + do { \ + BUILD_BUG_ON(!__is_kfree_rcu_offset(offset)); \ + call_rcu(head, (void (*)(struct rcu_head *))(unsigned long)(offset)); \ + } while (0) + /** * kfree_rcu() - kfree an object after a grace period. * @ptr: pointer to kfree @@ -944,6 +961,9 @@ void __kfree_rcu(struct rcu_head *head, unsigned long offset) * * Note that the allowable offset might decrease in the future, for example, * to allow something like kmem_cache_free_rcu(). + * + * The BUILD_BUG_ON check must not involve any function calls, hence the + * checks are done in macros here. */ #define kfree_rcu(ptr, rcu_head) \ __kfree_rcu(&((ptr)->rcu_head), offsetof(typeof(*(ptr)), rcu_head)) diff --git a/include/linux/rcutiny.h b/include/linux/rcutiny.h index e93df77176d1..adb5e5a38cae 100644 --- a/include/linux/rcutiny.h +++ b/include/linux/rcutiny.h @@ -87,14 +87,6 @@ static inline void kfree_call_rcu(struct rcu_head *head, #ifdef CONFIG_TINY_RCU -static inline void rcu_preempt_note_context_switch(void) -{ -} - -static inline void exit_rcu(void) -{ -} - static inline int rcu_needs_cpu(int cpu) { return 0; @@ -102,8 +94,6 @@ static inline int rcu_needs_cpu(int cpu) #else /* #ifdef CONFIG_TINY_RCU */ -void rcu_preempt_note_context_switch(void); -extern void exit_rcu(void); int rcu_preempt_needs_cpu(void); static inline int rcu_needs_cpu(int cpu) @@ -116,7 +106,6 @@ static inline int rcu_needs_cpu(int cpu) static inline void rcu_note_context_switch(int cpu) { rcu_sched_qs(cpu); - rcu_preempt_note_context_switch(); } /* diff --git a/include/linux/rcutree.h b/include/linux/rcutree.h index e8ee5dd0854c..3c6083cde4fc 100644 --- a/include/linux/rcutree.h +++ b/include/linux/rcutree.h @@ -45,18 +45,6 @@ static inline void rcu_virt_note_context_switch(int cpu) rcu_note_context_switch(cpu); } -#ifdef CONFIG_TREE_PREEMPT_RCU - -extern void exit_rcu(void); - -#else /* #ifdef CONFIG_TREE_PREEMPT_RCU */ - -static inline void exit_rcu(void) -{ -} - -#endif /* #else #ifdef CONFIG_TREE_PREEMPT_RCU */ - extern void synchronize_rcu_bh(void); extern void synchronize_sched_expedited(void); extern void synchronize_rcu_expedited(void); @@ -98,13 +86,6 @@ extern void rcu_force_quiescent_state(void); extern void rcu_bh_force_quiescent_state(void); extern void rcu_sched_force_quiescent_state(void); -/* A context switch is a grace period for RCU-sched and RCU-bh. */ -static inline int rcu_blocking_is_gp(void) -{ - might_sleep(); /* Check for RCU read-side critical section. */ - return num_online_cpus() == 1; -} - extern void rcu_scheduler_starting(void); extern int rcu_scheduler_active __read_mostly; diff --git a/include/linux/regmap.h b/include/linux/regmap.h index a90abb6bfa64..56af22ec9aba 100644 --- a/include/linux/regmap.h +++ b/include/linux/regmap.h @@ -46,7 +46,13 @@ struct reg_default { /** * Configuration for the register map of a device. * + * @name: Optional name of the regmap. Useful when a device has multiple + * register regions. + * * @reg_bits: Number of bits in a register address, mandatory. + * @reg_stride: The register address stride. Valid register addresses are a + * multiple of this value. If set to 0, a value of 1 will be + * used. * @pad_bits: Number of bits of padding between register and value. * @val_bits: Number of bits in a register value, mandatory. * @@ -70,6 +76,9 @@ struct reg_default { * @write_flag_mask: Mask to be set in the top byte of the register when doing * a write. If both read_flag_mask and write_flag_mask are * empty the regmap_bus default masks are used. + * @use_single_rw: If set, converts the bulk read and write operations into + * a series of single read and write operations. This is useful + * for device that does not support bulk read and write. * * @cache_type: The actual cache type. * @reg_defaults_raw: Power on reset values for registers (for use with @@ -77,7 +86,10 @@ struct reg_default { * @num_reg_defaults_raw: Number of elements in reg_defaults_raw. */ struct regmap_config { + const char *name; + int reg_bits; + int reg_stride; int pad_bits; int val_bits; @@ -95,20 +107,25 @@ struct regmap_config { u8 read_flag_mask; u8 write_flag_mask; + + bool use_single_rw; }; -typedef int (*regmap_hw_write)(struct device *dev, const void *data, +typedef int (*regmap_hw_write)(void *context, const void *data, size_t count); -typedef int (*regmap_hw_gather_write)(struct device *dev, +typedef int (*regmap_hw_gather_write)(void *context, const void *reg, size_t reg_len, const void *val, size_t val_len); -typedef int (*regmap_hw_read)(struct device *dev, +typedef int (*regmap_hw_read)(void *context, const void *reg_buf, size_t reg_size, void *val_buf, size_t val_size); +typedef void (*regmap_hw_free_context)(void *context); /** * Description of a hardware bus for the register map infrastructure. * + * @fast_io: Register IO is fast. Use a spinlock instead of a mutex + * to perform locking. * @write: Write operation. * @gather_write: Write operation with split register/value, return -ENOTSUPP * if not implemented on a given device. @@ -118,31 +135,42 @@ typedef int (*regmap_hw_read)(struct device *dev, * a read. */ struct regmap_bus { + bool fast_io; regmap_hw_write write; regmap_hw_gather_write gather_write; regmap_hw_read read; + regmap_hw_free_context free_context; u8 read_flag_mask; }; struct regmap *regmap_init(struct device *dev, const struct regmap_bus *bus, + void *bus_context, const struct regmap_config *config); struct regmap *regmap_init_i2c(struct i2c_client *i2c, const struct regmap_config *config); struct regmap *regmap_init_spi(struct spi_device *dev, const struct regmap_config *config); +struct regmap *regmap_init_mmio(struct device *dev, + void __iomem *regs, + const struct regmap_config *config); struct regmap *devm_regmap_init(struct device *dev, const struct regmap_bus *bus, + void *bus_context, const struct regmap_config *config); struct regmap *devm_regmap_init_i2c(struct i2c_client *i2c, const struct regmap_config *config); struct regmap *devm_regmap_init_spi(struct spi_device *dev, const struct regmap_config *config); +struct regmap *devm_regmap_init_mmio(struct device *dev, + void __iomem *regs, + const struct regmap_config *config); void regmap_exit(struct regmap *map); int regmap_reinit_cache(struct regmap *map, const struct regmap_config *config); +struct regmap *dev_get_regmap(struct device *dev, const char *name); int regmap_write(struct regmap *map, unsigned int reg, unsigned int val); int regmap_raw_write(struct regmap *map, unsigned int reg, const void *val, size_t val_len); @@ -191,6 +219,7 @@ struct regmap_irq { * @status_base: Base status register address. * @mask_base: Base mask register address. * @ack_base: Base ack address. If zero then the chip is clear on read. + * @irq_reg_stride: Stride to use for chips where registers are not contiguous. * * @num_regs: Number of registers in each control bank. * @irqs: Descriptors for individual IRQs. Interrupt numbers are @@ -203,6 +232,7 @@ struct regmap_irq_chip { unsigned int status_base; unsigned int mask_base; unsigned int ack_base; + unsigned int irq_reg_stride; int num_regs; @@ -217,6 +247,7 @@ int regmap_add_irq_chip(struct regmap *map, int irq, int irq_flags, struct regmap_irq_chip_data **data); void regmap_del_irq_chip(int irq, struct regmap_irq_chip_data *data); int regmap_irq_chip_get_base(struct regmap_irq_chip_data *data); +int regmap_irq_get_virq(struct regmap_irq_chip_data *data, int irq); #else @@ -327,6 +358,13 @@ static inline int regmap_register_patch(struct regmap *map, return -EINVAL; } +static inline struct regmap *dev_get_regmap(struct device *dev, + const char *name) +{ + WARN_ONCE(1, "regmap API is disabled"); + return NULL; +} + #endif #endif diff --git a/include/linux/regulator/driver.h b/include/linux/regulator/driver.h index fa8b55b8191c..b0432cc2b169 100644 --- a/include/linux/regulator/driver.h +++ b/include/linux/regulator/driver.h @@ -19,6 +19,7 @@ #include <linux/notifier.h> #include <linux/regulator/consumer.h> +struct regmap; struct regulator_dev; struct regulator_init_data; @@ -45,6 +46,7 @@ enum regulator_status { * The driver should select the voltage closest to min_uV. * @set_voltage_sel: Set the voltage for the regulator using the specified * selector. + * @map_voltage: Convert a voltage into a selector * @get_voltage: Return the currently configured voltage for the regulator. * @get_voltage_sel: Return the currently configured voltage selector for the * regulator. @@ -90,6 +92,7 @@ struct regulator_ops { /* get/set regulator voltage */ int (*set_voltage) (struct regulator_dev *, int min_uV, int max_uV, unsigned *selector); + int (*map_voltage)(struct regulator_dev *, int min_uV, int max_uV); int (*set_voltage_sel) (struct regulator_dev *, unsigned selector); int (*get_voltage) (struct regulator_dev *); int (*get_voltage_sel) (struct regulator_dev *); @@ -148,19 +151,30 @@ enum regulator_type { }; /** - * struct regulator_desc - Regulator descriptor + * struct regulator_desc - Static regulator descriptor * - * Each regulator registered with the core is described with a structure of - * this type. + * Each regulator registered with the core is described with a + * structure of this type and a struct regulator_config. This + * structure contains the non-varying parts of the regulator + * description. * * @name: Identifying name for the regulator. * @supply_name: Identifying the regulator supply * @id: Numerical identifier for the regulator. - * @n_voltages: Number of selectors available for ops.list_voltage(). * @ops: Regulator operations table. * @irq: Interrupt number for the regulator. * @type: Indicates if the regulator is a voltage or current regulator. * @owner: Module providing the regulator, used for refcounting. + * + * @n_voltages: Number of selectors available for ops.list_voltage(). + * + * @min_uV: Voltage given by the lowest selector (if linear mapping) + * @uV_step: Voltage increase with each selector (if linear mapping) + * + * @vsel_reg: Register for selector when using regulator_regmap_X_voltage_ + * @vsel_mask: Mask for register bitfield used for selector + * @enable_reg: Register for control when using regmap enable/disable ops + * @enable_mask: Mask for control when using regmap enable/disable ops */ struct regulator_desc { const char *name; @@ -171,6 +185,36 @@ struct regulator_desc { int irq; enum regulator_type type; struct module *owner; + + unsigned int min_uV; + unsigned int uV_step; + + unsigned int vsel_reg; + unsigned int vsel_mask; + unsigned int enable_reg; + unsigned int enable_mask; +}; + +/** + * struct regulator_config - Dynamic regulator descriptor + * + * Each regulator registered with the core is described with a + * structure of this type and a struct regulator_desc. This structure + * contains the runtime variable parts of the regulator description. + * + * @dev: struct device for the regulator + * @init_data: platform provided init data, passed through by driver + * @driver_data: private regulator data + * @of_node: OpenFirmware node to parse for device tree bindings (may be + * NULL). + * @regmap: regmap to use for core regmap helpers + */ +struct regulator_config { + struct device *dev; + const struct regulator_init_data *init_data; + void *driver_data; + struct device_node *of_node; + struct regmap *regmap; }; /* @@ -184,7 +228,7 @@ struct regulator_desc { * no other direct access). */ struct regulator_dev { - struct regulator_desc *desc; + const struct regulator_desc *desc; int exclusive; u32 use_count; u32 open_count; @@ -201,6 +245,7 @@ struct regulator_dev { struct device dev; struct regulation_constraints *constraints; struct regulator *supply; /* for tree */ + struct regmap *regmap; struct delayed_work disable_work; int deferred_disables; @@ -210,9 +255,9 @@ struct regulator_dev { struct dentry *debugfs; }; -struct regulator_dev *regulator_register(struct regulator_desc *regulator_desc, - struct device *dev, const struct regulator_init_data *init_data, - void *driver_data, struct device_node *of_node); +struct regulator_dev * +regulator_register(const struct regulator_desc *regulator_desc, + const struct regulator_config *config); void regulator_unregister(struct regulator_dev *rdev); int regulator_notifier_call_chain(struct regulator_dev *rdev, @@ -224,6 +269,18 @@ int rdev_get_id(struct regulator_dev *rdev); int regulator_mode_to_status(unsigned int); +int regulator_list_voltage_linear(struct regulator_dev *rdev, + unsigned int selector); +int regulator_map_voltage_linear(struct regulator_dev *rdev, + int min_uV, int max_uV); +int regulator_map_voltage_iterate(struct regulator_dev *rdev, + int min_uV, int max_uV); +int regulator_get_voltage_sel_regmap(struct regulator_dev *rdev); +int regulator_set_voltage_sel_regmap(struct regulator_dev *rdev, unsigned sel); +int regulator_is_enabled_regmap(struct regulator_dev *rdev); +int regulator_enable_regmap(struct regulator_dev *rdev); +int regulator_disable_regmap(struct regulator_dev *rdev); + void *regulator_get_init_drvdata(struct regulator_init_data *reg_init_data); #endif diff --git a/include/linux/regulator/fixed.h b/include/linux/regulator/fixed.h index 936a7d8c11a9..f83f7440b488 100644 --- a/include/linux/regulator/fixed.h +++ b/include/linux/regulator/fixed.h @@ -26,6 +26,12 @@ struct regulator_init_data; * @gpio: GPIO to use for enable control * set to -EINVAL if not used * @startup_delay: Start-up time in microseconds + * @gpio_is_open_drain: Gpio pin is open drain or normal type. + * If it is open drain type then HIGH will be set + * through PULL-UP with setting gpio as input + * and low will be set as gpio-output with driven + * to low. For non-open-drain case, the gpio will + * will be in output and drive to low/high accordingly. * @enable_high: Polarity of enable GPIO * 1 = Active high, 0 = Active low * @enabled_at_boot: Whether regulator has been enabled at @@ -43,6 +49,7 @@ struct fixed_voltage_config { int microvolts; int gpio; unsigned startup_delay; + unsigned gpio_is_open_drain:1; unsigned enable_high:1; unsigned enabled_at_boot:1; struct regulator_init_data *init_data; diff --git a/include/linux/regulator/of_regulator.h b/include/linux/regulator/of_regulator.h index 769704f296e5..f9217965aaa3 100644 --- a/include/linux/regulator/of_regulator.h +++ b/include/linux/regulator/of_regulator.h @@ -6,10 +6,20 @@ #ifndef __LINUX_OF_REG_H #define __LINUX_OF_REG_H +struct of_regulator_match { + const char *name; + void *driver_data; + struct regulator_init_data *init_data; + struct device_node *of_node; +}; + #if defined(CONFIG_OF) extern struct regulator_init_data *of_get_regulator_init_data(struct device *dev, struct device_node *node); +extern int of_regulator_match(struct device *dev, struct device_node *node, + struct of_regulator_match *matches, + unsigned int num_matches); #else static inline struct regulator_init_data *of_get_regulator_init_data(struct device *dev, @@ -17,6 +27,14 @@ static inline struct regulator_init_data { return NULL; } + +static inline int of_regulator_match(struct device *dev, + struct device_node *node, + struct of_regulator_match *matches, + unsigned int num_matches) +{ + return 0; +} #endif /* CONFIG_OF */ #endif /* __LINUX_OF_REG_H */ diff --git a/include/linux/regulator/tps62360.h b/include/linux/regulator/tps62360.h index 6a5c1b2c751e..a4c49394c497 100644 --- a/include/linux/regulator/tps62360.h +++ b/include/linux/regulator/tps62360.h @@ -26,13 +26,10 @@ #ifndef __LINUX_REGULATOR_TPS62360_H #define __LINUX_REGULATOR_TPS62360_H -#include <linux/regulator/machine.h> - /* * struct tps62360_regulator_platform_data - tps62360 regulator platform data. * * @reg_init_data: The regulator init data. - * @en_force_pwm: Enable force pwm or not. * @en_discharge: Enable discharge the output capacitor via internal * register. * @en_internal_pulldn: internal pull down enable or not. @@ -44,8 +41,7 @@ * @vsel1_def_state: Default state of vsel1. 1 if it is high else 0. */ struct tps62360_regulator_platform_data { - struct regulator_init_data reg_init_data; - bool en_force_pwm; + struct regulator_init_data *reg_init_data; bool en_discharge; bool en_internal_pulldn; int vsel0_gpio; diff --git a/include/linux/regulator/tps65090-regulator.h b/include/linux/regulator/tps65090-regulator.h new file mode 100644 index 000000000000..0fa04b64db3e --- /dev/null +++ b/include/linux/regulator/tps65090-regulator.h @@ -0,0 +1,50 @@ +/* + * Regulator driver interface for TI TPS65090 PMIC family + * + * Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. + + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + + * You should have received a copy of the GNU General Public License + * along with this program. If not, see <http://www.gnu.org/licenses/>. + */ + +#ifndef __REGULATOR_TPS65090_H +#define __REGULATOR_TPS65090_H + +#include <linux/regulator/machine.h> + +#define tps65090_rails(_name) "tps65090_"#_name + +enum { + TPS65090_ID_DCDC1, + TPS65090_ID_DCDC2, + TPS65090_ID_DCDC3, + TPS65090_ID_FET1, + TPS65090_ID_FET2, + TPS65090_ID_FET3, + TPS65090_ID_FET4, + TPS65090_ID_FET5, + TPS65090_ID_FET6, + TPS65090_ID_FET7, +}; + +/* + * struct tps65090_regulator_platform_data + * + * @regulator: The regulator init data. + * @slew_rate_uV_per_us: Slew rate microvolt per microsec. + */ + +struct tps65090_regulator_platform_data { + struct regulator_init_data regulator; +}; + +#endif /* __REGULATOR_TPS65090_H */ diff --git a/include/linux/rndis.h b/include/linux/rndis.h new file mode 100644 index 000000000000..0c8dc7195cdb --- /dev/null +++ b/include/linux/rndis.h @@ -0,0 +1,390 @@ +/* + * Remote Network Driver Interface Specification (RNDIS) + * definitions of the magic numbers used by this protocol + */ + +/* Remote NDIS Versions */ +#define RNDIS_MAJOR_VERSION 0x00000001 +#define RNDIS_MINOR_VERSION 0x00000000 + +/* Device Flags */ +#define RNDIS_DF_CONNECTIONLESS 0x00000001U +#define RNDIS_DF_CONNECTION_ORIENTED 0x00000002U +#define RNDIS_DF_RAW_DATA 0x00000004U + +/* + * Codes for "msg_type" field of rndis messages; + * only the data channel uses packet messages (maybe batched); + * everything else goes on the control channel. + */ +#define RNDIS_MSG_COMPLETION 0x80000000 +#define RNDIS_MSG_PACKET 0x00000001 /* 1-N packets */ +#define RNDIS_MSG_INIT 0x00000002 +#define RNDIS_MSG_INIT_C (RNDIS_MSG_INIT|RNDIS_MSG_COMPLETION) +#define RNDIS_MSG_HALT 0x00000003 +#define RNDIS_MSG_QUERY 0x00000004 +#define RNDIS_MSG_QUERY_C (RNDIS_MSG_QUERY|RNDIS_MSG_COMPLETION) +#define RNDIS_MSG_SET 0x00000005 +#define RNDIS_MSG_SET_C (RNDIS_MSG_SET|RNDIS_MSG_COMPLETION) +#define RNDIS_MSG_RESET 0x00000006 +#define RNDIS_MSG_RESET_C (RNDIS_MSG_RESET|RNDIS_MSG_COMPLETION) +#define RNDIS_MSG_INDICATE 0x00000007 +#define RNDIS_MSG_KEEPALIVE 0x00000008 +#define RNDIS_MSG_KEEPALIVE_C (RNDIS_MSG_KEEPALIVE|RNDIS_MSG_COMPLETION) +/* + * Reserved message type for private communication between lower-layer host + * driver and remote device, if necessary. + */ +#define RNDIS_MSG_BUS 0xff000001 + +/* codes for "status" field of completion messages */ +#define RNDIS_STATUS_SUCCESS 0x00000000 +#define RNDIS_STATUS_PENDING 0x00000103 + +/* Status codes */ +#define RNDIS_STATUS_NOT_RECOGNIZED 0x00010001 +#define RNDIS_STATUS_NOT_COPIED 0x00010002 +#define RNDIS_STATUS_NOT_ACCEPTED 0x00010003 +#define RNDIS_STATUS_CALL_ACTIVE 0x00010007 + +#define RNDIS_STATUS_ONLINE 0x40010003 +#define RNDIS_STATUS_RESET_START 0x40010004 +#define RNDIS_STATUS_RESET_END 0x40010005 +#define RNDIS_STATUS_RING_STATUS 0x40010006 +#define RNDIS_STATUS_CLOSED 0x40010007 +#define RNDIS_STATUS_WAN_LINE_UP 0x40010008 +#define RNDIS_STATUS_WAN_LINE_DOWN 0x40010009 +#define RNDIS_STATUS_WAN_FRAGMENT 0x4001000A +#define RNDIS_STATUS_MEDIA_CONNECT 0x4001000B +#define RNDIS_STATUS_MEDIA_DISCONNECT 0x4001000C +#define RNDIS_STATUS_HARDWARE_LINE_UP 0x4001000D +#define RNDIS_STATUS_HARDWARE_LINE_DOWN 0x4001000E +#define RNDIS_STATUS_INTERFACE_UP 0x4001000F +#define RNDIS_STATUS_INTERFACE_DOWN 0x40010010 +#define RNDIS_STATUS_MEDIA_BUSY 0x40010011 +#define RNDIS_STATUS_MEDIA_SPECIFIC_INDICATION 0x40010012 +#define RNDIS_STATUS_WW_INDICATION RDIA_SPECIFIC_INDICATION +#define RNDIS_STATUS_LINK_SPEED_CHANGE 0x40010013L + +#define RNDIS_STATUS_NOT_RESETTABLE 0x80010001 +#define RNDIS_STATUS_SOFT_ERRORS 0x80010003 +#define RNDIS_STATUS_HARD_ERRORS 0x80010004 +#define RNDIS_STATUS_BUFFER_OVERFLOW 0x80000005 + +#define RNDIS_STATUS_FAILURE 0xC0000001 +#define RNDIS_STATUS_RESOURCES 0xC000009A +#define RNDIS_STATUS_NOT_SUPPORTED 0xc00000BB +#define RNDIS_STATUS_CLOSING 0xC0010002 +#define RNDIS_STATUS_BAD_VERSION 0xC0010004 +#define RNDIS_STATUS_BAD_CHARACTERISTICS 0xC0010005 +#define RNDIS_STATUS_ADAPTER_NOT_FOUND 0xC0010006 +#define RNDIS_STATUS_OPEN_FAILED 0xC0010007 +#define RNDIS_STATUS_DEVICE_FAILED 0xC0010008 +#define RNDIS_STATUS_MULTICAST_FULL 0xC0010009 +#define RNDIS_STATUS_MULTICAST_EXISTS 0xC001000A +#define RNDIS_STATUS_MULTICAST_NOT_FOUND 0xC001000B +#define RNDIS_STATUS_REQUEST_ABORTED 0xC001000C +#define RNDIS_STATUS_RESET_IN_PROGRESS 0xC001000D +#define RNDIS_STATUS_CLOSING_INDICATING 0xC001000E +#define RNDIS_STATUS_INVALID_PACKET 0xC001000F +#define RNDIS_STATUS_OPEN_LIST_FULL 0xC0010010 +#define RNDIS_STATUS_ADAPTER_NOT_READY 0xC0010011 +#define RNDIS_STATUS_ADAPTER_NOT_OPEN 0xC0010012 +#define RNDIS_STATUS_NOT_INDICATING 0xC0010013 +#define RNDIS_STATUS_INVALID_LENGTH 0xC0010014 +#define RNDIS_STATUS_INVALID_DATA 0xC0010015 +#define RNDIS_STATUS_BUFFER_TOO_SHORT 0xC0010016 +#define RNDIS_STATUS_INVALID_OID 0xC0010017 +#define RNDIS_STATUS_ADAPTER_REMOVED 0xC0010018 +#define RNDIS_STATUS_UNSUPPORTED_MEDIA 0xC0010019 +#define RNDIS_STATUS_GROUP_ADDRESS_IN_USE 0xC001001A +#define RNDIS_STATUS_FILE_NOT_FOUND 0xC001001B +#define RNDIS_STATUS_ERROR_READING_FILE 0xC001001C +#define RNDIS_STATUS_ALREADY_MAPPED 0xC001001D +#define RNDIS_STATUS_RESOURCE_CONFLICT 0xC001001E +#define RNDIS_STATUS_NO_CABLE 0xC001001F + +#define RNDIS_STATUS_INVALID_SAP 0xC0010020 +#define RNDIS_STATUS_SAP_IN_USE 0xC0010021 +#define RNDIS_STATUS_INVALID_ADDRESS 0xC0010022 +#define RNDIS_STATUS_VC_NOT_ACTIVATED 0xC0010023 +#define RNDIS_STATUS_DEST_OUT_OF_ORDER 0xC0010024 +#define RNDIS_STATUS_VC_NOT_AVAILABLE 0xC0010025 +#define RNDIS_STATUS_CELLRATE_NOT_AVAILABLE 0xC0010026 +#define RNDIS_STATUS_INCOMPATABLE_QOS 0xC0010027 +#define RNDIS_STATUS_AAL_PARAMS_UNSUPPORTED 0xC0010028 +#define RNDIS_STATUS_NO_ROUTE_TO_DESTINATION 0xC0010029 + +#define RNDIS_STATUS_TOKEN_RING_OPEN_ERROR 0xC0011000 + +/* codes for RNDIS_OID_GEN_PHYSICAL_MEDIUM */ +#define RNDIS_PHYSICAL_MEDIUM_UNSPECIFIED 0x00000000 +#define RNDIS_PHYSICAL_MEDIUM_WIRELESS_LAN 0x00000001 +#define RNDIS_PHYSICAL_MEDIUM_CABLE_MODEM 0x00000002 +#define RNDIS_PHYSICAL_MEDIUM_PHONE_LINE 0x00000003 +#define RNDIS_PHYSICAL_MEDIUM_POWER_LINE 0x00000004 +#define RNDIS_PHYSICAL_MEDIUM_DSL 0x00000005 +#define RNDIS_PHYSICAL_MEDIUM_FIBRE_CHANNEL 0x00000006 +#define RNDIS_PHYSICAL_MEDIUM_1394 0x00000007 +#define RNDIS_PHYSICAL_MEDIUM_WIRELESS_WAN 0x00000008 +#define RNDIS_PHYSICAL_MEDIUM_MAX 0x00000009 + +/* Remote NDIS medium types. */ +#define RNDIS_MEDIUM_UNSPECIFIED 0x00000000 +#define RNDIS_MEDIUM_802_3 0x00000000 +#define RNDIS_MEDIUM_802_5 0x00000001 +#define RNDIS_MEDIUM_FDDI 0x00000002 +#define RNDIS_MEDIUM_WAN 0x00000003 +#define RNDIS_MEDIUM_LOCAL_TALK 0x00000004 +#define RNDIS_MEDIUM_ARCNET_RAW 0x00000006 +#define RNDIS_MEDIUM_ARCNET_878_2 0x00000007 +#define RNDIS_MEDIUM_ATM 0x00000008 +#define RNDIS_MEDIUM_WIRELESS_LAN 0x00000009 +#define RNDIS_MEDIUM_IRDA 0x0000000A +#define RNDIS_MEDIUM_BPC 0x0000000B +#define RNDIS_MEDIUM_CO_WAN 0x0000000C +#define RNDIS_MEDIUM_1394 0x0000000D +/* Not a real medium, defined as an upper-bound */ +#define RNDIS_MEDIUM_MAX 0x0000000E + +/* Remote NDIS medium connection states. */ +#define RNDIS_MEDIA_STATE_CONNECTED 0x00000000 +#define RNDIS_MEDIA_STATE_DISCONNECTED 0x00000001 + +/* packet filter bits used by RNDIS_OID_GEN_CURRENT_PACKET_FILTER */ +#define RNDIS_PACKET_TYPE_DIRECTED 0x00000001 +#define RNDIS_PACKET_TYPE_MULTICAST 0x00000002 +#define RNDIS_PACKET_TYPE_ALL_MULTICAST 0x00000004 +#define RNDIS_PACKET_TYPE_BROADCAST 0x00000008 +#define RNDIS_PACKET_TYPE_SOURCE_ROUTING 0x00000010 +#define RNDIS_PACKET_TYPE_PROMISCUOUS 0x00000020 +#define RNDIS_PACKET_TYPE_SMT 0x00000040 +#define RNDIS_PACKET_TYPE_ALL_LOCAL 0x00000080 +#define RNDIS_PACKET_TYPE_GROUP 0x00001000 +#define RNDIS_PACKET_TYPE_ALL_FUNCTIONAL 0x00002000 +#define RNDIS_PACKET_TYPE_FUNCTIONAL 0x00004000 +#define RNDIS_PACKET_TYPE_MAC_FRAME 0x00008000 + +/* RNDIS_OID_GEN_MINIPORT_INFO constants */ +#define RNDIS_MINIPORT_BUS_MASTER 0x00000001 +#define RNDIS_MINIPORT_WDM_DRIVER 0x00000002 +#define RNDIS_MINIPORT_SG_LIST 0x00000004 +#define RNDIS_MINIPORT_SUPPORTS_MEDIA_QUERY 0x00000008 +#define RNDIS_MINIPORT_INDICATES_PACKETS 0x00000010 +#define RNDIS_MINIPORT_IGNORE_PACKET_QUEUE 0x00000020 +#define RNDIS_MINIPORT_IGNORE_REQUEST_QUEUE 0x00000040 +#define RNDIS_MINIPORT_IGNORE_TOKEN_RING_ERRORS 0x00000080 +#define RNDIS_MINIPORT_INTERMEDIATE_DRIVER 0x00000100 +#define RNDIS_MINIPORT_IS_NDIS_5 0x00000200 +#define RNDIS_MINIPORT_IS_CO 0x00000400 +#define RNDIS_MINIPORT_DESERIALIZE 0x00000800 +#define RNDIS_MINIPORT_REQUIRES_MEDIA_POLLING 0x00001000 +#define RNDIS_MINIPORT_SUPPORTS_MEDIA_SENSE 0x00002000 +#define RNDIS_MINIPORT_NETBOOT_CARD 0x00004000 +#define RNDIS_MINIPORT_PM_SUPPORTED 0x00008000 +#define RNDIS_MINIPORT_SUPPORTS_MAC_ADDRESS_OVERWRITE 0x00010000 +#define RNDIS_MINIPORT_USES_SAFE_BUFFER_APIS 0x00020000 +#define RNDIS_MINIPORT_HIDDEN 0x00040000 +#define RNDIS_MINIPORT_SWENUM 0x00080000 +#define RNDIS_MINIPORT_SURPRISE_REMOVE_OK 0x00100000 +#define RNDIS_MINIPORT_NO_HALT_ON_SUSPEND 0x00200000 +#define RNDIS_MINIPORT_HARDWARE_DEVICE 0x00400000 +#define RNDIS_MINIPORT_SUPPORTS_CANCEL_SEND_PACKETS 0x00800000 +#define RNDIS_MINIPORT_64BITS_DMA 0x01000000 + +#define RNDIS_MAC_OPTION_COPY_LOOKAHEAD_DATA 0x00000001 +#define RNDIS_MAC_OPTION_RECEIVE_SERIALIZED 0x00000002 +#define RNDIS_MAC_OPTION_TRANSFERS_NOT_PEND 0x00000004 +#define RNDIS_MAC_OPTION_NO_LOOPBACK 0x00000008 +#define RNDIS_MAC_OPTION_FULL_DUPLEX 0x00000010 +#define RNDIS_MAC_OPTION_EOTX_INDICATION 0x00000020 +#define RNDIS_MAC_OPTION_8021P_PRIORITY 0x00000040 +#define RNDIS_MAC_OPTION_RESERVED 0x80000000 + +/* Object Identifiers used by NdisRequest Query/Set Information */ +/* General (Required) Objects */ +#define RNDIS_OID_GEN_SUPPORTED_LIST 0x00010101 +#define RNDIS_OID_GEN_HARDWARE_STATUS 0x00010102 +#define RNDIS_OID_GEN_MEDIA_SUPPORTED 0x00010103 +#define RNDIS_OID_GEN_MEDIA_IN_USE 0x00010104 +#define RNDIS_OID_GEN_MAXIMUM_LOOKAHEAD 0x00010105 +#define RNDIS_OID_GEN_MAXIMUM_FRAME_SIZE 0x00010106 +#define RNDIS_OID_GEN_LINK_SPEED 0x00010107 +#define RNDIS_OID_GEN_TRANSMIT_BUFFER_SPACE 0x00010108 +#define RNDIS_OID_GEN_RECEIVE_BUFFER_SPACE 0x00010109 +#define RNDIS_OID_GEN_TRANSMIT_BLOCK_SIZE 0x0001010A +#define RNDIS_OID_GEN_RECEIVE_BLOCK_SIZE 0x0001010B +#define RNDIS_OID_GEN_VENDOR_ID 0x0001010C +#define RNDIS_OID_GEN_VENDOR_DESCRIPTION 0x0001010D +#define RNDIS_OID_GEN_CURRENT_PACKET_FILTER 0x0001010E +#define RNDIS_OID_GEN_CURRENT_LOOKAHEAD 0x0001010F +#define RNDIS_OID_GEN_DRIVER_VERSION 0x00010110 +#define RNDIS_OID_GEN_MAXIMUM_TOTAL_SIZE 0x00010111 +#define RNDIS_OID_GEN_PROTOCOL_OPTIONS 0x00010112 +#define RNDIS_OID_GEN_MAC_OPTIONS 0x00010113 +#define RNDIS_OID_GEN_MEDIA_CONNECT_STATUS 0x00010114 +#define RNDIS_OID_GEN_MAXIMUM_SEND_PACKETS 0x00010115 +#define RNDIS_OID_GEN_VENDOR_DRIVER_VERSION 0x00010116 +#define RNDIS_OID_GEN_SUPPORTED_GUIDS 0x00010117 +#define RNDIS_OID_GEN_NETWORK_LAYER_ADDRESSES 0x00010118 +#define RNDIS_OID_GEN_TRANSPORT_HEADER_OFFSET 0x00010119 +#define RNDIS_OID_GEN_PHYSICAL_MEDIUM 0x00010202 +#define RNDIS_OID_GEN_MACHINE_NAME 0x0001021A +#define RNDIS_OID_GEN_RNDIS_CONFIG_PARAMETER 0x0001021B +#define RNDIS_OID_GEN_VLAN_ID 0x0001021C + +/* Optional OIDs */ +#define RNDIS_OID_GEN_MEDIA_CAPABILITIES 0x00010201 + +/* Required statistics OIDs */ +#define RNDIS_OID_GEN_XMIT_OK 0x00020101 +#define RNDIS_OID_GEN_RCV_OK 0x00020102 +#define RNDIS_OID_GEN_XMIT_ERROR 0x00020103 +#define RNDIS_OID_GEN_RCV_ERROR 0x00020104 +#define RNDIS_OID_GEN_RCV_NO_BUFFER 0x00020105 + +/* Optional statistics OIDs */ +#define RNDIS_OID_GEN_DIRECTED_BYTES_XMIT 0x00020201 +#define RNDIS_OID_GEN_DIRECTED_FRAMES_XMIT 0x00020202 +#define RNDIS_OID_GEN_MULTICAST_BYTES_XMIT 0x00020203 +#define RNDIS_OID_GEN_MULTICAST_FRAMES_XMIT 0x00020204 +#define RNDIS_OID_GEN_BROADCAST_BYTES_XMIT 0x00020205 +#define RNDIS_OID_GEN_BROADCAST_FRAMES_XMIT 0x00020206 +#define RNDIS_OID_GEN_DIRECTED_BYTES_RCV 0x00020207 +#define RNDIS_OID_GEN_DIRECTED_FRAMES_RCV 0x00020208 +#define RNDIS_OID_GEN_MULTICAST_BYTES_RCV 0x00020209 +#define RNDIS_OID_GEN_MULTICAST_FRAMES_RCV 0x0002020A +#define RNDIS_OID_GEN_BROADCAST_BYTES_RCV 0x0002020B +#define RNDIS_OID_GEN_BROADCAST_FRAMES_RCV 0x0002020C + +#define RNDIS_OID_GEN_RCV_CRC_ERROR 0x0002020D +#define RNDIS_OID_GEN_TRANSMIT_QUEUE_LENGTH 0x0002020E + +#define RNDIS_OID_GEN_GET_TIME_CAPS 0x0002020F +#define RNDIS_OID_GEN_GET_NETCARD_TIME 0x00020210 + +#define RNDIS_OID_GEN_NETCARD_LOAD 0x00020211 +#define RNDIS_OID_GEN_DEVICE_PROFILE 0x00020212 +#define RNDIS_OID_GEN_INIT_TIME_MS 0x00020213 +#define RNDIS_OID_GEN_RESET_COUNTS 0x00020214 +#define RNDIS_OID_GEN_MEDIA_SENSE_COUNTS 0x00020215 +#define RNDIS_OID_GEN_FRIENDLY_NAME 0x00020216 +#define RNDIS_OID_GEN_MINIPORT_INFO 0x00020217 +#define RNDIS_OID_GEN_RESET_VERIFY_PARAMETERS 0x00020218 + +/* These are connection-oriented general OIDs. */ +/* These replace the above OIDs for connection-oriented media. */ +#define RNDIS_OID_GEN_CO_SUPPORTED_LIST 0x00010101 +#define RNDIS_OID_GEN_CO_HARDWARE_STATUS 0x00010102 +#define RNDIS_OID_GEN_CO_MEDIA_SUPPORTED 0x00010103 +#define RNDIS_OID_GEN_CO_MEDIA_IN_USE 0x00010104 +#define RNDIS_OID_GEN_CO_LINK_SPEED 0x00010105 +#define RNDIS_OID_GEN_CO_VENDOR_ID 0x00010106 +#define RNDIS_OID_GEN_CO_VENDOR_DESCRIPTION 0x00010107 +#define RNDIS_OID_GEN_CO_DRIVER_VERSION 0x00010108 +#define RNDIS_OID_GEN_CO_PROTOCOL_OPTIONS 0x00010109 +#define RNDIS_OID_GEN_CO_MAC_OPTIONS 0x0001010A +#define RNDIS_OID_GEN_CO_MEDIA_CONNECT_STATUS 0x0001010B +#define RNDIS_OID_GEN_CO_VENDOR_DRIVER_VERSION 0x0001010C +#define RNDIS_OID_GEN_CO_MINIMUM_LINK_SPEED 0x0001010D + +#define RNDIS_OID_GEN_CO_GET_TIME_CAPS 0x00010201 +#define RNDIS_OID_GEN_CO_GET_NETCARD_TIME 0x00010202 + +/* These are connection-oriented statistics OIDs. */ +#define RNDIS_OID_GEN_CO_XMIT_PDUS_OK 0x00020101 +#define RNDIS_OID_GEN_CO_RCV_PDUS_OK 0x00020102 +#define RNDIS_OID_GEN_CO_XMIT_PDUS_ERROR 0x00020103 +#define RNDIS_OID_GEN_CO_RCV_PDUS_ERROR 0x00020104 +#define RNDIS_OID_GEN_CO_RCV_PDUS_NO_BUFFER 0x00020105 + + +#define RNDIS_OID_GEN_CO_RCV_CRC_ERROR 0x00020201 +#define RNDIS_OID_GEN_CO_TRANSMIT_QUEUE_LENGTH 0x00020202 +#define RNDIS_OID_GEN_CO_BYTES_XMIT 0x00020203 +#define RNDIS_OID_GEN_CO_BYTES_RCV 0x00020204 +#define RNDIS_OID_GEN_CO_BYTES_XMIT_OUTSTANDING 0x00020205 +#define RNDIS_OID_GEN_CO_NETCARD_LOAD 0x00020206 + +/* These are objects for Connection-oriented media call-managers. */ +#define RNDIS_OID_CO_ADD_PVC 0xFF000001 +#define RNDIS_OID_CO_DELETE_PVC 0xFF000002 +#define RNDIS_OID_CO_GET_CALL_INFORMATION 0xFF000003 +#define RNDIS_OID_CO_ADD_ADDRESS 0xFF000004 +#define RNDIS_OID_CO_DELETE_ADDRESS 0xFF000005 +#define RNDIS_OID_CO_GET_ADDRESSES 0xFF000006 +#define RNDIS_OID_CO_ADDRESS_CHANGE 0xFF000007 +#define RNDIS_OID_CO_SIGNALING_ENABLED 0xFF000008 +#define RNDIS_OID_CO_SIGNALING_DISABLED 0xFF000009 + +/* 802.3 Objects (Ethernet) */ +#define RNDIS_OID_802_3_PERMANENT_ADDRESS 0x01010101 +#define RNDIS_OID_802_3_CURRENT_ADDRESS 0x01010102 +#define RNDIS_OID_802_3_MULTICAST_LIST 0x01010103 +#define RNDIS_OID_802_3_MAXIMUM_LIST_SIZE 0x01010104 +#define RNDIS_OID_802_3_MAC_OPTIONS 0x01010105 + +#define RNDIS_802_3_MAC_OPTION_PRIORITY 0x00000001 + +#define RNDIS_OID_802_3_RCV_ERROR_ALIGNMENT 0x01020101 +#define RNDIS_OID_802_3_XMIT_ONE_COLLISION 0x01020102 +#define RNDIS_OID_802_3_XMIT_MORE_COLLISIONS 0x01020103 + +#define RNDIS_OID_802_3_XMIT_DEFERRED 0x01020201 +#define RNDIS_OID_802_3_XMIT_MAX_COLLISIONS 0x01020202 +#define RNDIS_OID_802_3_RCV_OVERRUN 0x01020203 +#define RNDIS_OID_802_3_XMIT_UNDERRUN 0x01020204 +#define RNDIS_OID_802_3_XMIT_HEARTBEAT_FAILURE 0x01020205 +#define RNDIS_OID_802_3_XMIT_TIMES_CRS_LOST 0x01020206 +#define RNDIS_OID_802_3_XMIT_LATE_COLLISIONS 0x01020207 + +#define RNDIS_OID_802_11_BSSID 0x0d010101 +#define RNDIS_OID_802_11_SSID 0x0d010102 +#define RNDIS_OID_802_11_INFRASTRUCTURE_MODE 0x0d010108 +#define RNDIS_OID_802_11_ADD_WEP 0x0d010113 +#define RNDIS_OID_802_11_REMOVE_WEP 0x0d010114 +#define RNDIS_OID_802_11_DISASSOCIATE 0x0d010115 +#define RNDIS_OID_802_11_AUTHENTICATION_MODE 0x0d010118 +#define RNDIS_OID_802_11_PRIVACY_FILTER 0x0d010119 +#define RNDIS_OID_802_11_BSSID_LIST_SCAN 0x0d01011a +#define RNDIS_OID_802_11_ENCRYPTION_STATUS 0x0d01011b +#define RNDIS_OID_802_11_ADD_KEY 0x0d01011d +#define RNDIS_OID_802_11_REMOVE_KEY 0x0d01011e +#define RNDIS_OID_802_11_ASSOCIATION_INFORMATION 0x0d01011f +#define RNDIS_OID_802_11_CAPABILITY 0x0d010122 +#define RNDIS_OID_802_11_PMKID 0x0d010123 +#define RNDIS_OID_802_11_NETWORK_TYPES_SUPPORTED 0x0d010203 +#define RNDIS_OID_802_11_NETWORK_TYPE_IN_USE 0x0d010204 +#define RNDIS_OID_802_11_TX_POWER_LEVEL 0x0d010205 +#define RNDIS_OID_802_11_RSSI 0x0d010206 +#define RNDIS_OID_802_11_RSSI_TRIGGER 0x0d010207 +#define RNDIS_OID_802_11_FRAGMENTATION_THRESHOLD 0x0d010209 +#define RNDIS_OID_802_11_RTS_THRESHOLD 0x0d01020a +#define RNDIS_OID_802_11_SUPPORTED_RATES 0x0d01020e +#define RNDIS_OID_802_11_CONFIGURATION 0x0d010211 +#define RNDIS_OID_802_11_POWER_MODE 0x0d010216 +#define RNDIS_OID_802_11_BSSID_LIST 0x0d010217 + +/* Plug and Play capabilities */ +#define RNDIS_OID_PNP_CAPABILITIES 0xFD010100 +#define RNDIS_OID_PNP_SET_POWER 0xFD010101 +#define RNDIS_OID_PNP_QUERY_POWER 0xFD010102 +#define RNDIS_OID_PNP_ADD_WAKE_UP_PATTERN 0xFD010103 +#define RNDIS_OID_PNP_REMOVE_WAKE_UP_PATTERN 0xFD010104 +#define RNDIS_OID_PNP_ENABLE_WAKE_UP 0xFD010106 + +/* RNDIS_PNP_CAPABILITIES.Flags constants */ +#define RNDIS_DEVICE_WAKE_UP_ENABLE 0x00000001 +#define RNDIS_DEVICE_WAKE_ON_PATTERN_MATCH_ENABLE 0x00000002 +#define RNDIS_DEVICE_WAKE_ON_MAGIC_PACKET_ENABLE 0x00000004 + +#define REMOTE_CONDIS_MP_CREATE_VC_MSG 0x00008001 +#define REMOTE_CONDIS_MP_DELETE_VC_MSG 0x00008002 +#define REMOTE_CONDIS_MP_ACTIVATE_VC_MSG 0x00008005 +#define REMOTE_CONDIS_MP_DEACTIVATE_VC_MSG 0x00008006 +#define REMOTE_CONDIS_INDICATE_STATUS_MSG 0x00008007 + +#define REMOTE_CONDIS_MP_CREATE_VC_CMPLT 0x80008001 +#define REMOTE_CONDIS_MP_DELETE_VC_CMPLT 0x80008002 +#define REMOTE_CONDIS_MP_ACTIVATE_VC_CMPLT 0x80008005 +#define REMOTE_CONDIS_MP_DEACTIVATE_VC_CMPLT 0x80008006 diff --git a/include/linux/rtnetlink.h b/include/linux/rtnetlink.h index 577592ea0ea0..2c1de8982c85 100644 --- a/include/linux/rtnetlink.h +++ b/include/linux/rtnetlink.h @@ -801,6 +801,10 @@ rtattr_failure: return table; } +extern int ndo_dflt_fdb_dump(struct sk_buff *skb, + struct netlink_callback *cb, + struct net_device *dev, + int idx); #endif /* __KERNEL__ */ diff --git a/include/linux/sched.h b/include/linux/sched.h index 81a173c0897d..f774d88cd0aa 100644 --- a/include/linux/sched.h +++ b/include/linux/sched.h @@ -1341,6 +1341,8 @@ struct task_struct { * execve */ unsigned in_iowait:1; + /* task may not gain privileges */ + unsigned no_new_privs:1; /* Revert to default priority/policy when forking */ unsigned sched_reset_on_fork:1; @@ -1450,7 +1452,7 @@ struct task_struct { uid_t loginuid; unsigned int sessionid; #endif - seccomp_t seccomp; + struct seccomp seccomp; /* Thread group tracking */ u32 parent_exec_id; @@ -1905,12 +1907,22 @@ static inline void rcu_copy_process(struct task_struct *p) INIT_LIST_HEAD(&p->rcu_node_entry); } +static inline void rcu_switch_from(struct task_struct *prev) +{ + if (prev->rcu_read_lock_nesting != 0) + rcu_preempt_note_context_switch(); +} + #else static inline void rcu_copy_process(struct task_struct *p) { } +static inline void rcu_switch_from(struct task_struct *prev) +{ +} + #endif #ifdef CONFIG_SMP diff --git a/include/linux/seccomp.h b/include/linux/seccomp.h index cc7a4e9cc7ad..84f6320da50f 100644 --- a/include/linux/seccomp.h +++ b/include/linux/seccomp.h @@ -1,25 +1,90 @@ #ifndef _LINUX_SECCOMP_H #define _LINUX_SECCOMP_H - +#include <linux/compiler.h> +#include <linux/types.h> + + +/* Valid values for seccomp.mode and prctl(PR_SET_SECCOMP, <mode>) */ +#define SECCOMP_MODE_DISABLED 0 /* seccomp is not in use. */ +#define SECCOMP_MODE_STRICT 1 /* uses hard-coded filter. */ +#define SECCOMP_MODE_FILTER 2 /* uses user-supplied filter. */ + +/* + * All BPF programs must return a 32-bit value. + * The bottom 16-bits are for optional return data. + * The upper 16-bits are ordered from least permissive values to most. + * + * The ordering ensures that a min_t() over composed return values always + * selects the least permissive choice. + */ +#define SECCOMP_RET_KILL 0x00000000U /* kill the task immediately */ +#define SECCOMP_RET_TRAP 0x00030000U /* disallow and force a SIGSYS */ +#define SECCOMP_RET_ERRNO 0x00050000U /* returns an errno */ +#define SECCOMP_RET_TRACE 0x7ff00000U /* pass to a tracer or disallow */ +#define SECCOMP_RET_ALLOW 0x7fff0000U /* allow */ + +/* Masks for the return value sections. */ +#define SECCOMP_RET_ACTION 0x7fff0000U +#define SECCOMP_RET_DATA 0x0000ffffU + +/** + * struct seccomp_data - the format the BPF program executes over. + * @nr: the system call number + * @arch: indicates system call convention as an AUDIT_ARCH_* value + * as defined in <linux/audit.h>. + * @instruction_pointer: at the time of the system call. + * @args: up to 6 system call arguments always stored as 64-bit values + * regardless of the architecture. + */ +struct seccomp_data { + int nr; + __u32 arch; + __u64 instruction_pointer; + __u64 args[6]; +}; + +#ifdef __KERNEL__ #ifdef CONFIG_SECCOMP #include <linux/thread_info.h> #include <asm/seccomp.h> -typedef struct { int mode; } seccomp_t; - -extern void __secure_computing(int); -static inline void secure_computing(int this_syscall) +struct seccomp_filter; +/** + * struct seccomp - the state of a seccomp'ed process + * + * @mode: indicates one of the valid values above for controlled + * system calls available to a process. + * @filter: The metadata and ruleset for determining what system calls + * are allowed for a task. + * + * @filter must only be accessed from the context of current as there + * is no locking. + */ +struct seccomp { + int mode; + struct seccomp_filter *filter; +}; + +extern int __secure_computing(int); +static inline int secure_computing(int this_syscall) { if (unlikely(test_thread_flag(TIF_SECCOMP))) - __secure_computing(this_syscall); + return __secure_computing(this_syscall); + return 0; +} + +/* A wrapper for architectures supporting only SECCOMP_MODE_STRICT. */ +static inline void secure_computing_strict(int this_syscall) +{ + BUG_ON(secure_computing(this_syscall) != 0); } extern long prctl_get_seccomp(void); -extern long prctl_set_seccomp(unsigned long); +extern long prctl_set_seccomp(unsigned long, char __user *); -static inline int seccomp_mode(seccomp_t *s) +static inline int seccomp_mode(struct seccomp *s) { return s->mode; } @@ -28,25 +93,41 @@ static inline int seccomp_mode(seccomp_t *s) #include <linux/errno.h> -typedef struct { } seccomp_t; +struct seccomp { }; +struct seccomp_filter { }; -#define secure_computing(x) do { } while (0) +static inline int secure_computing(int this_syscall) { return 0; } +static inline void secure_computing_strict(int this_syscall) { return; } static inline long prctl_get_seccomp(void) { return -EINVAL; } -static inline long prctl_set_seccomp(unsigned long arg2) +static inline long prctl_set_seccomp(unsigned long arg2, char __user *arg3) { return -EINVAL; } -static inline int seccomp_mode(seccomp_t *s) +static inline int seccomp_mode(struct seccomp *s) { return 0; } - #endif /* CONFIG_SECCOMP */ +#ifdef CONFIG_SECCOMP_FILTER +extern void put_seccomp_filter(struct task_struct *tsk); +extern void get_seccomp_filter(struct task_struct *tsk); +extern u32 seccomp_bpf_load(int off); +#else /* CONFIG_SECCOMP_FILTER */ +static inline void put_seccomp_filter(struct task_struct *tsk) +{ + return; +} +static inline void get_seccomp_filter(struct task_struct *tsk) +{ + return; +} +#endif /* CONFIG_SECCOMP_FILTER */ +#endif /* __KERNEL__ */ #endif /* _LINUX_SECCOMP_H */ diff --git a/include/linux/security.h b/include/linux/security.h index 673afbb8238a..ab0e091ce5fa 100644 --- a/include/linux/security.h +++ b/include/linux/security.h @@ -144,6 +144,7 @@ struct request_sock; #define LSM_UNSAFE_SHARE 1 #define LSM_UNSAFE_PTRACE 2 #define LSM_UNSAFE_PTRACE_CAP 4 +#define LSM_UNSAFE_NO_NEW_PRIVS 8 #ifdef CONFIG_MMU extern int mmap_min_addr_handler(struct ctl_table *table, int write, @@ -639,10 +640,7 @@ static inline void security_free_mnt_opts(struct security_mnt_opts *opts) * to receive an open file descriptor via socket IPC. * @file contains the file structure being received. * Return 0 if permission is granted. - * - * Security hook for dentry - * - * @dentry_open + * @file_open * Save open-time permission checking state for later use upon * file_permission, and recheck access if anything has changed * since inode_permission. @@ -1497,7 +1495,7 @@ struct security_operations { int (*file_send_sigiotask) (struct task_struct *tsk, struct fown_struct *fown, int sig); int (*file_receive) (struct file *file); - int (*dentry_open) (struct file *file, const struct cred *cred); + int (*file_open) (struct file *file, const struct cred *cred); int (*task_create) (unsigned long clone_flags); void (*task_free) (struct task_struct *task); @@ -1756,7 +1754,7 @@ int security_file_set_fowner(struct file *file); int security_file_send_sigiotask(struct task_struct *tsk, struct fown_struct *fown, int sig); int security_file_receive(struct file *file); -int security_dentry_open(struct file *file, const struct cred *cred); +int security_file_open(struct file *file, const struct cred *cred); int security_task_create(unsigned long clone_flags); void security_task_free(struct task_struct *task); int security_cred_alloc_blank(struct cred *cred, gfp_t gfp); @@ -2227,8 +2225,8 @@ static inline int security_file_receive(struct file *file) return 0; } -static inline int security_dentry_open(struct file *file, - const struct cred *cred) +static inline int security_file_open(struct file *file, + const struct cred *cred) { return 0; } diff --git a/include/linux/seqlock.h b/include/linux/seqlock.h index c6db9fb33c44..600060e25ec6 100644 --- a/include/linux/seqlock.h +++ b/include/linux/seqlock.h @@ -141,7 +141,7 @@ static inline unsigned __read_seqcount_begin(const seqcount_t *s) unsigned ret; repeat: - ret = s->sequence; + ret = ACCESS_ONCE(s->sequence); if (unlikely(ret & 1)) { cpu_relax(); goto repeat; @@ -166,6 +166,27 @@ static inline unsigned read_seqcount_begin(const seqcount_t *s) } /** + * raw_seqcount_begin - begin a seq-read critical section + * @s: pointer to seqcount_t + * Returns: count to be passed to read_seqcount_retry + * + * raw_seqcount_begin opens a read critical section of the given seqcount. + * Validity of the critical section is tested by checking read_seqcount_retry + * function. + * + * Unlike read_seqcount_begin(), this function will not wait for the count + * to stabilize. If a writer is active when we begin, we will fail the + * read_seqcount_retry() instead of stabilizing at the beginning of the + * critical section. + */ +static inline unsigned raw_seqcount_begin(const seqcount_t *s) +{ + unsigned ret = ACCESS_ONCE(s->sequence); + smp_rmb(); + return ret & ~1; +} + +/** * __read_seqcount_retry - end a seq-read critical section (without barrier) * @s: pointer to seqcount_t * @start: count, from read_seqcount_begin diff --git a/include/linux/skbuff.h b/include/linux/skbuff.h index 775292a66fa4..0e501714d47f 100644 --- a/include/linux/skbuff.h +++ b/include/linux/skbuff.h @@ -117,11 +117,11 @@ struct nf_conntrack { #ifdef CONFIG_BRIDGE_NETFILTER struct nf_bridge_info { - atomic_t use; - struct net_device *physindev; - struct net_device *physoutdev; - unsigned int mask; - unsigned long data[32 / sizeof(unsigned long)]; + atomic_t use; + unsigned int mask; + struct net_device *physindev; + struct net_device *physoutdev; + unsigned long data[32 / sizeof(unsigned long)]; }; #endif @@ -470,7 +470,8 @@ struct sk_buff { __u8 wifi_acked_valid:1; __u8 wifi_acked:1; __u8 no_fcs:1; - /* 9/11 bit hole (depending on ndisc_nodetype presence) */ + __u8 head_frag:1; + /* 8/10 bit hole (depending on ndisc_nodetype presence) */ kmemcheck_bitfield_end(flags2); #ifdef CONFIG_NET_DMA @@ -560,9 +561,15 @@ static inline struct rtable *skb_rtable(const struct sk_buff *skb) extern void kfree_skb(struct sk_buff *skb); extern void consume_skb(struct sk_buff *skb); extern void __kfree_skb(struct sk_buff *skb); +extern struct kmem_cache *skbuff_head_cache; + +extern void kfree_skb_partial(struct sk_buff *skb, bool head_stolen); +extern bool skb_try_coalesce(struct sk_buff *to, struct sk_buff *from, + bool *fragstolen, int *delta_truesize); + extern struct sk_buff *__alloc_skb(unsigned int size, gfp_t priority, int fclone, int node); -extern struct sk_buff *build_skb(void *data); +extern struct sk_buff *build_skb(void *data, unsigned int frag_size); static inline struct sk_buff *alloc_skb(unsigned int size, gfp_t priority) { @@ -643,11 +650,21 @@ static inline unsigned char *skb_end_pointer(const struct sk_buff *skb) { return skb->head + skb->end; } + +static inline unsigned int skb_end_offset(const struct sk_buff *skb) +{ + return skb->end; +} #else static inline unsigned char *skb_end_pointer(const struct sk_buff *skb) { return skb->end; } + +static inline unsigned int skb_end_offset(const struct sk_buff *skb) +{ + return skb->end - skb->head; +} #endif /* Internal */ @@ -881,10 +898,11 @@ static inline struct sk_buff *skb_unshare(struct sk_buff *skb, */ static inline struct sk_buff *skb_peek(const struct sk_buff_head *list_) { - struct sk_buff *list = ((const struct sk_buff *)list_)->next; - if (list == (struct sk_buff *)list_) - list = NULL; - return list; + struct sk_buff *skb = list_->next; + + if (skb == (struct sk_buff *)list_) + skb = NULL; + return skb; } /** @@ -900,6 +918,7 @@ static inline struct sk_buff *skb_peek_next(struct sk_buff *skb, const struct sk_buff_head *list_) { struct sk_buff *next = skb->next; + if (next == (struct sk_buff *)list_) next = NULL; return next; @@ -920,10 +939,12 @@ static inline struct sk_buff *skb_peek_next(struct sk_buff *skb, */ static inline struct sk_buff *skb_peek_tail(const struct sk_buff_head *list_) { - struct sk_buff *list = ((const struct sk_buff *)list_)->prev; - if (list == (struct sk_buff *)list_) - list = NULL; - return list; + struct sk_buff *skb = list_->prev; + + if (skb == (struct sk_buff *)list_) + skb = NULL; + return skb; + } /** @@ -1020,7 +1041,7 @@ static inline void skb_queue_splice(const struct sk_buff_head *list, } /** - * skb_queue_splice - join two skb lists and reinitialise the emptied list + * skb_queue_splice_init - join two skb lists and reinitialise the emptied list * @list: the new list to add * @head: the place to add it in the first list * @@ -1051,7 +1072,7 @@ static inline void skb_queue_splice_tail(const struct sk_buff_head *list, } /** - * skb_queue_splice_tail - join two skb lists and reinitialise the emptied list + * skb_queue_splice_tail_init - join two skb lists and reinitialise the emptied list * @list: the new list to add * @head: the place to add it in the first list * @@ -1664,31 +1685,11 @@ static inline void __skb_queue_purge(struct sk_buff_head *list) kfree_skb(skb); } -/** - * __dev_alloc_skb - allocate an skbuff for receiving - * @length: length to allocate - * @gfp_mask: get_free_pages mask, passed to alloc_skb - * - * Allocate a new &sk_buff and assign it a usage count of one. The - * buffer has unspecified headroom built in. Users should allocate - * the headroom they think they need without accounting for the - * built in space. The built in space is used for optimisations. - * - * %NULL is returned if there is no free memory. - */ -static inline struct sk_buff *__dev_alloc_skb(unsigned int length, - gfp_t gfp_mask) -{ - struct sk_buff *skb = alloc_skb(length + NET_SKB_PAD, gfp_mask); - if (likely(skb)) - skb_reserve(skb, NET_SKB_PAD); - return skb; -} - -extern struct sk_buff *dev_alloc_skb(unsigned int length); +extern void *netdev_alloc_frag(unsigned int fragsz); extern struct sk_buff *__netdev_alloc_skb(struct net_device *dev, - unsigned int length, gfp_t gfp_mask); + unsigned int length, + gfp_t gfp_mask); /** * netdev_alloc_skb - allocate an skbuff for rx on a specific device @@ -1704,11 +1705,25 @@ extern struct sk_buff *__netdev_alloc_skb(struct net_device *dev, * allocates memory it can be called from an interrupt. */ static inline struct sk_buff *netdev_alloc_skb(struct net_device *dev, - unsigned int length) + unsigned int length) { return __netdev_alloc_skb(dev, length, GFP_ATOMIC); } +/* legacy helper around __netdev_alloc_skb() */ +static inline struct sk_buff *__dev_alloc_skb(unsigned int length, + gfp_t gfp_mask) +{ + return __netdev_alloc_skb(NULL, length, gfp_mask); +} + +/* legacy helper around netdev_alloc_skb() */ +static inline struct sk_buff *dev_alloc_skb(unsigned int length) +{ + return netdev_alloc_skb(NULL, length); +} + + static inline struct sk_buff *__netdev_alloc_skb_ip_align(struct net_device *dev, unsigned int length, gfp_t gfp) { @@ -1963,8 +1978,8 @@ static inline int skb_add_data(struct sk_buff *skb, return -EFAULT; } -static inline int skb_can_coalesce(struct sk_buff *skb, int i, - const struct page *page, int off) +static inline bool skb_can_coalesce(struct sk_buff *skb, int i, + const struct page *page, int off) { if (i) { const struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[i - 1]; @@ -1972,7 +1987,7 @@ static inline int skb_can_coalesce(struct sk_buff *skb, int i, return page == skb_frag_page(frag) && off == frag->page_offset + skb_frag_size(frag); } - return 0; + return false; } static inline int __skb_linearize(struct sk_buff *skb) @@ -2552,7 +2567,7 @@ static inline bool skb_is_recycleable(const struct sk_buff *skb, int skb_size) return false; skb_size = SKB_DATA_ALIGN(skb_size + NET_SKB_PAD); - if (skb_end_pointer(skb) - skb->head < skb_size) + if (skb_end_offset(skb) < skb_size) return false; if (skb_shared(skb) || skb_cloned(skb)) @@ -2560,5 +2575,19 @@ static inline bool skb_is_recycleable(const struct sk_buff *skb, int skb_size) return true; } + +/** + * skb_head_is_locked - Determine if the skb->head is locked down + * @skb: skb to check + * + * The head on skbs build around a head frag can be removed if they are + * not cloned. This function returns true if the skb head is locked down + * due to either being allocated via kmalloc, or by being a clone with + * multiple references to the head. + */ +static inline bool skb_head_is_locked(const struct sk_buff *skb) +{ + return !skb->head_frag || skb_cloned(skb); +} #endif /* __KERNEL__ */ #endif /* _LINUX_SKBUFF_H */ diff --git a/include/linux/smp.h b/include/linux/smp.h index 10530d92c04b..717fb746c9a8 100644 --- a/include/linux/smp.h +++ b/include/linux/smp.h @@ -61,7 +61,7 @@ extern void smp_prepare_cpus(unsigned int max_cpus); /* * Bring a CPU up */ -extern int __cpu_up(unsigned int cpunum); +extern int __cpu_up(unsigned int cpunum, struct task_struct *tidle); /* * Final polishing of CPUs @@ -81,6 +81,8 @@ void __smp_call_function_single(int cpuid, struct call_single_data *data, int smp_call_function_any(const struct cpumask *mask, smp_call_func_t func, void *info, int wait); +void kick_all_cpus_sync(void); + /* * Generic and arch helpers */ @@ -192,6 +194,8 @@ smp_call_function_any(const struct cpumask *mask, smp_call_func_t func, return smp_call_function_single(0, func, info, wait); } +static inline void kick_all_cpus_sync(void) { } + #endif /* !SMP */ /* diff --git a/include/linux/sock_diag.h b/include/linux/sock_diag.h index 251729a47880..db4bae78bda9 100644 --- a/include/linux/sock_diag.h +++ b/include/linux/sock_diag.h @@ -32,8 +32,8 @@ struct sock_diag_handler { int (*dump)(struct sk_buff *skb, struct nlmsghdr *nlh); }; -int sock_diag_register(struct sock_diag_handler *h); -void sock_diag_unregister(struct sock_diag_handler *h); +int sock_diag_register(const struct sock_diag_handler *h); +void sock_diag_unregister(const struct sock_diag_handler *h); void sock_diag_register_inet_compat(int (*fn)(struct sk_buff *skb, struct nlmsghdr *nlh)); void sock_diag_unregister_inet_compat(int (*fn)(struct sk_buff *skb, struct nlmsghdr *nlh)); diff --git a/include/linux/socket.h b/include/linux/socket.h index b84bbd48b874..25d6322fb635 100644 --- a/include/linux/socket.h +++ b/include/linux/socket.h @@ -68,13 +68,13 @@ struct msghdr { __kernel_size_t msg_iovlen; /* Number of blocks */ void * msg_control; /* Per protocol magic (eg BSD file descriptor passing) */ __kernel_size_t msg_controllen; /* Length of cmsg list */ - unsigned msg_flags; + unsigned int msg_flags; }; /* For recvmmsg/sendmmsg */ struct mmsghdr { struct msghdr msg_hdr; - unsigned msg_len; + unsigned int msg_len; }; /* diff --git a/include/linux/spi/eeprom.h b/include/linux/spi/eeprom.h index 306e7b1c69ed..403e007aef68 100644 --- a/include/linux/spi/eeprom.h +++ b/include/linux/spi/eeprom.h @@ -20,6 +20,16 @@ struct spi_eeprom { #define EE_ADDR3 0x0004 /* 24 bit addrs */ #define EE_READONLY 0x0008 /* disallow writes */ + /* + * Certain EEPROMS have a size that is larger than the number of address + * bytes would allow (e.g. like M95040 from ST that has 512 Byte size + * but uses only one address byte (A0 to A7) for addressing.) For + * the extra address bit (A8, A16 or A24) bit 3 of the instruction byte + * is used. This instruction bit is normally defined as don't care for + * other AT25 like chips. + */ +#define EE_INSTR_BIT3_IS_ADDR 0x0010 + /* for exporting this chip's data to other kernel code */ void (*setup)(struct memory_accessor *mem, void *context); void *context; diff --git a/include/linux/srcu.h b/include/linux/srcu.h index d3d5fa54f25e..55a5c52cbb25 100644 --- a/include/linux/srcu.h +++ b/include/linux/srcu.h @@ -29,26 +29,35 @@ #include <linux/mutex.h> #include <linux/rcupdate.h> +#include <linux/workqueue.h> struct srcu_struct_array { - int c[2]; + unsigned long c[2]; + unsigned long seq[2]; +}; + +struct rcu_batch { + struct rcu_head *head, **tail; }; struct srcu_struct { - int completed; + unsigned completed; struct srcu_struct_array __percpu *per_cpu_ref; - struct mutex mutex; + spinlock_t queue_lock; /* protect ->batch_queue, ->running */ + bool running; + /* callbacks just queued */ + struct rcu_batch batch_queue; + /* callbacks try to do the first check_zero */ + struct rcu_batch batch_check0; + /* callbacks done with the first check_zero and the flip */ + struct rcu_batch batch_check1; + struct rcu_batch batch_done; + struct delayed_work work; #ifdef CONFIG_DEBUG_LOCK_ALLOC struct lockdep_map dep_map; #endif /* #ifdef CONFIG_DEBUG_LOCK_ALLOC */ }; -#ifndef CONFIG_PREEMPT -#define srcu_barrier() barrier() -#else /* #ifndef CONFIG_PREEMPT */ -#define srcu_barrier() -#endif /* #else #ifndef CONFIG_PREEMPT */ - #ifdef CONFIG_DEBUG_LOCK_ALLOC int __init_srcu_struct(struct srcu_struct *sp, const char *name, @@ -67,12 +76,33 @@ int init_srcu_struct(struct srcu_struct *sp); #endif /* #else #ifdef CONFIG_DEBUG_LOCK_ALLOC */ +/** + * call_srcu() - Queue a callback for invocation after an SRCU grace period + * @sp: srcu_struct in queue the callback + * @head: structure to be used for queueing the SRCU callback. + * @func: function to be invoked after the SRCU grace period + * + * The callback function will be invoked some time after a full SRCU + * grace period elapses, in other words after all pre-existing SRCU + * read-side critical sections have completed. However, the callback + * function might well execute concurrently with other SRCU read-side + * critical sections that started after call_srcu() was invoked. SRCU + * read-side critical sections are delimited by srcu_read_lock() and + * srcu_read_unlock(), and may be nested. + * + * The callback will be invoked from process context, but must nevertheless + * be fast and must not block. + */ +void call_srcu(struct srcu_struct *sp, struct rcu_head *head, + void (*func)(struct rcu_head *head)); + void cleanup_srcu_struct(struct srcu_struct *sp); int __srcu_read_lock(struct srcu_struct *sp) __acquires(sp); void __srcu_read_unlock(struct srcu_struct *sp, int idx) __releases(sp); void synchronize_srcu(struct srcu_struct *sp); void synchronize_srcu_expedited(struct srcu_struct *sp); long srcu_batches_completed(struct srcu_struct *sp); +void srcu_barrier(struct srcu_struct *sp); #ifdef CONFIG_DEBUG_LOCK_ALLOC diff --git a/include/linux/stmmac.h b/include/linux/stmmac.h index 0dddc9e42b6b..b69bdb1e08b6 100644 --- a/include/linux/stmmac.h +++ b/include/linux/stmmac.h @@ -28,6 +28,51 @@ #include <linux/platform_device.h> +#define STMMAC_RX_COE_NONE 0 +#define STMMAC_RX_COE_TYPE1 1 +#define STMMAC_RX_COE_TYPE2 2 + +/* Define the macros for CSR clock range parameters to be passed by + * platform code. + * This could also be configured at run time using CPU freq framework. */ + +/* MDC Clock Selection define*/ +#define STMMAC_CSR_60_100M 0x0 /* MDC = clk_scr_i/42 */ +#define STMMAC_CSR_100_150M 0x1 /* MDC = clk_scr_i/62 */ +#define STMMAC_CSR_20_35M 0x2 /* MDC = clk_scr_i/16 */ +#define STMMAC_CSR_35_60M 0x3 /* MDC = clk_scr_i/26 */ +#define STMMAC_CSR_150_250M 0x4 /* MDC = clk_scr_i/102 */ +#define STMMAC_CSR_250_300M 0x5 /* MDC = clk_scr_i/122 */ + +/* The MDC clock could be set higher than the IEEE 802.3 + * specified frequency limit 0f 2.5 MHz, by programming a clock divider + * of value different than the above defined values. The resultant MDIO + * clock frequency of 12.5 MHz is applicable for the interfacing chips + * supporting higher MDC clocks. + * The MDC clock selection macros need to be defined for MDC clock rate + * of 12.5 MHz, corresponding to the following selection. + */ +#define STMMAC_CSR_I_4 0x8 /* clk_csr_i/4 */ +#define STMMAC_CSR_I_6 0x9 /* clk_csr_i/6 */ +#define STMMAC_CSR_I_8 0xA /* clk_csr_i/8 */ +#define STMMAC_CSR_I_10 0xB /* clk_csr_i/10 */ +#define STMMAC_CSR_I_12 0xC /* clk_csr_i/12 */ +#define STMMAC_CSR_I_14 0xD /* clk_csr_i/14 */ +#define STMMAC_CSR_I_16 0xE /* clk_csr_i/16 */ +#define STMMAC_CSR_I_18 0xF /* clk_csr_i/18 */ + +/* AXI DMA Burst length suported */ +#define DMA_AXI_BLEN_4 (1 << 1) +#define DMA_AXI_BLEN_8 (1 << 2) +#define DMA_AXI_BLEN_16 (1 << 3) +#define DMA_AXI_BLEN_32 (1 << 4) +#define DMA_AXI_BLEN_64 (1 << 5) +#define DMA_AXI_BLEN_128 (1 << 6) +#define DMA_AXI_BLEN_256 (1 << 7) +#define DMA_AXI_BLEN_ALL (DMA_AXI_BLEN_4 | DMA_AXI_BLEN_8 | DMA_AXI_BLEN_16 \ + | DMA_AXI_BLEN_32 | DMA_AXI_BLEN_64 \ + | DMA_AXI_BLEN_128 | DMA_AXI_BLEN_256) + /* Platfrom data for platform device structure's platform_data field */ struct stmmac_mdio_bus_data { @@ -38,16 +83,25 @@ struct stmmac_mdio_bus_data { int probed_phy_irq; }; +struct stmmac_dma_cfg { + int pbl; + int fixed_burst; + int mixed_burst; + int burst_len; +}; + struct plat_stmmacenet_data { + char *phy_bus_name; int bus_id; int phy_addr; int interface; struct stmmac_mdio_bus_data *mdio_bus_data; - int pbl; + struct stmmac_dma_cfg *dma_cfg; int clk_csr; int has_gmac; int enh_desc; int tx_coe; + int rx_coe; int bugged_jumbo; int pmt; int force_sf_dma_mode; @@ -56,6 +110,7 @@ struct plat_stmmacenet_data { int (*init)(struct platform_device *pdev); void (*exit)(struct platform_device *pdev); void *custom_cfg; + void *custom_data; void *bsp_priv; }; #endif diff --git a/include/linux/tcp.h b/include/linux/tcp.h index b6c62d294380..d9b42c5be088 100644 --- a/include/linux/tcp.h +++ b/include/linux/tcp.h @@ -106,6 +106,22 @@ enum { #define TCP_THIN_LINEAR_TIMEOUTS 16 /* Use linear timeouts for thin streams*/ #define TCP_THIN_DUPACK 17 /* Fast retrans. after 1 dupack */ #define TCP_USER_TIMEOUT 18 /* How long for loss retry before timeout */ +#define TCP_REPAIR 19 /* TCP sock is under repair right now */ +#define TCP_REPAIR_QUEUE 20 +#define TCP_QUEUE_SEQ 21 +#define TCP_REPAIR_OPTIONS 22 + +struct tcp_repair_opt { + __u32 opt_code; + __u32 opt_val; +}; + +enum { + TCP_NO_QUEUE, + TCP_RECV_QUEUE, + TCP_SEND_QUEUE, + TCP_QUEUES_NR, +}; /* for TCP_INFO socket option */ #define TCPI_OPT_TIMESTAMPS 1 @@ -353,7 +369,11 @@ struct tcp_sock { u8 nonagle : 4,/* Disable Nagle algorithm? */ thin_lto : 1,/* Use linear timeouts for thin streams */ thin_dupack : 1,/* Fast retransmit on first dupack */ - unused : 2; + repair : 1, + unused : 1; + u8 repair_queue; + u8 do_early_retrans:1,/* Enable RFC5827 early-retransmit */ + early_retrans_delayed:1; /* Delayed ER timer installed */ /* RTT measurement */ u32 srtt; /* smoothed round trip time << 3 */ diff --git a/include/linux/thread_info.h b/include/linux/thread_info.h index 8d03f079688c..db78775eff3b 100644 --- a/include/linux/thread_info.h +++ b/include/linux/thread_info.h @@ -54,6 +54,12 @@ extern long do_no_restart_syscall(struct restart_block *parm); #ifdef __KERNEL__ +#ifdef CONFIG_DEBUG_STACK_USAGE +# define THREADINFO_GFP (GFP_KERNEL | __GFP_NOTRACK | __GFP_ZERO) +#else +# define THREADINFO_GFP (GFP_KERNEL | __GFP_NOTRACK) +#endif + /* * flag set/clear/test wrappers * - pass TIF_xxxx constants to these functions diff --git a/include/linux/ti_wilink_st.h b/include/linux/ti_wilink_st.h index 2ef4385da6bf..3ca0269dd0b5 100644 --- a/include/linux/ti_wilink_st.h +++ b/include/linux/ti_wilink_st.h @@ -25,6 +25,8 @@ #ifndef TI_WILINK_ST_H #define TI_WILINK_ST_H +#include <linux/skbuff.h> + /** * enum proto-type - The protocol on WiLink chips which share a * common physical interface like UART. diff --git a/include/linux/trdevice.h b/include/linux/trdevice.h deleted file mode 100644 index bfc84a7aecc5..000000000000 --- a/include/linux/trdevice.h +++ /dev/null @@ -1,37 +0,0 @@ -/* - * INET An implementation of the TCP/IP protocol suite for the LINUX - * operating system. NET is implemented using the BSD Socket - * interface as the means of communication with the user level. - * - * Definitions for the Token-ring handlers. - * - * Version: @(#)eth.h 1.0.4 05/13/93 - * - * Authors: Ross Biro - * Fred N. van Kempen, <waltje@uWalt.NL.Mugnet.ORG> - * - * Relocated to include/linux where it belongs by Alan Cox - * <gw4pts@gw4pts.ampr.org> - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - * - * WARNING: This move may well be temporary. This file will get merged with others RSN. - * - */ -#ifndef _LINUX_TRDEVICE_H -#define _LINUX_TRDEVICE_H - - -#include <linux/if_tr.h> - -#ifdef __KERNEL__ -extern __be16 tr_type_trans(struct sk_buff *skb, struct net_device *dev); -extern void tr_source_route(struct sk_buff *skb, struct trh_hdr *trh, struct net_device *dev); -extern struct net_device *alloc_trdev(int sizeof_priv); - -#endif - -#endif /* _LINUX_TRDEVICE_H */ diff --git a/include/linux/usb.h b/include/linux/usb.h index 73b68d1f2cb0..dea39dc551d4 100644 --- a/include/linux/usb.h +++ b/include/linux/usb.h @@ -351,10 +351,6 @@ struct usb_bus { int bandwidth_int_reqs; /* number of Interrupt requests */ int bandwidth_isoc_reqs; /* number of Isoc. requests */ -#ifdef CONFIG_USB_DEVICEFS - struct dentry *usbfs_dentry; /* usbfs dentry entry for the bus */ -#endif - #if defined(CONFIG_USB_MON) || defined(CONFIG_USB_MON_MODULE) struct mon_bus *mon_bus; /* non-null when associated */ int monitored; /* non-zero when monitored */ @@ -382,6 +378,45 @@ enum usb_device_removable { USB_DEVICE_FIXED, }; +/* + * USB 3.0 Link Power Management (LPM) parameters. + * + * PEL and SEL are USB 3.0 Link PM latencies for device-initiated LPM exit. + * MEL is the USB 3.0 Link PM latency for host-initiated LPM exit. + * All three are stored in nanoseconds. + */ +struct usb3_lpm_parameters { + /* + * Maximum exit latency (MEL) for the host to send a packet to the + * device (either a Ping for isoc endpoints, or a data packet for + * interrupt endpoints), the hubs to decode the packet, and for all hubs + * in the path to transition the links to U0. + */ + unsigned int mel; + /* + * Maximum exit latency for a device-initiated LPM transition to bring + * all links into U0. Abbreviated as "PEL" in section 9.4.12 of the USB + * 3.0 spec, with no explanation of what "P" stands for. "Path"? + */ + unsigned int pel; + + /* + * The System Exit Latency (SEL) includes PEL, and three other + * latencies. After a device initiates a U0 transition, it will take + * some time from when the device sends the ERDY to when it will finally + * receive the data packet. Basically, SEL should be the worse-case + * latency from when a device starts initiating a U0 transition to when + * it will get data. + */ + unsigned int sel; + /* + * The idle timeout value that is currently programmed into the parent + * hub for this device. When the timer counts to zero, the parent hub + * will initiate an LPM transition to either U1 or U2. + */ + int timeout; +}; + /** * struct usb_device - kernel's representation of a USB device * @devnum: device number; address on a USB bus @@ -439,6 +474,12 @@ enum usb_device_removable { * specific data for the device. * @slot_id: Slot ID assigned by xHCI * @removable: Device can be physically removed from this port + * @u1_params: exit latencies for USB3 U1 LPM state, and hub-initiated timeout. + * @u2_params: exit latencies for USB3 U2 LPM state, and hub-initiated timeout. + * @lpm_disable_count: Ref count used by usb_disable_lpm() and usb_enable_lpm() + * to keep track of the number of functions that require USB 3.0 Link Power + * Management to be disabled for this usb_device. This count should only + * be manipulated by those functions, with the bandwidth_mutex is held. * * Notes: * Usbcore drivers should not set usbdev->state directly. Instead use @@ -485,6 +526,7 @@ struct usb_device { unsigned lpm_capable:1; unsigned usb2_hw_lpm_capable:1; unsigned usb2_hw_lpm_enabled:1; + unsigned usb3_lpm_enabled:1; int string_langid; /* static strings from the device */ @@ -493,12 +535,6 @@ struct usb_device { char *serial; struct list_head filelist; -#ifdef CONFIG_USB_DEVICE_CLASS - struct device *usb_classdev; -#endif -#ifdef CONFIG_USB_DEVICEFS - struct dentry *usbfs_dentry; -#endif int maxchild; struct usb_device **children; @@ -517,6 +553,10 @@ struct usb_device { struct wusb_dev *wusb_dev; int slot_id; enum usb_device_removable removable; + struct usb3_lpm_parameters u1_params; + struct usb3_lpm_parameters u2_params; + unsigned lpm_disable_count; + unsigned hub_initiated_lpm_disable_count; }; #define to_usb_device(d) container_of(d, struct usb_device, dev) @@ -583,6 +623,12 @@ static inline void usb_mark_last_busy(struct usb_device *udev) { } #endif +extern int usb_disable_lpm(struct usb_device *udev); +extern void usb_enable_lpm(struct usb_device *udev); +/* Same as above, but these functions lock/unlock the bandwidth_mutex. */ +extern int usb_unlocked_disable_lpm(struct usb_device *udev); +extern void usb_unlocked_enable_lpm(struct usb_device *udev); + /*-------------------------------------------------------------------------*/ /* for drivers using iso endpoints */ @@ -800,6 +846,8 @@ extern ssize_t usb_store_new_id(struct usb_dynids *dynids, struct device_driver *driver, const char *buf, size_t count); +extern ssize_t usb_show_dynids(struct usb_dynids *dynids, char *buf); + /** * struct usbdrv_wrap - wrapper for driver-model structure * @driver: The driver-model core driver structure. @@ -850,6 +898,9 @@ struct usbdrv_wrap { * for interfaces bound to this driver. * @soft_unbind: if set to 1, the USB core will not kill URBs and disable * endpoints before calling the driver's disconnect method. + * @disable_hub_initiated_lpm: if set to 0, the USB core will not allow hubs + * to initiate lower power link state transitions when an idle timeout + * occurs. Device-initiated USB 3.0 link PM will still be allowed. * * USB interface drivers must provide a name, probe() and disconnect() * methods, and an id_table. Other driver fields are optional. @@ -890,6 +941,7 @@ struct usb_driver { struct usbdrv_wrap drvwrap; unsigned int no_dynamic_id:1; unsigned int supports_autosuspend:1; + unsigned int disable_hub_initiated_lpm:1; unsigned int soft_unbind:1; }; #define to_usb_driver(d) container_of(d, struct usb_driver, drvwrap.driver) @@ -1379,6 +1431,7 @@ extern int usb_unlink_urb(struct urb *urb); extern void usb_kill_urb(struct urb *urb); extern void usb_poison_urb(struct urb *urb); extern void usb_unpoison_urb(struct urb *urb); +extern void usb_block_urb(struct urb *urb); extern void usb_kill_anchored_urbs(struct usb_anchor *anchor); extern void usb_poison_anchored_urbs(struct usb_anchor *anchor); extern void usb_unpoison_anchored_urbs(struct usb_anchor *anchor); @@ -1391,6 +1444,8 @@ extern struct urb *usb_get_from_anchor(struct usb_anchor *anchor); extern void usb_scuttle_anchored_urbs(struct usb_anchor *anchor); extern int usb_anchor_empty(struct usb_anchor *anchor); +#define usb_unblock_urb usb_unpoison_urb + /** * usb_urb_dir_in - check if an URB describes an IN transfer * @urb: URB to be checked @@ -1627,6 +1682,7 @@ static inline int usb_translate_errors(int error_code) case 0: case -ENOMEM: case -ENODEV: + case -EOPNOTSUPP: return error_code; default: return -EIO; @@ -1652,9 +1708,6 @@ do { \ } while (0) #endif -#define err(format, arg...) \ - printk(KERN_ERR KBUILD_MODNAME ": " format "\n", ##arg) - /* debugfs stuff */ extern struct dentry *usb_debug_root; diff --git a/include/linux/usb/ch11.h b/include/linux/usb/ch11.h index f1d26b6067f1..b6c2863b2c94 100644 --- a/include/linux/usb/ch11.h +++ b/include/linux/usb/ch11.h @@ -76,6 +76,8 @@ #define USB_PORT_FEAT_C_BH_PORT_RESET 29 #define USB_PORT_FEAT_FORCE_LINKPM_ACCEPT 30 +#define USB_PORT_LPM_TIMEOUT(p) (((p) & 0xff) << 8) + /* USB 3.0 hub remote wake mask bits, see table 10-14 */ #define USB_PORT_FEAT_REMOTE_WAKE_CONNECT (1 << 8) #define USB_PORT_FEAT_REMOTE_WAKE_DISCONNECT (1 << 9) diff --git a/include/linux/usb/ch9.h b/include/linux/usb/ch9.h index af21f3115919..d1d732c2838d 100644 --- a/include/linux/usb/ch9.h +++ b/include/linux/usb/ch9.h @@ -88,6 +88,8 @@ #define USB_REQ_GET_INTERFACE 0x0A #define USB_REQ_SET_INTERFACE 0x0B #define USB_REQ_SYNCH_FRAME 0x0C +#define USB_REQ_SET_SEL 0x30 +#define USB_REQ_SET_ISOCH_DELAY 0x31 #define USB_REQ_SET_ENCRYPTION 0x0D /* Wireless USB */ #define USB_REQ_GET_ENCRYPTION 0x0E @@ -390,6 +392,11 @@ struct usb_endpoint_descriptor { #define USB_ENDPOINT_XFER_INT 3 #define USB_ENDPOINT_MAX_ADJUSTABLE 0x80 +/* The USB 3.0 spec redefines bits 5:4 of bmAttributes as interrupt ep type. */ +#define USB_ENDPOINT_INTRTYPE 0x30 +#define USB_ENDPOINT_INTR_PERIODIC (0 << 4) +#define USB_ENDPOINT_INTR_NOTIFICATION (1 << 4) + #define USB_ENDPOINT_SYNCTYPE 0x0c #define USB_ENDPOINT_SYNC_NONE (0 << 2) #define USB_ENDPOINT_SYNC_ASYNC (1 << 2) @@ -592,6 +599,12 @@ static inline int usb_endpoint_maxp(const struct usb_endpoint_descriptor *epd) return __le16_to_cpu(epd->wMaxPacketSize); } +static inline int usb_endpoint_interrupt_type( + const struct usb_endpoint_descriptor *epd) +{ + return epd->bmAttributes & USB_ENDPOINT_INTRTYPE; +} + /*-------------------------------------------------------------------------*/ /* USB_DT_SS_ENDPOINT_COMP: SuperSpeed Endpoint Companion descriptor */ @@ -933,6 +946,51 @@ enum usb_device_state { */ }; +enum usb3_link_state { + USB3_LPM_U0 = 0, + USB3_LPM_U1, + USB3_LPM_U2, + USB3_LPM_U3 +}; + +/* + * A U1 timeout of 0x0 means the parent hub will reject any transitions to U1. + * 0xff means the parent hub will accept transitions to U1, but will not + * initiate a transition. + * + * A U1 timeout of 0x1 to 0x7F also causes the hub to initiate a transition to + * U1 after that many microseconds. Timeouts of 0x80 to 0xFE are reserved + * values. + * + * A U2 timeout of 0x0 means the parent hub will reject any transitions to U2. + * 0xff means the parent hub will accept transitions to U2, but will not + * initiate a transition. + * + * A U2 timeout of 0x1 to 0xFE also causes the hub to initiate a transition to + * U2 after N*256 microseconds. Therefore a U2 timeout value of 0x1 means a U2 + * idle timer of 256 microseconds, 0x2 means 512 microseconds, 0xFE means + * 65.024ms. + */ +#define USB3_LPM_DISABLED 0x0 +#define USB3_LPM_U1_MAX_TIMEOUT 0x7F +#define USB3_LPM_U2_MAX_TIMEOUT 0xFE +#define USB3_LPM_DEVICE_INITIATED 0xFF + +struct usb_set_sel_req { + __u8 u1_sel; + __u8 u1_pel; + __le16 u2_sel; + __le16 u2_pel; +} __attribute__ ((packed)); + +/* + * The Set System Exit Latency control transfer provides one byte each for + * U1 SEL and U1 PEL, so the max exit latency is 0xFF. U2 SEL and U2 PEL each + * are two bytes long. + */ +#define USB3_LPM_MAX_U1_SEL_PEL 0xFF +#define USB3_LPM_MAX_U2_SEL_PEL 0xFFFF + /*-------------------------------------------------------------------------*/ /* diff --git a/include/linux/usb/chipidea.h b/include/linux/usb/chipidea.h new file mode 100644 index 000000000000..edb90d6cfd12 --- /dev/null +++ b/include/linux/usb/chipidea.h @@ -0,0 +1,28 @@ +/* + * Platform data for the chipidea USB dual role controller + */ + +#ifndef __LINUX_USB_CHIPIDEA_H +#define __LINUX_USB_CHIPIDEA_H + +struct ci13xxx; +struct ci13xxx_udc_driver { + const char *name; + /* offset of the capability registers */ + uintptr_t capoffset; + unsigned power_budget; + unsigned long flags; +#define CI13XXX_REGS_SHARED BIT(0) +#define CI13XXX_REQUIRE_TRANSCEIVER BIT(1) +#define CI13XXX_PULLUP_ON_VBUS BIT(2) +#define CI13XXX_DISABLE_STREAMING BIT(3) + +#define CI13XXX_CONTROLLER_RESET_EVENT 0 +#define CI13XXX_CONTROLLER_STOPPED_EVENT 1 + void (*notify_event) (struct ci13xxx *udc, unsigned event); +}; + +/* Default offset of capability registers */ +#define DEF_CAPOFFSET 0x100 + +#endif diff --git a/include/linux/usb/composite.h b/include/linux/usb/composite.h index a316fba73518..9d8c3b634493 100644 --- a/include/linux/usb/composite.h +++ b/include/linux/usb/composite.h @@ -242,6 +242,9 @@ int usb_add_config(struct usb_composite_dev *, struct usb_configuration *, int (*)(struct usb_configuration *)); +void usb_remove_config(struct usb_composite_dev *, + struct usb_configuration *); + /** * struct usb_composite_driver - groups configurations into a gadget * @name: For diagnostics, identifies the driver. @@ -250,6 +253,8 @@ int usb_add_config(struct usb_composite_dev *, * @iManufacturer: Used as iManufacturer override if @dev->iManufacturer is * not set. If NULL a default "<system> <release> with <udc>" value * will be used. + * @iSerialNumber: Used as iSerialNumber override if @dev->iSerialNumber is + * not set. * @dev: Template descriptor for the device, including default device * identifiers. * @strings: tables of strings, keyed by identifiers assigned during bind() @@ -280,6 +285,7 @@ struct usb_composite_driver { const char *name; const char *iProduct; const char *iManufacturer; + const char *iSerialNumber; const struct usb_device_descriptor *dev; struct usb_gadget_strings **strings; enum usb_device_speed max_speed; diff --git a/include/linux/usb/functionfs.h b/include/linux/usb/functionfs.h index 7587ef934ba8..a843d0851364 100644 --- a/include/linux/usb/functionfs.h +++ b/include/linux/usb/functionfs.h @@ -190,8 +190,10 @@ static int functionfs_ready_callback(struct ffs_data *ffs) __attribute__((warn_unused_result, nonnull)); static void functionfs_closed_callback(struct ffs_data *ffs) __attribute__((nonnull)); -static int functionfs_check_dev_callback(const char *dev_name) +static void *functionfs_acquire_dev_callback(const char *dev_name) __attribute__((warn_unused_result, nonnull)); +static void functionfs_release_dev_callback(struct ffs_data *ffs_data) + __attribute__((nonnull)); #endif diff --git a/include/linux/usb/gpio_vbus.h b/include/linux/usb/gpio_vbus.h index d9f03ccc2d60..837bba604a0b 100644 --- a/include/linux/usb/gpio_vbus.h +++ b/include/linux/usb/gpio_vbus.h @@ -17,6 +17,7 @@ * @gpio_pullup: optional D+ or D- pullup GPIO (else negative/invalid) * @gpio_vbus_inverted: true if gpio_vbus is active low * @gpio_pullup_inverted: true if gpio_pullup is active low + * @wakeup: configure gpio_vbus as a wake-up source * * The VBUS sensing GPIO should have a pulldown, which will normally be * part of a resistor ladder turning a 4.0V-5.25V level on VBUS into a @@ -27,4 +28,5 @@ struct gpio_vbus_mach_info { int gpio_pullup; bool gpio_vbus_inverted; bool gpio_pullup_inverted; + bool wakeup; }; diff --git a/include/linux/usb/hcd.h b/include/linux/usb/hcd.h index d28cc78a38e4..7f855d50cdf5 100644 --- a/include/linux/usb/hcd.h +++ b/include/linux/usb/hcd.h @@ -344,6 +344,15 @@ struct hc_driver { */ int (*update_device)(struct usb_hcd *, struct usb_device *); int (*set_usb2_hw_lpm)(struct usb_hcd *, struct usb_device *, int); + /* USB 3.0 Link Power Management */ + /* Returns the USB3 hub-encoded value for the U1/U2 timeout. */ + int (*enable_usb3_lpm_timeout)(struct usb_hcd *, + struct usb_device *, enum usb3_link_state state); + /* The xHCI host controller can still fail the command to + * disable the LPM timeouts, so this can return an error code. + */ + int (*disable_usb3_lpm_timeout)(struct usb_hcd *, + struct usb_device *, enum usb3_link_state state); }; extern int usb_hcd_link_urb_to_ep(struct usb_hcd *hcd, struct urb *urb); @@ -584,29 +593,6 @@ static inline void usb_hcd_resume_root_hub(struct usb_hcd *hcd) } #endif /* CONFIG_USB_SUSPEND */ - -/* - * USB device fs stuff - */ - -#ifdef CONFIG_USB_DEVICEFS - -/* - * these are expected to be called from the USB core/hub thread - * with the kernel lock held - */ -extern void usbfs_update_special(void); -extern int usbfs_init(void); -extern void usbfs_cleanup(void); - -#else /* CONFIG_USB_DEVICEFS */ - -static inline void usbfs_update_special(void) {} -static inline int usbfs_init(void) { return 0; } -static inline void usbfs_cleanup(void) { } - -#endif /* CONFIG_USB_DEVICEFS */ - /*-------------------------------------------------------------------------*/ #if defined(CONFIG_USB_MON) || defined(CONFIG_USB_MON_MODULE) diff --git a/include/linux/usb/isp1301.h b/include/linux/usb/isp1301.h new file mode 100644 index 000000000000..d3a851c28b6a --- /dev/null +++ b/include/linux/usb/isp1301.h @@ -0,0 +1,80 @@ +/* + * NXP ISP1301 USB transceiver driver + * + * Copyright (C) 2012 Roland Stigge <stigge@antcom.de> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef __LINUX_USB_ISP1301_H +#define __LINUX_USB_ISP1301_H + +#include <linux/of.h> + +/* I2C Register definitions: */ + +#define ISP1301_I2C_MODE_CONTROL_1 0x04 /* u8 read, set, +1 clear */ + +#define MC1_SPEED_REG (1 << 0) +#define MC1_SUSPEND_REG (1 << 1) +#define MC1_DAT_SE0 (1 << 2) +#define MC1_TRANSPARENT (1 << 3) +#define MC1_BDIS_ACON_EN (1 << 4) +#define MC1_OE_INT_EN (1 << 5) +#define MC1_UART_EN (1 << 6) +#define MC1_MASK 0x7f + +#define ISP1301_I2C_MODE_CONTROL_2 0x12 /* u8 read, set, +1 clear */ + +#define MC2_GLOBAL_PWR_DN (1 << 0) +#define MC2_SPD_SUSP_CTRL (1 << 1) +#define MC2_BI_DI (1 << 2) +#define MC2_TRANSP_BDIR0 (1 << 3) +#define MC2_TRANSP_BDIR1 (1 << 4) +#define MC2_AUDIO_EN (1 << 5) +#define MC2_PSW_EN (1 << 6) +#define MC2_EN2V7 (1 << 7) + +#define ISP1301_I2C_OTG_CONTROL_1 0x06 /* u8 read, set, +1 clear */ + +#define OTG1_DP_PULLUP (1 << 0) +#define OTG1_DM_PULLUP (1 << 1) +#define OTG1_DP_PULLDOWN (1 << 2) +#define OTG1_DM_PULLDOWN (1 << 3) +#define OTG1_ID_PULLDOWN (1 << 4) +#define OTG1_VBUS_DRV (1 << 5) +#define OTG1_VBUS_DISCHRG (1 << 6) +#define OTG1_VBUS_CHRG (1 << 7) + +#define ISP1301_I2C_OTG_CONTROL_2 0x10 /* u8 readonly */ + +#define OTG_B_SESS_END (1 << 6) +#define OTG_B_SESS_VLD (1 << 7) + +#define ISP1301_I2C_INTERRUPT_SOURCE 0x8 +#define ISP1301_I2C_INTERRUPT_LATCH 0xA +#define ISP1301_I2C_INTERRUPT_FALLING 0xC +#define ISP1301_I2C_INTERRUPT_RISING 0xE + +#define INT_VBUS_VLD (1 << 0) +#define INT_SESS_VLD (1 << 1) +#define INT_DP_HI (1 << 2) +#define INT_ID_GND (1 << 3) +#define INT_DM_HI (1 << 4) +#define INT_ID_FLOAT (1 << 5) +#define INT_BDIS_ACON (1 << 6) +#define INT_CR_INT (1 << 7) + +#define ISP1301_I2C_REG_CLEAR_ADDR 1 /* Register Address Modifier */ + +struct i2c_client *isp1301_get_client(struct device_node *node); + +#endif /* __LINUX_USB_ISP1301_H */ diff --git a/include/linux/usb/langwell_udc.h b/include/linux/usb/langwell_udc.h deleted file mode 100644 index 2d2d1bbad9d2..000000000000 --- a/include/linux/usb/langwell_udc.h +++ /dev/null @@ -1,310 +0,0 @@ -/* - * Intel Langwell USB Device Controller driver - * Copyright (C) 2008-2009, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. - * - */ - -#ifndef __LANGWELL_UDC_H -#define __LANGWELL_UDC_H - - -/* MACRO defines */ -#define CAP_REG_OFFSET 0x0 -#define OP_REG_OFFSET 0x28 - -#define DMA_ADDR_INVALID (~(dma_addr_t)0) - -#define DQH_ALIGNMENT 2048 -#define DTD_ALIGNMENT 64 -#define DMA_BOUNDARY 4096 - -#define EP0_MAX_PKT_SIZE 64 -#define EP_DIR_IN 1 -#define EP_DIR_OUT 0 - -#define FLUSH_TIMEOUT 1000 -#define RESET_TIMEOUT 1000 -#define SETUPSTAT_TIMEOUT 100 -#define PRIME_TIMEOUT 100 - - -/* device memory space registers */ - -/* Capability Registers, BAR0 + CAP_REG_OFFSET */ -struct langwell_cap_regs { - /* offset: 0x0 */ - u8 caplength; /* offset of Operational Register */ - u8 _reserved3; - u16 hciversion; /* H: BCD encoding of host version */ - u32 hcsparams; /* H: host port steering logic capability */ - u32 hccparams; /* H: host multiple mode control capability */ -#define HCC_LEN BIT(17) /* Link power management (LPM) capability */ - u8 _reserved4[0x20-0xc]; - /* offset: 0x20 */ - u16 dciversion; /* BCD encoding of device version */ - u8 _reserved5[0x24-0x22]; - u32 dccparams; /* overall device controller capability */ -#define HOSTCAP BIT(8) /* host capable */ -#define DEVCAP BIT(7) /* device capable */ -#define DEN(d) \ - (((d)>>0)&0x1f) /* bits 4:0, device endpoint number */ -} __attribute__ ((packed)); - - -/* Operational Registers, BAR0 + OP_REG_OFFSET */ -struct langwell_op_regs { - /* offset: 0x28 */ - u32 extsts; -#define EXTS_TI1 BIT(4) /* general purpose timer interrupt 1 */ -#define EXTS_TI1TI0 BIT(3) /* general purpose timer interrupt 0 */ -#define EXTS_TI1UPI BIT(2) /* USB host periodic interrupt */ -#define EXTS_TI1UAI BIT(1) /* USB host asynchronous interrupt */ -#define EXTS_TI1NAKI BIT(0) /* NAK interrupt */ - u32 extintr; -#define EXTI_TIE1 BIT(4) /* general purpose timer interrupt enable 1 */ -#define EXTI_TIE0 BIT(3) /* general purpose timer interrupt enable 0 */ -#define EXTI_UPIE BIT(2) /* USB host periodic interrupt enable */ -#define EXTI_UAIE BIT(1) /* USB host asynchronous interrupt enable */ -#define EXTI_NAKE BIT(0) /* NAK interrupt enable */ - /* offset: 0x30 */ - u32 usbcmd; -#define CMD_HIRD(u) \ - (((u)>>24)&0xf) /* bits 27:24, host init resume duration */ -#define CMD_ITC(u) \ - (((u)>>16)&0xff) /* bits 23:16, interrupt threshold control */ -#define CMD_PPE BIT(15) /* per-port change events enable */ -#define CMD_ATDTW BIT(14) /* add dTD tripwire */ -#define CMD_SUTW BIT(13) /* setup tripwire */ -#define CMD_ASPE BIT(11) /* asynchronous schedule park mode enable */ -#define CMD_FS2 BIT(10) /* frame list size */ -#define CMD_ASP1 BIT(9) /* asynchronous schedule park mode count */ -#define CMD_ASP0 BIT(8) -#define CMD_LR BIT(7) /* light host/device controller reset */ -#define CMD_IAA BIT(6) /* interrupt on async advance doorbell */ -#define CMD_ASE BIT(5) /* asynchronous schedule enable */ -#define CMD_PSE BIT(4) /* periodic schedule enable */ -#define CMD_FS1 BIT(3) -#define CMD_FS0 BIT(2) -#define CMD_RST BIT(1) /* controller reset */ -#define CMD_RUNSTOP BIT(0) /* run/stop */ - u32 usbsts; -#define STS_PPCI(u) \ - (((u)>>16)&0xffff) /* bits 31:16, port-n change detect */ -#define STS_AS BIT(15) /* asynchronous schedule status */ -#define STS_PS BIT(14) /* periodic schedule status */ -#define STS_RCL BIT(13) /* reclamation */ -#define STS_HCH BIT(12) /* HC halted */ -#define STS_ULPII BIT(10) /* ULPI interrupt */ -#define STS_SLI BIT(8) /* DC suspend */ -#define STS_SRI BIT(7) /* SOF received */ -#define STS_URI BIT(6) /* USB reset received */ -#define STS_AAI BIT(5) /* interrupt on async advance */ -#define STS_SEI BIT(4) /* system error */ -#define STS_FRI BIT(3) /* frame list rollover */ -#define STS_PCI BIT(2) /* port change detect */ -#define STS_UEI BIT(1) /* USB error interrupt */ -#define STS_UI BIT(0) /* USB interrupt */ - u32 usbintr; -/* bits 31:16, per-port interrupt enable */ -#define INTR_PPCE(u) (((u)>>16)&0xffff) -#define INTR_ULPIE BIT(10) /* ULPI enable */ -#define INTR_SLE BIT(8) /* DC sleep/suspend enable */ -#define INTR_SRE BIT(7) /* SOF received enable */ -#define INTR_URE BIT(6) /* USB reset enable */ -#define INTR_AAE BIT(5) /* interrupt on async advance enable */ -#define INTR_SEE BIT(4) /* system error enable */ -#define INTR_FRE BIT(3) /* frame list rollover enable */ -#define INTR_PCE BIT(2) /* port change detect enable */ -#define INTR_UEE BIT(1) /* USB error interrupt enable */ -#define INTR_UE BIT(0) /* USB interrupt enable */ - u32 frindex; /* frame index */ -#define FRINDEX_MASK (0x3fff << 0) - u32 ctrldssegment; /* not used */ - u32 deviceaddr; -#define USBADR_SHIFT 25 -#define USBADR(d) \ - (((d)>>25)&0x7f) /* bits 31:25, device address */ -#define USBADR_MASK (0x7f << 25) -#define USBADRA BIT(24) /* device address advance */ - u32 endpointlistaddr;/* endpoint list top memory address */ -/* bits 31:11, endpoint list pointer */ -#define EPBASE(d) (((d)>>11)&0x1fffff) -#define ENDPOINTLISTADDR_MASK (0x1fffff << 11) - u32 ttctrl; /* H: TT operatin, not used */ - /* offset: 0x50 */ - u32 burstsize; /* burst size of data movement */ -#define TXPBURST(b) \ - (((b)>>8)&0xff) /* bits 15:8, TX burst length */ -#define RXPBURST(b) \ - (((b)>>0)&0xff) /* bits 7:0, RX burst length */ - u32 txfilltuning; /* TX tuning */ - u32 txttfilltuning; /* H: TX TT tuning */ - u32 ic_usb; /* control the IC_USB FS/LS transceiver */ - /* offset: 0x60 */ - u32 ulpi_viewport; /* indirect access to ULPI PHY */ -#define ULPIWU BIT(31) /* ULPI wakeup */ -#define ULPIRUN BIT(30) /* ULPI read/write run */ -#define ULPIRW BIT(29) /* ULPI read/write control */ -#define ULPISS BIT(27) /* ULPI sync state */ -#define ULPIPORT(u) \ - (((u)>>24)&7) /* bits 26:24, ULPI port number */ -#define ULPIADDR(u) \ - (((u)>>16)&0xff) /* bits 23:16, ULPI data address */ -#define ULPIDATRD(u) \ - (((u)>>8)&0xff) /* bits 15:8, ULPI data read */ -#define ULPIDATWR(u) \ - (((u)>>0)&0xff) /* bits 7:0, ULPI date write */ - u8 _reserved6[0x70-0x64]; - /* offset: 0x70 */ - u32 configflag; /* H: not used */ - u32 portsc1; /* port status */ -#define DA(p) \ - (((p)>>25)&0x7f) /* bits 31:25, device address */ -#define PORTS_SSTS (BIT(24) | BIT(23)) /* suspend status */ -#define PORTS_WKOC BIT(22) /* wake on over-current enable */ -#define PORTS_WKDS BIT(21) /* wake on disconnect enable */ -#define PORTS_WKCN BIT(20) /* wake on connect enable */ -#define PORTS_PTC(p) (((p)>>16)&0xf) /* bits 19:16, port test control */ -#define PORTS_PIC (BIT(15) | BIT(14)) /* port indicator control */ -#define PORTS_PO BIT(13) /* port owner */ -#define PORTS_PP BIT(12) /* port power */ -#define PORTS_LS (BIT(11) | BIT(10)) /* line status */ -#define PORTS_SLP BIT(9) /* suspend using L1 */ -#define PORTS_PR BIT(8) /* port reset */ -#define PORTS_SUSP BIT(7) /* suspend */ -#define PORTS_FPR BIT(6) /* force port resume */ -#define PORTS_OCC BIT(5) /* over-current change */ -#define PORTS_OCA BIT(4) /* over-current active */ -#define PORTS_PEC BIT(3) /* port enable/disable change */ -#define PORTS_PE BIT(2) /* port enable/disable */ -#define PORTS_CSC BIT(1) /* connect status change */ -#define PORTS_CCS BIT(0) /* current connect status */ - u8 _reserved7[0xb4-0x78]; - /* offset: 0xb4 */ - u32 devlc; /* control LPM and each USB port behavior */ -/* bits 31:29, parallel transceiver select */ -#define LPM_PTS(d) (((d)>>29)&7) -#define LPM_STS BIT(28) /* serial transceiver select */ -#define LPM_PTW BIT(27) /* parallel transceiver width */ -#define LPM_PSPD(d) (((d)>>25)&3) /* bits 26:25, port speed */ -#define LPM_PSPD_MASK (BIT(26) | BIT(25)) -#define LPM_SPEED_FULL 0 -#define LPM_SPEED_LOW 1 -#define LPM_SPEED_HIGH 2 -#define LPM_SRT BIT(24) /* shorten reset time */ -#define LPM_PFSC BIT(23) /* port force full speed connect */ -#define LPM_PHCD BIT(22) /* PHY low power suspend clock disable */ -#define LPM_STL BIT(16) /* STALL reply to LPM token */ -#define LPM_BA(d) \ - (((d)>>1)&0x7ff) /* bits 11:1, BmAttributes */ -#define LPM_NYT_ACK BIT(0) /* NYET/ACK reply to LPM token */ - u8 _reserved8[0xf4-0xb8]; - /* offset: 0xf4 */ - u32 otgsc; /* On-The-Go status and control */ -#define OTGSC_DPIE BIT(30) /* data pulse interrupt enable */ -#define OTGSC_MSE BIT(29) /* 1 ms timer interrupt enable */ -#define OTGSC_BSEIE BIT(28) /* B session end interrupt enable */ -#define OTGSC_BSVIE BIT(27) /* B session valid interrupt enable */ -#define OTGSC_ASVIE BIT(26) /* A session valid interrupt enable */ -#define OTGSC_AVVIE BIT(25) /* A VBUS valid interrupt enable */ -#define OTGSC_IDIE BIT(24) /* USB ID interrupt enable */ -#define OTGSC_DPIS BIT(22) /* data pulse interrupt status */ -#define OTGSC_MSS BIT(21) /* 1 ms timer interrupt status */ -#define OTGSC_BSEIS BIT(20) /* B session end interrupt status */ -#define OTGSC_BSVIS BIT(19) /* B session valid interrupt status */ -#define OTGSC_ASVIS BIT(18) /* A session valid interrupt status */ -#define OTGSC_AVVIS BIT(17) /* A VBUS valid interrupt status */ -#define OTGSC_IDIS BIT(16) /* USB ID interrupt status */ -#define OTGSC_DPS BIT(14) /* data bus pulsing status */ -#define OTGSC_MST BIT(13) /* 1 ms timer toggle */ -#define OTGSC_BSE BIT(12) /* B session end */ -#define OTGSC_BSV BIT(11) /* B session valid */ -#define OTGSC_ASV BIT(10) /* A session valid */ -#define OTGSC_AVV BIT(9) /* A VBUS valid */ -#define OTGSC_USBID BIT(8) /* USB ID */ -#define OTGSC_HABA BIT(7) /* hw assist B-disconnect to A-connect */ -#define OTGSC_HADP BIT(6) /* hw assist data pulse */ -#define OTGSC_IDPU BIT(5) /* ID pullup */ -#define OTGSC_DP BIT(4) /* data pulsing */ -#define OTGSC_OT BIT(3) /* OTG termination */ -#define OTGSC_HAAR BIT(2) /* hw assist auto reset */ -#define OTGSC_VC BIT(1) /* VBUS charge */ -#define OTGSC_VD BIT(0) /* VBUS discharge */ - u32 usbmode; -#define MODE_VBPS BIT(5) /* R/W VBUS power select */ -#define MODE_SDIS BIT(4) /* R/W stream disable mode */ -#define MODE_SLOM BIT(3) /* R/W setup lockout mode */ -#define MODE_ENSE BIT(2) /* endian select */ -#define MODE_CM(u) (((u)>>0)&3) /* bits 1:0, controller mode */ -#define MODE_IDLE 0 -#define MODE_DEVICE 2 -#define MODE_HOST 3 - u8 _reserved9[0x100-0xfc]; - /* offset: 0x100 */ - u32 endptnak; -#define EPTN(e) \ - (((e)>>16)&0xffff) /* bits 31:16, TX endpoint NAK */ -#define EPRN(e) \ - (((e)>>0)&0xffff) /* bits 15:0, RX endpoint NAK */ - u32 endptnaken; -#define EPTNE(e) \ - (((e)>>16)&0xffff) /* bits 31:16, TX endpoint NAK enable */ -#define EPRNE(e) \ - (((e)>>0)&0xffff) /* bits 15:0, RX endpoint NAK enable */ - u32 endptsetupstat; -#define SETUPSTAT_MASK (0xffff << 0) /* bits 15:0 */ -#define EP0SETUPSTAT_MASK 1 - u32 endptprime; -/* bits 31:16, prime endpoint transmit buffer */ -#define PETB(e) (((e)>>16)&0xffff) -/* bits 15:0, prime endpoint receive buffer */ -#define PERB(e) (((e)>>0)&0xffff) - /* offset: 0x110 */ - u32 endptflush; -/* bits 31:16, flush endpoint transmit buffer */ -#define FETB(e) (((e)>>16)&0xffff) -/* bits 15:0, flush endpoint receive buffer */ -#define FERB(e) (((e)>>0)&0xffff) - u32 endptstat; -/* bits 31:16, endpoint transmit buffer ready */ -#define ETBR(e) (((e)>>16)&0xffff) -/* bits 15:0, endpoint receive buffer ready */ -#define ERBR(e) (((e)>>0)&0xffff) - u32 endptcomplete; -/* bits 31:16, endpoint transmit complete event */ -#define ETCE(e) (((e)>>16)&0xffff) -/* bits 15:0, endpoint receive complete event */ -#define ERCE(e) (((e)>>0)&0xffff) - /* offset: 0x11c */ - u32 endptctrl[16]; -#define EPCTRL_TXE BIT(23) /* TX endpoint enable */ -#define EPCTRL_TXR BIT(22) /* TX data toggle reset */ -#define EPCTRL_TXI BIT(21) /* TX data toggle inhibit */ -#define EPCTRL_TXT(e) (((e)>>18)&3) /* bits 19:18, TX endpoint type */ -#define EPCTRL_TXT_SHIFT 18 -#define EPCTRL_TXD BIT(17) /* TX endpoint data source */ -#define EPCTRL_TXS BIT(16) /* TX endpoint STALL */ -#define EPCTRL_RXE BIT(7) /* RX endpoint enable */ -#define EPCTRL_RXR BIT(6) /* RX data toggle reset */ -#define EPCTRL_RXI BIT(5) /* RX data toggle inhibit */ -#define EPCTRL_RXT(e) (((e)>>2)&3) /* bits 3:2, RX endpoint type */ -#define EPCTRL_RXT_SHIFT 2 /* bits 19:18, TX endpoint type */ -#define EPCTRL_RXD BIT(1) /* RX endpoint data sink */ -#define EPCTRL_RXS BIT(0) /* RX endpoint STALL */ -} __attribute__ ((packed)); - -#endif /* __LANGWELL_UDC_H */ - diff --git a/include/linux/usb/rndis_host.h b/include/linux/usb/rndis_host.h index 88fceb718c77..d44ef85db177 100644 --- a/include/linux/usb/rndis_host.h +++ b/include/linux/usb/rndis_host.h @@ -20,6 +20,8 @@ #ifndef __LINUX_USB_RNDIS_HOST_H #define __LINUX_USB_RNDIS_HOST_H +#include <linux/rndis.h> + /* * CONTROL uses CDC "encapsulated commands" with funky notifications. * - control-out: SEND_ENCAPSULATED @@ -49,47 +51,6 @@ struct rndis_msg_hdr { */ #define RNDIS_CONTROL_TIMEOUT_MS (5 * 1000) -#define RNDIS_MSG_COMPLETION cpu_to_le32(0x80000000) - -/* codes for "msg_type" field of rndis messages; - * only the data channel uses packet messages (maybe batched); - * everything else goes on the control channel. - */ -#define RNDIS_MSG_PACKET cpu_to_le32(0x00000001) /* 1-N packets */ -#define RNDIS_MSG_INIT cpu_to_le32(0x00000002) -#define RNDIS_MSG_INIT_C (RNDIS_MSG_INIT|RNDIS_MSG_COMPLETION) -#define RNDIS_MSG_HALT cpu_to_le32(0x00000003) -#define RNDIS_MSG_QUERY cpu_to_le32(0x00000004) -#define RNDIS_MSG_QUERY_C (RNDIS_MSG_QUERY|RNDIS_MSG_COMPLETION) -#define RNDIS_MSG_SET cpu_to_le32(0x00000005) -#define RNDIS_MSG_SET_C (RNDIS_MSG_SET|RNDIS_MSG_COMPLETION) -#define RNDIS_MSG_RESET cpu_to_le32(0x00000006) -#define RNDIS_MSG_RESET_C (RNDIS_MSG_RESET|RNDIS_MSG_COMPLETION) -#define RNDIS_MSG_INDICATE cpu_to_le32(0x00000007) -#define RNDIS_MSG_KEEPALIVE cpu_to_le32(0x00000008) -#define RNDIS_MSG_KEEPALIVE_C (RNDIS_MSG_KEEPALIVE|RNDIS_MSG_COMPLETION) - -/* codes for "status" field of completion messages */ -#define RNDIS_STATUS_SUCCESS cpu_to_le32(0x00000000) -#define RNDIS_STATUS_FAILURE cpu_to_le32(0xc0000001) -#define RNDIS_STATUS_INVALID_DATA cpu_to_le32(0xc0010015) -#define RNDIS_STATUS_NOT_SUPPORTED cpu_to_le32(0xc00000bb) -#define RNDIS_STATUS_MEDIA_CONNECT cpu_to_le32(0x4001000b) -#define RNDIS_STATUS_MEDIA_DISCONNECT cpu_to_le32(0x4001000c) -#define RNDIS_STATUS_MEDIA_SPECIFIC_INDICATION cpu_to_le32(0x40010012) - -/* codes for OID_GEN_PHYSICAL_MEDIUM */ -#define RNDIS_PHYSICAL_MEDIUM_UNSPECIFIED cpu_to_le32(0x00000000) -#define RNDIS_PHYSICAL_MEDIUM_WIRELESS_LAN cpu_to_le32(0x00000001) -#define RNDIS_PHYSICAL_MEDIUM_CABLE_MODEM cpu_to_le32(0x00000002) -#define RNDIS_PHYSICAL_MEDIUM_PHONE_LINE cpu_to_le32(0x00000003) -#define RNDIS_PHYSICAL_MEDIUM_POWER_LINE cpu_to_le32(0x00000004) -#define RNDIS_PHYSICAL_MEDIUM_DSL cpu_to_le32(0x00000005) -#define RNDIS_PHYSICAL_MEDIUM_FIBRE_CHANNEL cpu_to_le32(0x00000006) -#define RNDIS_PHYSICAL_MEDIUM_1394 cpu_to_le32(0x00000007) -#define RNDIS_PHYSICAL_MEDIUM_WIRELESS_WAN cpu_to_le32(0x00000008) -#define RNDIS_PHYSICAL_MEDIUM_MAX cpu_to_le32(0x00000009) - struct rndis_data_hdr { __le32 msg_type; /* RNDIS_MSG_PACKET */ __le32 msg_len; /* rndis_data_hdr + data_len + pad */ @@ -222,29 +183,6 @@ struct rndis_keepalive_c { /* IN (optionally OUT) */ __le32 status; } __attribute__ ((packed)); -/* NOTE: about 30 OIDs are "mandatory" for peripherals to support ... and - * there are gobs more that may optionally be supported. We'll avoid as much - * of that mess as possible. - */ -#define OID_802_3_PERMANENT_ADDRESS cpu_to_le32(0x01010101) -#define OID_GEN_MAXIMUM_FRAME_SIZE cpu_to_le32(0x00010106) -#define OID_GEN_CURRENT_PACKET_FILTER cpu_to_le32(0x0001010e) -#define OID_GEN_PHYSICAL_MEDIUM cpu_to_le32(0x00010202) - -/* packet filter bits used by OID_GEN_CURRENT_PACKET_FILTER */ -#define RNDIS_PACKET_TYPE_DIRECTED cpu_to_le32(0x00000001) -#define RNDIS_PACKET_TYPE_MULTICAST cpu_to_le32(0x00000002) -#define RNDIS_PACKET_TYPE_ALL_MULTICAST cpu_to_le32(0x00000004) -#define RNDIS_PACKET_TYPE_BROADCAST cpu_to_le32(0x00000008) -#define RNDIS_PACKET_TYPE_SOURCE_ROUTING cpu_to_le32(0x00000010) -#define RNDIS_PACKET_TYPE_PROMISCUOUS cpu_to_le32(0x00000020) -#define RNDIS_PACKET_TYPE_SMT cpu_to_le32(0x00000040) -#define RNDIS_PACKET_TYPE_ALL_LOCAL cpu_to_le32(0x00000080) -#define RNDIS_PACKET_TYPE_GROUP cpu_to_le32(0x00001000) -#define RNDIS_PACKET_TYPE_ALL_FUNCTIONAL cpu_to_le32(0x00002000) -#define RNDIS_PACKET_TYPE_FUNCTIONAL cpu_to_le32(0x00004000) -#define RNDIS_PACKET_TYPE_MAC_FRAME cpu_to_le32(0x00008000) - /* default filter used with RNDIS devices */ #define RNDIS_DEFAULT_FILTER ( \ RNDIS_PACKET_TYPE_DIRECTED | \ diff --git a/include/linux/usb/serial.h b/include/linux/usb/serial.h index 474283888233..86c0b451745d 100644 --- a/include/linux/usb/serial.h +++ b/include/linux/usb/serial.h @@ -1,7 +1,7 @@ /* * USB Serial Converter stuff * - * Copyright (C) 1999 - 2005 + * Copyright (C) 1999 - 2012 * Greg Kroah-Hartman (greg@kroah.com) * * This program is free software; you can redistribute it and/or modify @@ -249,6 +249,7 @@ struct usb_serial_driver { int (*suspend)(struct usb_serial *serial, pm_message_t message); int (*resume)(struct usb_serial *serial); + int (*reset_resume)(struct usb_serial *serial); /* serial function calls */ /* Called by console and by the tty layer */ @@ -292,16 +293,11 @@ struct usb_serial_driver { #define to_usb_serial_driver(d) \ container_of(d, struct usb_serial_driver, driver) -extern int usb_serial_register_drivers(struct usb_driver *udriver, - struct usb_serial_driver * const serial_drivers[]); -extern void usb_serial_deregister_drivers(struct usb_driver *udriver, - struct usb_serial_driver * const serial_drivers[]); +extern int usb_serial_register_drivers(struct usb_serial_driver *const serial_drivers[], + const char *name, const struct usb_device_id *id_table); +extern void usb_serial_deregister_drivers(struct usb_serial_driver *const serial_drivers[]); extern void usb_serial_port_softint(struct usb_serial_port *port); -extern int usb_serial_probe(struct usb_interface *iface, - const struct usb_device_id *id); -extern void usb_serial_disconnect(struct usb_interface *iface); - extern int usb_serial_suspend(struct usb_interface *intf, pm_message_t message); extern int usb_serial_resume(struct usb_interface *intf); @@ -400,8 +396,8 @@ do { \ /* * module_usb_serial_driver() - Helper macro for registering a USB Serial driver - * @__usb_driver: usb_driver struct to register * @__serial_drivers: list of usb_serial drivers to register + * @__ids: all device ids that @__serial_drivers bind to * * Helper macro for USB serial drivers which do not do anything special * in module init/exit. This eliminates a lot of boilerplate. Each @@ -409,9 +405,21 @@ do { \ * module_init() and module_exit() * */ -#define module_usb_serial_driver(__usb_driver, __serial_drivers) \ - module_driver(__usb_driver, usb_serial_register_drivers, \ - usb_serial_deregister_drivers, __serial_drivers) +#define usb_serial_module_driver(__name, __serial_drivers, __ids) \ +static int __init usb_serial_module_init(void) \ +{ \ + return usb_serial_register_drivers(__serial_drivers, \ + __name, __ids); \ +} \ +module_init(usb_serial_module_init); \ +static void __exit usb_serial_module_exit(void) \ +{ \ + usb_serial_deregister_drivers(__serial_drivers); \ +} \ +module_exit(usb_serial_module_exit); + +#define module_usb_serial_driver(__serial_drivers, __ids) \ + usb_serial_module_driver(KBUILD_MODNAME, __serial_drivers, __ids) #endif /* __LINUX_USB_SERIAL_H */ diff --git a/include/linux/usb/usbnet.h b/include/linux/usb/usbnet.h index 605b0aa8d852..76f439647c4b 100644 --- a/include/linux/usb/usbnet.h +++ b/include/linux/usb/usbnet.h @@ -191,7 +191,8 @@ extern void usbnet_cdc_status(struct usbnet *, struct urb *); enum skb_state { illegal = 0, tx_start, tx_done, - rx_start, rx_done, rx_cleanup + rx_start, rx_done, rx_cleanup, + unlink_start }; struct skb_data { /* skb->cb is one of these */ diff --git a/include/linux/virtio_config.h b/include/linux/virtio_config.h index 7323a3390206..fc457f452f64 100644 --- a/include/linux/virtio_config.h +++ b/include/linux/virtio_config.h @@ -74,15 +74,6 @@ * @set_status: write the status byte * vdev: the virtio_device * status: the new status byte - * @request_vqs: request the specified number of virtqueues - * vdev: the virtio_device - * max_vqs: the max number of virtqueues we want - * If supplied, must call before any virtqueues are instantiated. - * To modify the max number of virtqueues after request_vqs has been - * called, call free_vqs and then request_vqs with a new value. - * @free_vqs: cleanup resources allocated by request_vqs - * vdev: the virtio_device - * If supplied, must call after all virtqueues have been deleted. * @reset: reset the device * vdev: the virtio device * After this, status and feature negotiation must be done again @@ -156,7 +147,7 @@ static inline bool virtio_has_feature(const struct virtio_device *vdev, * @vdev: the virtio device * @fbit: the feature bit * @offset: the type to search for. - * @val: a pointer to the value to fill in. + * @v: a pointer to the value to fill in. * * The return value is -ENOENT if the feature doesn't exist. Otherwise * the config value is copied into whatever is pointed to by v. */ diff --git a/include/linux/virtio_net.h b/include/linux/virtio_net.h index 970d5a2a9047..2470f541af50 100644 --- a/include/linux/virtio_net.h +++ b/include/linux/virtio_net.h @@ -49,8 +49,11 @@ #define VIRTIO_NET_F_CTRL_RX 18 /* Control channel RX mode support */ #define VIRTIO_NET_F_CTRL_VLAN 19 /* Control channel VLAN filtering */ #define VIRTIO_NET_F_CTRL_RX_EXTRA 20 /* Extra RX mode control support */ +#define VIRTIO_NET_F_GUEST_ANNOUNCE 21 /* Guest can announce device on the + * network */ #define VIRTIO_NET_S_LINK_UP 1 /* Link is up */ +#define VIRTIO_NET_S_ANNOUNCE 2 /* Announcement is needed */ struct virtio_net_config { /* The config defining mac address (if VIRTIO_NET_F_MAC) */ @@ -152,4 +155,15 @@ struct virtio_net_ctrl_mac { #define VIRTIO_NET_CTRL_VLAN_ADD 0 #define VIRTIO_NET_CTRL_VLAN_DEL 1 +/* + * Control link announce acknowledgement + * + * The command VIRTIO_NET_CTRL_ANNOUNCE_ACK is used to indicate that + * driver has recevied the notification; device would clear the + * VIRTIO_NET_S_ANNOUNCE bit in the status field after it receives + * this command. + */ +#define VIRTIO_NET_CTRL_ANNOUNCE 3 + #define VIRTIO_NET_CTRL_ANNOUNCE_ACK 0 + #endif /* _LINUX_VIRTIO_NET_H */ |