diff options
Diffstat (limited to 'include')
49 files changed, 332 insertions, 263 deletions
diff --git a/include/asm-arm/arch-s3c2410/anubis-cpld.h b/include/asm-arm/arch-s3c2410/anubis-cpld.h index dcebf6d61903..168b93fee529 100644 --- a/include/asm-arm/arch-s3c2410/anubis-cpld.h +++ b/include/asm-arm/arch-s3c2410/anubis-cpld.h @@ -18,4 +18,8 @@ #define ANUBIS_CTRL1_NANDSEL (0x3) +/* IDREG - revision */ + +#define ANUBIS_IDREG_REVMASK (0x7) + #endif /* __ASM_ARCH_ANUBISCPLD_H */ diff --git a/include/asm-arm/arch-s3c2410/anubis-map.h b/include/asm-arm/arch-s3c2410/anubis-map.h index ab076de4a0d0..830d114261da 100644 --- a/include/asm-arm/arch-s3c2410/anubis-map.h +++ b/include/asm-arm/arch-s3c2410/anubis-map.h @@ -27,14 +27,8 @@ #define ANUBIS_VA_CTRL1 ANUBIS_IOADDR(0x00000000) /* 0x01800000 */ #define ANUBIS_PA_CTRL1 (ANUBIS_PA_CPLD) -#define ANUBIS_VA_CTRL2 ANUBIS_IOADDR(0x00100000) /* 0x01900000 */ -#define ANUBIS_PA_CTRL2 (ANUBIS_PA_CPLD) - -#define ANUBIS_VA_CTRL3 ANUBIS_IOADDR(0x00200000) /* 0x01A00000 */ -#define ANUBIS_PA_CTRL3 (ANUBIS_PA_CPLD) - -#define ANUBIS_VA_CTRL4 ANUBIS_IOADDR(0x00300000) /* 0x01B00000 */ -#define ANUBIS_PA_CTRL4 (ANUBIS_PA_CPLD) +#define ANUBIS_VA_IDREG ANUBIS_IOADDR(0x00300000) /* 0x01B00000 */ +#define ANUBIS_PA_IDREG (ANUBIS_PA_CPLD + (3<<23)) #define ANUBIS_IDEPRI ANUBIS_IOADDR(0x01000000) #define ANUBIS_IDEPRIAUX ANUBIS_IOADDR(0x01100000) diff --git a/include/asm-arm/arch-s3c2410/osiris-cpld.h b/include/asm-arm/arch-s3c2410/osiris-cpld.h index 3b6498468d62..229ab2351db6 100644 --- a/include/asm-arm/arch-s3c2410/osiris-cpld.h +++ b/include/asm-arm/arch-s3c2410/osiris-cpld.h @@ -1,6 +1,6 @@ /* linux/include/asm-arm/arch-s3c2410/osiris-cpld.h * - * Copyright (c) 2005 Simtec Electronics + * Copyright 2005 Simtec Electronics * http://www.simtec.co.uk/products/ * Ben Dooks <ben@simtec.co.uk> * @@ -14,12 +14,17 @@ #ifndef __ASM_ARCH_OSIRISCPLD_H #define __ASM_ARCH_OSIRISCPLD_H -/* CTRL1 - NAND WP control */ +/* CTRL0 - NAND WP control */ -#define OSIRIS_CTRL1_NANDSEL (0x3) -#define OSIRIS_CTRL1_BOOT_INT (1<<3) -#define OSIRIS_CTRL1_PCMCIA (1<<4) -#define OSIRIS_CTRL1_PCMCIA_nWAIT (1<<6) -#define OSIRIS_CTRL1_PCMCIA_nIOIS16 (1<<7) +#define OSIRIS_CTRL0_NANDSEL (0x3) +#define OSIRIS_CTRL0_BOOT_INT (1<<3) +#define OSIRIS_CTRL0_PCMCIA (1<<4) +#define OSIRIS_CTRL0_FIX8 (1<<5) +#define OSIRIS_CTRL0_PCMCIA_nWAIT (1<<6) +#define OSIRIS_CTRL0_PCMCIA_nIOIS16 (1<<7) + +#define OSIRIS_CTRL1_FIX8 (1<<0) + +#define OSIRIS_ID_REVMASK (0x7) #endif /* __ASM_ARCH_OSIRISCPLD_H */ diff --git a/include/asm-arm/arch-s3c2410/osiris-map.h b/include/asm-arm/arch-s3c2410/osiris-map.h index a14164dfa525..b5c74d2b9aaa 100644 --- a/include/asm-arm/arch-s3c2410/osiris-map.h +++ b/include/asm-arm/arch-s3c2410/osiris-map.h @@ -24,16 +24,19 @@ /* we put the CPLD registers next, to get them out of the way */ -#define OSIRIS_VA_CTRL1 OSIRIS_IOADDR(0x00000000) -#define OSIRIS_PA_CTRL1 (OSIRIS_PA_CPLD) +#define OSIRIS_VA_CTRL0 OSIRIS_IOADDR(0x00000000) +#define OSIRIS_PA_CTRL0 (OSIRIS_PA_CPLD) -#define OSIRIS_VA_CTRL2 OSIRIS_IOADDR(0x00100000) -#define OSIRIS_PA_CTRL2 (OSIRIS_PA_CPLD + (1<<23)) +#define OSIRIS_VA_CTRL1 OSIRIS_IOADDR(0x00100000) +#define OSIRIS_PA_CTRL1 (OSIRIS_PA_CPLD + (1<<23)) -#define OSIRIS_VA_CTRL3 OSIRIS_IOADDR(0x00200000) -#define OSIRIS_PA_CTRL3 (OSIRIS_PA_CPLD + (2<<23)) +#define OSIRIS_VA_CTRL2 OSIRIS_IOADDR(0x00200000) +#define OSIRIS_PA_CTRL2 (OSIRIS_PA_CPLD + (2<<23)) -#define OSIRIS_VA_CTRL4 OSIRIS_IOADDR(0x00300000) -#define OSIRIS_PA_CTRL4 (OSIRIS_PA_CPLD + (3<<23)) +#define OSIRIS_VA_CTRL3 OSIRIS_IOADDR(0x00300000) +#define OSIRIS_PA_CTRL3 (OSIRIS_PA_CPLD + (2<<23)) + +#define OSIRIS_VA_IDREG OSIRIS_IOADDR(0x00700000) +#define OSIRIS_PA_IDREG (OSIRIS_PA_CPLD + (7<<23)) #endif /* __ASM_ARCH_OSIRISMAP_H */ diff --git a/include/asm-arm/linkage.h b/include/asm-arm/linkage.h index dbe4b4e31a5b..5a25632b1bc0 100644 --- a/include/asm-arm/linkage.h +++ b/include/asm-arm/linkage.h @@ -4,4 +4,8 @@ #define __ALIGN .align 0 #define __ALIGN_STR ".align 0" +#define ENDPROC(name) \ + .type name, %function; \ + END(name) + #endif diff --git a/include/asm-avr32/arch-at32ap/gpio.h b/include/asm-avr32/arch-at32ap/gpio.h index 80a21aa9ae77..af7f9535bab3 100644 --- a/include/asm-avr32/arch-at32ap/gpio.h +++ b/include/asm-avr32/arch-at32ap/gpio.h @@ -14,6 +14,8 @@ int gpio_direction_output(unsigned int gpio, int value); int gpio_get_value(unsigned int gpio); void gpio_set_value(unsigned int gpio, int value); +#include <asm-generic/gpio.h> /* cansleep wrappers */ + static inline int gpio_to_irq(unsigned int gpio) { return gpio + GPIO_IRQ_BASE; diff --git a/include/asm-avr32/cache.h b/include/asm-avr32/cache.h index dabb955f3c00..d3cf35ab11ab 100644 --- a/include/asm-avr32/cache.h +++ b/include/asm-avr32/cache.h @@ -4,6 +4,15 @@ #define L1_CACHE_SHIFT 5 #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) +/* + * Memory returned by kmalloc() may be used for DMA, so we must make + * sure that all such allocations are cache aligned. Otherwise, + * unrelated code may cause parts of the buffer to be read into the + * cache before the transfer is done, causing old data to be seen by + * the CPU. + */ +#define ARCH_KMALLOC_MINALIGN L1_CACHE_BYTES + #ifndef __ASSEMBLER__ struct cache_info { unsigned int ways; diff --git a/include/asm-blackfin/blackfin.h b/include/asm-blackfin/blackfin.h index 14e58de73973..db3b615ffbab 100644 --- a/include/asm-blackfin/blackfin.h +++ b/include/asm-blackfin/blackfin.h @@ -6,7 +6,11 @@ #ifndef _BLACKFIN_H_ #define _BLACKFIN_H_ -#include <asm/macros.h> +#define LO(con32) ((con32) & 0xFFFF) +#define lo(con32) ((con32) & 0xFFFF) +#define HI(con32) (((con32) >> 16) & 0xFFFF) +#define hi(con32) (((con32) >> 16) & 0xFFFF) + #include <asm/mach/blackfin.h> #include <asm/bfin-global.h> diff --git a/include/asm-blackfin/gpio.h b/include/asm-blackfin/gpio.h index aa0d5503e232..d98d77ad71f7 100644 --- a/include/asm-blackfin/gpio.h +++ b/include/asm-blackfin/gpio.h @@ -332,6 +332,7 @@ struct gpio_port_s { unsigned short inen; unsigned short fer; + unsigned short reserved; }; #endif /*CONFIG_PM*/ diff --git a/include/asm-blackfin/mach-common/def_LPBlackfin.h b/include/asm-blackfin/mach-common/def_LPBlackfin.h index 76103526aec1..be1ece8c0c27 100644 --- a/include/asm-blackfin/mach-common/def_LPBlackfin.h +++ b/include/asm-blackfin/mach-common/def_LPBlackfin.h @@ -42,6 +42,12 @@ #if defined(ANOMALY_05000198) +#define bfin_read8(addr) ({ unsigned char __v; \ + __asm__ __volatile__ ("NOP;\n\t" \ + "%0 = b[%1] (z);\n\t" \ + : "=d"(__v) : "a"(addr)); \ + __v; }) + #define bfin_read16(addr) ({ unsigned __v; \ __asm__ __volatile__ ("NOP;\n\t"\ "%0 = w[%1] (z);\n\t"\ @@ -52,6 +58,11 @@ "%0 = [%1];\n\t"\ : "=d"(__v) : "a"(addr)); __v; }) +#define bfin_write8(addr, val) ({ \ + __asm__ __volatile__ ("NOP;\n\t" \ + "b[%0] = %1;\n\t" \ + : : "a"(addr), "d"(val) : "memory");}) + #define bfin_write16(addr,val) ({\ __asm__ __volatile__ ("NOP;\n\t"\ "w[%0] = %1;\n\t"\ @@ -64,6 +75,12 @@ #else +#define bfin_read8(addr) ({ unsigned char __v; \ + __asm__ __volatile__ ( \ + "%0 = b[%1] (z);\n\t" \ + :"=d"(__v) : "a"(addr)); \ + __v; }) + #define bfin_read16(addr) ({ unsigned __v; \ __asm__ __volatile__ (\ "%0 = w[%1] (z);\n\t"\ @@ -74,6 +91,11 @@ "%0 = [%1];\n\t"\ : "=d"(__v) : "a"(addr)); __v; }) +#define bfin_write8(addr, val) ({ \ + __asm__ __volatile__ ( \ + "b[%0] = %1; \n\t" \ + ::"a"(addr), "d"(val) : "memory");}) + #define bfin_write16(addr,val) ({\ __asm__ __volatile__ (\ "w[%0] = %1;\n\t"\ diff --git a/include/asm-blackfin/macros.h b/include/asm-blackfin/macros.h index c0c04a2f2dd5..e69de29bb2d1 100644 --- a/include/asm-blackfin/macros.h +++ b/include/asm-blackfin/macros.h @@ -1,95 +0,0 @@ -/************************************************************************ - * - * macros.h - * - * (c) Copyright 2001-2003 Analog Devices, Inc. All rights reserved. - * - ************************************************************************/ - -/* Defines various assembly macros. */ - -#ifndef _MACROS_H -#define _MACROS_H - -#define LO(con32) ((con32) & 0xFFFF) -#define lo(con32) ((con32) & 0xFFFF) -#define HI(con32) (((con32) >> 16) & 0xFFFF) -#define hi(con32) (((con32) >> 16) & 0xFFFF) - -/* - * Set the corresponding bits in a System Register (SR); - * All bits set in "mask" will be set in the system register - * specified by "sys_reg" bitset_SR(sys_reg, mask), where - * sys_reg is the system register and mask are the bits to be set. - */ -#define bitset_SR(sys_reg, mask)\ - [--SP] = (R7:6);\ - r7 = sys_reg;\ - r6.l = (mask) & 0xffff;\ - r6.h = (mask) >> 16;\ - r7 = r7 | r6;\ - sys_reg = r7;\ - csync;\ - (R7:6) = [SP++] - -/* - * Clear the corresponding bits in a System Register (SR); - * All bits set in "mask" will be cleared in the SR - * specified by "sys_reg" bitclr_SR(sys_reg, mask), where - * sys_reg is the SR and mask are the bits to be cleared. - */ -#define bitclr_SR(sys_reg, mask)\ - [--SP] = (R7:6);\ - r7 = sys_reg;\ - r7 =~ r7;\ - r6.l = (mask) & 0xffff;\ - r6.h = (mask) >> 16;\ - r7 = r7 | r6;\ - r7 =~ r7;\ - sys_reg = r7;\ - csync;\ - (R7:6) = [SP++] - -/* - * Set the corresponding bits in a Memory Mapped Register (MMR); - * All bits set in "mask" will be set in the MMR specified by "mmr_reg" - * bitset_MMR(mmr_reg, mask), where mmr_reg is the MMR and mask are - * the bits to be set. - */ -#define bitset_MMR(mmr_reg, mask)\ - [--SP] = (R7:6);\ - [--SP] = P5;\ - p5.l = mmr_reg & 0xffff;\ - p5.h = mmr_reg >> 16;\ - r7 = [p5];\ - r6.l = (mask) & 0xffff;\ - r6.h = (mask) >> 16;\ - r7 = r7 | r6;\ - [p5] = r7;\ - csync;\ - p5 = [SP++];\ - (R7:6) = [SP++] - -/* - * Clear the corresponding bits in a Memory Mapped Register (MMR); - * All bits set in "mask" will be cleared in the MMR specified by "mmr_reg" - * bitclr_MMRreg(mmr_reg, mask), where sys_reg is the MMR and mask are - * the bits to be cleared. - */ -#define bitclr_MMR(mmr_reg, mask)\ - [--SP] = (R7:6);\ - [--SP] = P5;\ - p5.l = mmr_reg & 0xffff;\ - p5.h = mmr_reg >> 16;\ - r7 = [p5];\ - r7 =~ r7;\ - r6.l = (mask) & 0xffff;\ - r6.h = (mask) >> 16;\ - r7 = r7 | r6;\ - r7 =~ r7;\ - [p5] = r7;\ - csync;\ - p5 = [SP++];\ - (R7:6) = [SP++] - -#endif /* _MACROS_H */ diff --git a/include/asm-generic/pgtable.h b/include/asm-generic/pgtable.h index dc8f99ee305f..7d7bcf990e99 100644 --- a/include/asm-generic/pgtable.h +++ b/include/asm-generic/pgtable.h @@ -27,13 +27,20 @@ do { \ * Largely same as above, but only sets the access flags (dirty, * accessed, and writable). Furthermore, we know it always gets set * to a "more permissive" setting, which allows most architectures - * to optimize this. + * to optimize this. We return whether the PTE actually changed, which + * in turn instructs the caller to do things like update__mmu_cache. + * This used to be done in the caller, but sparc needs minor faults to + * force that call on sun4c so we changed this macro slightly */ #define ptep_set_access_flags(__vma, __address, __ptep, __entry, __dirty) \ -do { \ - set_pte_at((__vma)->vm_mm, (__address), __ptep, __entry); \ - flush_tlb_page(__vma, __address); \ -} while (0) +({ \ + int __changed = !pte_same(*(__ptep), __entry); \ + if (__changed) { \ + set_pte_at((__vma)->vm_mm, (__address), __ptep, __entry); \ + flush_tlb_page(__vma, __address); \ + } \ + __changed; \ +}) #endif #ifndef __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG diff --git a/include/asm-i386/dma-mapping.h b/include/asm-i386/dma-mapping.h index 183eebeebbdc..f1d72d177f68 100644 --- a/include/asm-i386/dma-mapping.h +++ b/include/asm-i386/dma-mapping.h @@ -123,6 +123,8 @@ dma_mapping_error(dma_addr_t dma_addr) return 0; } +extern int forbid_dac; + static inline int dma_supported(struct device *dev, u64 mask) { @@ -134,6 +136,10 @@ dma_supported(struct device *dev, u64 mask) if(mask < 0x00ffffff) return 0; + /* Work around chipset bugs */ + if (forbid_dac > 0 && mask > 0xffffffffULL) + return 0; + return 1; } diff --git a/include/asm-i386/pgtable.h b/include/asm-i386/pgtable.h index 2394589786ba..628fa7747d0c 100644 --- a/include/asm-i386/pgtable.h +++ b/include/asm-i386/pgtable.h @@ -285,32 +285,36 @@ static inline pte_t native_local_ptep_get_and_clear(pte_t *ptep) */ #define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS #define ptep_set_access_flags(vma, address, ptep, entry, dirty) \ -do { \ - if (dirty) { \ +({ \ + int __changed = !pte_same(*(ptep), entry); \ + if (__changed && dirty) { \ (ptep)->pte_low = (entry).pte_low; \ pte_update_defer((vma)->vm_mm, (address), (ptep)); \ flush_tlb_page(vma, address); \ } \ -} while (0) + __changed; \ +}) #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_DIRTY #define ptep_test_and_clear_dirty(vma, addr, ptep) ({ \ - int ret = 0; \ - if (pte_dirty(*ptep)) \ - ret = test_and_clear_bit(_PAGE_BIT_DIRTY, &ptep->pte_low); \ - if (ret) \ - pte_update_defer(vma->vm_mm, addr, ptep); \ - ret; \ + int __ret = 0; \ + if (pte_dirty(*(ptep))) \ + __ret = test_and_clear_bit(_PAGE_BIT_DIRTY, \ + &(ptep)->pte_low); \ + if (__ret) \ + pte_update((vma)->vm_mm, addr, ptep); \ + __ret; \ }) #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG #define ptep_test_and_clear_young(vma, addr, ptep) ({ \ - int ret = 0; \ - if (pte_young(*ptep)) \ - ret = test_and_clear_bit(_PAGE_BIT_ACCESSED, &ptep->pte_low); \ - if (ret) \ - pte_update_defer(vma->vm_mm, addr, ptep); \ - ret; \ + int __ret = 0; \ + if (pte_young(*(ptep))) \ + __ret = test_and_clear_bit(_PAGE_BIT_ACCESSED, \ + &(ptep)->pte_low); \ + if (__ret) \ + pte_update((vma)->vm_mm, addr, ptep); \ + __ret; \ }) /* diff --git a/include/asm-ia64/pgtable.h b/include/asm-ia64/pgtable.h index 670b706411b8..6580f31b3135 100644 --- a/include/asm-ia64/pgtable.h +++ b/include/asm-ia64/pgtable.h @@ -533,16 +533,23 @@ extern void lazy_mmu_prot_update (pte_t pte); * daccess_bit in ivt.S). */ #ifdef CONFIG_SMP -# define ptep_set_access_flags(__vma, __addr, __ptep, __entry, __safely_writable) \ -do { \ - if (__safely_writable) { \ - set_pte(__ptep, __entry); \ - flush_tlb_page(__vma, __addr); \ - } \ -} while (0) +# define ptep_set_access_flags(__vma, __addr, __ptep, __entry, __safely_writable) \ +({ \ + int __changed = !pte_same(*(__ptep), __entry); \ + if (__changed && __safely_writable) { \ + set_pte(__ptep, __entry); \ + flush_tlb_page(__vma, __addr); \ + } \ + __changed; \ +}) #else -# define ptep_set_access_flags(__vma, __addr, __ptep, __entry, __safely_writable) \ - ptep_establish(__vma, __addr, __ptep, __entry) +# define ptep_set_access_flags(__vma, __addr, __ptep, __entry, __safely_writable) \ +({ \ + int __changed = !pte_same(*(__ptep), __entry); \ + if (__changed) \ + ptep_establish(__vma, __addr, __ptep, __entry); \ + __changed; \ +}) #endif # ifdef CONFIG_VIRTUAL_MEM_MAP diff --git a/include/asm-mips/irq.h b/include/asm-mips/irq.h index 91803ba30ff2..3ca6a076124d 100644 --- a/include/asm-mips/irq.h +++ b/include/asm-mips/irq.h @@ -72,4 +72,13 @@ extern int allocate_irqno(void); extern void alloc_legacy_irqno(void); extern void free_irqno(unsigned int irq); +/* + * Before R2 the timer and performance counter interrupts were both fixed to + * IE7. Since R2 their number has to be read from the c0_intctl register. + */ +#define CP0_LEGACY_COMPARE_IRQ 7 + +extern int cp0_compare_irq; +extern int cp0_perfcount_irq; + #endif /* _ASM_IRQ_H */ diff --git a/include/asm-mips/mips-boards/atlasint.h b/include/asm-mips/mips-boards/atlasint.h index 76add42e486e..93ba1c1b2a4f 100644 --- a/include/asm-mips/mips-boards/atlasint.h +++ b/include/asm-mips/mips-boards/atlasint.h @@ -28,11 +28,6 @@ #include <irq.h> -/* - * Interrupts 0..7 are used for Atlas CPU interrupts (nonEIC mode) - */ -#define MIPSCPU_INT_BASE MIPS_CPU_IRQ_BASE - /* CPU interrupt offsets */ #define MIPSCPU_INT_SW0 0 #define MIPSCPU_INT_SW1 1 @@ -42,7 +37,6 @@ #define MIPSCPU_INT_MB2 4 #define MIPSCPU_INT_MB3 5 #define MIPSCPU_INT_MB4 6 -#define MIPSCPU_INT_CPUCTR 7 /* * Interrupts 8..39 are used for Atlas interrupt controller interrupts diff --git a/include/asm-mips/mips-boards/generic.h b/include/asm-mips/mips-boards/generic.h index b98f1658cfd0..c8ebcc3e1267 100644 --- a/include/asm-mips/mips-boards/generic.h +++ b/include/asm-mips/mips-boards/generic.h @@ -73,12 +73,28 @@ * CoreEMUL with Bonito System Controller is treated like a Core20K * CoreEMUL with SOC-it 101 System Controller is treated like a CoreMSC */ -#define MIPS_REVISION_CORID_CORE_EMUL_BON 0x63 -#define MIPS_REVISION_CORID_CORE_EMUL_MSC 0x65 +#define MIPS_REVISION_CORID_CORE_EMUL_BON -1 +#define MIPS_REVISION_CORID_CORE_EMUL_MSC -2 #define MIPS_REVISION_CORID (((*(volatile u32 *)ioremap(MIPS_REVISION_REG, 4)) >> 10) & 0x3f) -extern unsigned int mips_revision_corid; +extern int mips_revision_corid; + +#define MIPS_REVISION_SCON_OTHER 0 +#define MIPS_REVISION_SCON_SOCITSC 1 +#define MIPS_REVISION_SCON_SOCITSCP 2 + +/* Artificial SCON defines for MIPS_REVISION_SCON_OTHER */ +#define MIPS_REVISION_SCON_UNKNOWN -1 +#define MIPS_REVISION_SCON_GT64120 -2 +#define MIPS_REVISION_SCON_BONITO -3 +#define MIPS_REVISION_SCON_BRTL -4 +#define MIPS_REVISION_SCON_SOCIT -5 +#define MIPS_REVISION_SCON_ROCIT -6 + +#define MIPS_REVISION_SCONID (((*(volatile u32 *)ioremap(MIPS_REVISION_REG, 4)) >> 24) & 0xff) + +extern int mips_revision_sconid; #ifdef CONFIG_PCI extern void mips_pcibios_init(void); diff --git a/include/asm-mips/mips-boards/maltaint.h b/include/asm-mips/mips-boards/maltaint.h index 9180d6466113..7461318f1cd1 100644 --- a/include/asm-mips/mips-boards/maltaint.h +++ b/include/asm-mips/mips-boards/maltaint.h @@ -32,11 +32,6 @@ */ #define MALTA_INT_BASE 0 -/* - * Interrupts 16..23 are used for Malta CPU interrupts (nonEIC mode) - */ -#define MIPSCPU_INT_BASE MIPS_CPU_IRQ_BASE - /* CPU interrupt offsets */ #define MIPSCPU_INT_SW0 0 #define MIPSCPU_INT_SW1 1 @@ -49,7 +44,6 @@ #define MIPSCPU_INT_COREHI MIPSCPU_INT_MB3 #define MIPSCPU_INT_MB4 6 #define MIPSCPU_INT_CORELO MIPSCPU_INT_MB4 -#define MIPSCPU_INT_CPUCTR 7 /* * Interrupts 64..127 are used for Soc-it Classic interrupts diff --git a/include/asm-mips/mips-boards/msc01_pci.h b/include/asm-mips/mips-boards/msc01_pci.h index 8eaefb837b9d..e036b7dd6deb 100644 --- a/include/asm-mips/mips-boards/msc01_pci.h +++ b/include/asm-mips/mips-boards/msc01_pci.h @@ -208,6 +208,7 @@ * latter, they should be moved elsewhere. */ #define MIPS_MSC01_PCI_REG_BASE 0x1bd00000 +#define MIPS_SOCITSC_PCI_REG_BASE 0x1ff10000 extern unsigned long _pcictrl_msc; diff --git a/include/asm-mips/mips-boards/seadint.h b/include/asm-mips/mips-boards/seadint.h index 4f6a3933699d..e710bae07340 100644 --- a/include/asm-mips/mips-boards/seadint.h +++ b/include/asm-mips/mips-boards/seadint.h @@ -22,14 +22,7 @@ #include <irq.h> -/* - * Interrupts 0..7 are used for SEAD CPU interrupts - */ -#define MIPSCPU_INT_BASE MIPS_CPU_IRQ_BASE - #define MIPSCPU_INT_UART0 2 #define MIPSCPU_INT_UART1 3 -#define MIPSCPU_INT_CPUCTR 7 - #endif /* !(_MIPS_SEADINT_H) */ diff --git a/include/asm-mips/mips-boards/simint.h b/include/asm-mips/mips-boards/simint.h index 54f2fe621d69..8ef6db76d5c1 100644 --- a/include/asm-mips/mips-boards/simint.h +++ b/include/asm-mips/mips-boards/simint.h @@ -21,15 +21,11 @@ #define SIM_INT_BASE 0 #define MIPSCPU_INT_MB0 2 -#define MIPSCPU_INT_BASE MIPS_CPU_IRQ_BASE #define MIPS_CPU_TIMER_IRQ 7 -#define MIPSCPU_INT_CPUCTR 7 - #define MSC01E_INT_BASE 64 -#define MIPSCPU_INT_CPUCTR 7 #define MSC01E_INT_CPUCTR 11 #endif diff --git a/include/asm-parisc/hardware.h b/include/asm-parisc/hardware.h index 76d880dc4bae..4e9626836bab 100644 --- a/include/asm-parisc/hardware.h +++ b/include/asm-parisc/hardware.h @@ -31,10 +31,11 @@ enum cpu_type { pcxw = 8, /* pa8500 pa 2.0 */ pcxw_ = 9, /* pa8600 (w+) pa 2.0 */ pcxw2 = 10, /* pa8700 pa 2.0 */ - mako = 11 /* pa8800 pa 2.0 */ + mako = 11, /* pa8800 pa 2.0 */ + mako2 = 12 /* pa8900 pa 2.0 */ }; -extern char *cpu_name_version[][2]; /* mapping from enum cpu_type to strings */ +extern const char * const cpu_name_version[][2]; /* mapping from enum cpu_type to strings */ struct parisc_driver; diff --git a/include/asm-parisc/linkage.h b/include/asm-parisc/linkage.h index 7a09d911b538..ad8cd0d069ea 100644 --- a/include/asm-parisc/linkage.h +++ b/include/asm-parisc/linkage.h @@ -8,8 +8,10 @@ /* * In parisc assembly a semicolon marks a comment while a - * exclamation mark is used to seperate independend lines. + * exclamation mark is used to seperate independent lines. */ +#ifdef __ASSEMBLY__ + #define ENTRY(name) \ .export name !\ ALIGN !\ @@ -24,5 +26,6 @@ name: END(name) #endif +#endif /* __ASSEMBLY__ */ #endif /* __ASM_PARISC_LINKAGE_H */ diff --git a/include/asm-parisc/processor.h b/include/asm-parisc/processor.h index d2f396721d3e..6b294fb07a23 100644 --- a/include/asm-parisc/processor.h +++ b/include/asm-parisc/processor.h @@ -69,8 +69,8 @@ struct system_cpuinfo_parisc { char sys_model_name[81]; /* PDC-ROM returnes this model name */ } pdc; - char *cpu_name; /* e.g. "PA7300LC (PCX-L2)" */ - char *family_name; /* e.g. "1.1e" */ + const char *cpu_name; /* e.g. "PA7300LC (PCX-L2)" */ + const char *family_name; /* e.g. "1.1e" */ }; @@ -334,8 +334,8 @@ extern unsigned long get_wchan(struct task_struct *p); static inline int parisc_requires_coherency(void) { #ifdef CONFIG_PA8X00 - /* FIXME: also pa8900 - when we see one */ - return boot_cpu_data.cpu_type == mako; + return (boot_cpu_data.cpu_type == mako) || + (boot_cpu_data.cpu_type == mako2); #else return 0; #endif diff --git a/include/asm-parisc/unistd.h b/include/asm-parisc/unistd.h index 2f7c40861c91..f74099bdca3c 100644 --- a/include/asm-parisc/unistd.h +++ b/include/asm-parisc/unistd.h @@ -792,8 +792,19 @@ #define __NR_epoll_pwait (__NR_Linux + 297) #define __NR_statfs64 (__NR_Linux + 298) #define __NR_fstatfs64 (__NR_Linux + 299) +#define __NR_kexec_load (__NR_Linux + 300) +#define __NR_utimensat (__NR_Linux + 301) +#define __NR_signalfd (__NR_Linux + 302) +#define __NR_timerfd (__NR_Linux + 303) +#define __NR_eventfd (__NR_Linux + 304) + +#define __NR_Linux_syscalls (__NR_eventfd + 1) + + +#define __IGNORE_select /* newselect */ +#define __IGNORE_fadvise64 /* fadvise64_64 */ +#define __IGNORE_utimes /* utime */ -#define __NR_Linux_syscalls (__NR_fstatfs64 + 1) #define HPUX_GATEWAY_ADDR 0xC0000004 #define LINUX_GATEWAY_ADDR 0x100 diff --git a/include/asm-powerpc/pgtable-ppc32.h b/include/asm-powerpc/pgtable-ppc32.h index c863bdb2889c..7fb730c62f83 100644 --- a/include/asm-powerpc/pgtable-ppc32.h +++ b/include/asm-powerpc/pgtable-ppc32.h @@ -673,10 +673,14 @@ static inline void __ptep_set_access_flags(pte_t *ptep, pte_t entry, int dirty) } #define ptep_set_access_flags(__vma, __address, __ptep, __entry, __dirty) \ - do { \ - __ptep_set_access_flags(__ptep, __entry, __dirty); \ - flush_tlb_page_nohash(__vma, __address); \ - } while(0) +({ \ + int __changed = !pte_same(*(__ptep), __entry); \ + if (__changed) { \ + __ptep_set_access_flags(__ptep, __entry, __dirty); \ + flush_tlb_page_nohash(__vma, __address); \ + } \ + __changed; \ +}) /* * Macro to mark a page protection value as "uncacheable". diff --git a/include/asm-powerpc/pgtable-ppc64.h b/include/asm-powerpc/pgtable-ppc64.h index 704c4e669fe0..3cfd98f44bfe 100644 --- a/include/asm-powerpc/pgtable-ppc64.h +++ b/include/asm-powerpc/pgtable-ppc64.h @@ -413,10 +413,14 @@ static inline void __ptep_set_access_flags(pte_t *ptep, pte_t entry, int dirty) :"cc"); } #define ptep_set_access_flags(__vma, __address, __ptep, __entry, __dirty) \ - do { \ - __ptep_set_access_flags(__ptep, __entry, __dirty); \ - flush_tlb_page_nohash(__vma, __address); \ - } while(0) +({ \ + int __changed = !pte_same(*(__ptep), __entry); \ + if (__changed) { \ + __ptep_set_access_flags(__ptep, __entry, __dirty); \ + flush_tlb_page_nohash(__vma, __address); \ + } \ + __changed; \ +}) /* * Macro to mark a page protection value as "uncacheable". diff --git a/include/asm-ppc/pgtable.h b/include/asm-ppc/pgtable.h index bed452d4a5f0..9d0ce9ff5840 100644 --- a/include/asm-ppc/pgtable.h +++ b/include/asm-ppc/pgtable.h @@ -694,10 +694,14 @@ static inline void __ptep_set_access_flags(pte_t *ptep, pte_t entry, int dirty) } #define ptep_set_access_flags(__vma, __address, __ptep, __entry, __dirty) \ - do { \ - __ptep_set_access_flags(__ptep, __entry, __dirty); \ - flush_tlb_page_nohash(__vma, __address); \ - } while(0) +({ \ + int __changed = !pte_same(*(__ptep), __entry); \ + if (__changed) { \ + __ptep_set_access_flags(__ptep, __entry, __dirty); \ + flush_tlb_page_nohash(__vma, __address); \ + } \ + __changed; \ +}) /* * Macro to mark a page protection value as "uncacheable". diff --git a/include/asm-s390/pgtable.h b/include/asm-s390/pgtable.h index 8fe8d42e64c3..0a307bb2f353 100644 --- a/include/asm-s390/pgtable.h +++ b/include/asm-s390/pgtable.h @@ -744,7 +744,12 @@ ptep_establish(struct vm_area_struct *vma, } #define ptep_set_access_flags(__vma, __address, __ptep, __entry, __dirty) \ - ptep_establish(__vma, __address, __ptep, __entry) +({ \ + int __changed = !pte_same(*(__ptep), __entry); \ + if (__changed) \ + ptep_establish(__vma, __address, __ptep, __entry); \ + __changed; \ +}) /* * Test and clear dirty bit in storage key. diff --git a/include/asm-s390/processor.h b/include/asm-s390/processor.h index e0fcea8c64c3..5cb480af65d5 100644 --- a/include/asm-s390/processor.h +++ b/include/asm-s390/processor.h @@ -216,6 +216,11 @@ static inline void cpu_relax(void) barrier(); } +static inline void psw_set_key(unsigned int key) +{ + asm volatile("spka 0(%0)" : : "d" (key)); +} + /* * Set PSW to specified value. */ diff --git a/include/asm-s390/ptrace.h b/include/asm-s390/ptrace.h index fa6ca87080e8..332ee73688fc 100644 --- a/include/asm-s390/ptrace.h +++ b/include/asm-s390/ptrace.h @@ -470,14 +470,7 @@ struct user_regs_struct #define regs_return_value(regs)((regs)->gprs[2]) #define profile_pc(regs) instruction_pointer(regs) extern void show_regs(struct pt_regs * regs); -#endif - -static inline void -psw_set_key(unsigned int key) -{ - asm volatile("spka 0(%0)" : : "d" (key)); -} - +#endif /* __KERNEL__ */ #endif /* __ASSEMBLY__ */ #endif /* _S390_PTRACE_H */ diff --git a/include/asm-sparc/pgtable.h b/include/asm-sparc/pgtable.h index 4f0a5ba0d6a0..59229aeba27b 100644 --- a/include/asm-sparc/pgtable.h +++ b/include/asm-sparc/pgtable.h @@ -446,6 +446,17 @@ extern int io_remap_pfn_range(struct vm_area_struct *vma, #define GET_IOSPACE(pfn) (pfn >> (BITS_PER_LONG - 4)) #define GET_PFN(pfn) (pfn & 0x0fffffffUL) +#define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS +#define ptep_set_access_flags(__vma, __address, __ptep, __entry, __dirty) \ +({ \ + int __changed = !pte_same(*(__ptep), __entry); \ + if (__changed) { \ + set_pte_at((__vma)->vm_mm, (__address), __ptep, __entry); \ + flush_tlb_page(__vma, __address); \ + } \ + (sparc_cpu_model == sun4c) || __changed; \ +}) + #include <asm-generic/pgtable.h> #endif /* !(__ASSEMBLY__) */ diff --git a/include/asm-sparc64/dma-mapping.h b/include/asm-sparc64/dma-mapping.h index 4e21c2f3065c..c58ec1661df8 100644 --- a/include/asm-sparc64/dma-mapping.h +++ b/include/asm-sparc64/dma-mapping.h @@ -15,8 +15,7 @@ static inline int dma_supported(struct device *dev, u64 mask) { - BUG_ON(dev->bus != &pci_bus_type && - dev->bus != &ebus_bus_type); + BUG_ON(dev->bus != &pci_bus_type); return pci_dma_supported(to_pci_dev(dev), mask); } @@ -24,8 +23,7 @@ dma_supported(struct device *dev, u64 mask) static inline int dma_set_mask(struct device *dev, u64 dma_mask) { - BUG_ON(dev->bus != &pci_bus_type && - dev->bus != &ebus_bus_type); + BUG_ON(dev->bus != &pci_bus_type); return pci_set_dma_mask(to_pci_dev(dev), dma_mask); } @@ -34,8 +32,7 @@ static inline void * dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle, gfp_t flag) { - BUG_ON(dev->bus != &pci_bus_type && - dev->bus != &ebus_bus_type); + BUG_ON(dev->bus != &pci_bus_type); return pci_iommu_ops->alloc_consistent(to_pci_dev(dev), size, dma_handle, flag); } @@ -44,8 +41,7 @@ static inline void dma_free_coherent(struct device *dev, size_t size, void *cpu_addr, dma_addr_t dma_handle) { - BUG_ON(dev->bus != &pci_bus_type && - dev->bus != &ebus_bus_type); + BUG_ON(dev->bus != &pci_bus_type); pci_free_consistent(to_pci_dev(dev), size, cpu_addr, dma_handle); } @@ -54,8 +50,7 @@ static inline dma_addr_t dma_map_single(struct device *dev, void *cpu_addr, size_t size, enum dma_data_direction direction) { - BUG_ON(dev->bus != &pci_bus_type && - dev->bus != &ebus_bus_type); + BUG_ON(dev->bus != &pci_bus_type); return pci_map_single(to_pci_dev(dev), cpu_addr, size, (int)direction); } @@ -64,8 +59,7 @@ static inline void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size, enum dma_data_direction direction) { - BUG_ON(dev->bus != &pci_bus_type && - dev->bus != &ebus_bus_type); + BUG_ON(dev->bus != &pci_bus_type); pci_unmap_single(to_pci_dev(dev), dma_addr, size, (int)direction); } @@ -75,8 +69,7 @@ dma_map_page(struct device *dev, struct page *page, unsigned long offset, size_t size, enum dma_data_direction direction) { - BUG_ON(dev->bus != &pci_bus_type && - dev->bus != &ebus_bus_type); + BUG_ON(dev->bus != &pci_bus_type); return pci_map_page(to_pci_dev(dev), page, offset, size, (int)direction); } @@ -85,8 +78,7 @@ static inline void dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size, enum dma_data_direction direction) { - BUG_ON(dev->bus != &pci_bus_type && - dev->bus != &ebus_bus_type); + BUG_ON(dev->bus != &pci_bus_type); pci_unmap_page(to_pci_dev(dev), dma_address, size, (int)direction); } @@ -95,8 +87,7 @@ static inline int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents, enum dma_data_direction direction) { - BUG_ON(dev->bus != &pci_bus_type && - dev->bus != &ebus_bus_type); + BUG_ON(dev->bus != &pci_bus_type); return pci_map_sg(to_pci_dev(dev), sg, nents, (int)direction); } @@ -105,8 +96,7 @@ static inline void dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries, enum dma_data_direction direction) { - BUG_ON(dev->bus != &pci_bus_type && - dev->bus != &ebus_bus_type); + BUG_ON(dev->bus != &pci_bus_type); pci_unmap_sg(to_pci_dev(dev), sg, nhwentries, (int)direction); } @@ -115,8 +105,7 @@ static inline void dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle, size_t size, enum dma_data_direction direction) { - BUG_ON(dev->bus != &pci_bus_type && - dev->bus != &ebus_bus_type); + BUG_ON(dev->bus != &pci_bus_type); pci_dma_sync_single_for_cpu(to_pci_dev(dev), dma_handle, size, (int)direction); @@ -126,8 +115,7 @@ static inline void dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle, size_t size, enum dma_data_direction direction) { - BUG_ON(dev->bus != &pci_bus_type && - dev->bus != &ebus_bus_type); + BUG_ON(dev->bus != &pci_bus_type); pci_dma_sync_single_for_device(to_pci_dev(dev), dma_handle, size, (int)direction); @@ -137,8 +125,7 @@ static inline void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems, enum dma_data_direction direction) { - BUG_ON(dev->bus != &pci_bus_type && - dev->bus != &ebus_bus_type); + BUG_ON(dev->bus != &pci_bus_type); pci_dma_sync_sg_for_cpu(to_pci_dev(dev), sg, nelems, (int)direction); } @@ -147,8 +134,7 @@ static inline void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nelems, enum dma_data_direction direction) { - BUG_ON(dev->bus != &pci_bus_type && - dev->bus != &ebus_bus_type); + BUG_ON(dev->bus != &pci_bus_type); pci_dma_sync_sg_for_device(to_pci_dev(dev), sg, nelems, (int)direction); } diff --git a/include/asm-sparc64/hypervisor.h b/include/asm-sparc64/hypervisor.h index 5c2f9d4b9f06..db2130a95d68 100644 --- a/include/asm-sparc64/hypervisor.h +++ b/include/asm-sparc64/hypervisor.h @@ -2615,8 +2615,9 @@ struct ldc_mtable_entry { /* ldc_revoke() * TRAP: HV_FAST_TRAP * FUNCTION: HV_FAST_LDC_REVOKE - * ARG0: cookie - * ARG1: ldc_mtable_entry cookie + * ARG0: channel ID + * ARG1: cookie + * ARG2: ldc_mtable_entry cookie * RET0: status */ #define HV_FAST_LDC_REVOKE 0xef @@ -2663,7 +2664,8 @@ extern unsigned long sun4v_ldc_mapin(unsigned long channel, unsigned long *ra, unsigned long *perm); extern unsigned long sun4v_ldc_unmap(unsigned long ra); -extern unsigned long sun4v_ldc_revoke(unsigned long cookie, +extern unsigned long sun4v_ldc_revoke(unsigned long channel, + unsigned long cookie, unsigned long mte_cookie); #endif diff --git a/include/asm-sparc64/irq.h b/include/asm-sparc64/irq.h index 5d233b42fe13..90781e34a95c 100644 --- a/include/asm-sparc64/irq.h +++ b/include/asm-sparc64/irq.h @@ -46,6 +46,7 @@ extern void irq_install_pre_handler(int virt_irq, #define irq_canonicalize(irq) (irq) extern unsigned int build_irq(int inofixup, unsigned long iclr, unsigned long imap); extern unsigned int sun4v_build_irq(u32 devhandle, unsigned int devino); +extern unsigned int sun4v_build_virq(u32 devhandle, unsigned int devino); extern unsigned int sun4v_build_msi(u32 devhandle, unsigned int *virt_irq_p, unsigned int msi_devino_start, unsigned int msi_devino_end); diff --git a/include/asm-sparc64/parport.h b/include/asm-sparc64/parport.h index 6340a5253a34..23cc63f049a8 100644 --- a/include/asm-sparc64/parport.h +++ b/include/asm-sparc64/parport.h @@ -145,7 +145,7 @@ static int parport_isa_probe(int count) */ if (parport_pc_probe_port(base, base + 0x400, child->irq, PARPORT_DMA_NOFIFO, - child->bus->self)) + &child->bus->self->dev)) count++; } } @@ -199,7 +199,8 @@ static int parport_pc_find_nonpci_ports (int autoirq, int autodma) if (parport_pc_probe_port(base, base + 0x400, edev->irqs[0], - count, ebus->self)) + count, + &ebus->self->dev)) count++; } } diff --git a/include/asm-um/a.out.h b/include/asm-um/a.out.h index 50cee7b296f4..7016b893ac9d 100644 --- a/include/asm-um/a.out.h +++ b/include/asm-um/a.out.h @@ -5,6 +5,7 @@ #include "choose-mode.h" #undef STACK_TOP +#undef STACK_TOP_MAX extern unsigned long stacksizelim; diff --git a/include/asm-x86_64/pgtable.h b/include/asm-x86_64/pgtable.h index 08b9831f2e14..0a71e0b9a619 100644 --- a/include/asm-x86_64/pgtable.h +++ b/include/asm-x86_64/pgtable.h @@ -395,12 +395,14 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) * bit at the same time. */ #define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS #define ptep_set_access_flags(__vma, __address, __ptep, __entry, __dirty) \ - do { \ - if (__dirty) { \ - set_pte(__ptep, __entry); \ - flush_tlb_page(__vma, __address); \ - } \ - } while (0) +({ \ + int __changed = !pte_same(*(__ptep), __entry); \ + if (__changed && __dirty) { \ + set_pte(__ptep, __entry); \ + flush_tlb_page(__vma, __address); \ + } \ + __changed; \ +}) /* Encode and de-code a swap entry */ #define __swp_type(x) (((x).val >> 1) & 0x3f) diff --git a/include/asm-x86_64/unistd.h b/include/asm-x86_64/unistd.h index ae1ed05f2814..8696f8ad401e 100644 --- a/include/asm-x86_64/unistd.h +++ b/include/asm-x86_64/unistd.h @@ -626,9 +626,9 @@ __SYSCALL(__NR_utimensat, sys_utimensat) __SYSCALL(__NR_epoll_pwait, sys_epoll_pwait) #define __NR_signalfd 282 __SYSCALL(__NR_signalfd, sys_signalfd) -#define __NR_timerfd 282 +#define __NR_timerfd 283 __SYSCALL(__NR_timerfd, sys_timerfd) -#define __NR_eventfd 283 +#define __NR_eventfd 284 __SYSCALL(__NR_eventfd, sys_eventfd) #ifndef __NO_STUBS diff --git a/include/linux/futex.h b/include/linux/futex.h index 899fc7f20edd..99650353adfa 100644 --- a/include/linux/futex.h +++ b/include/linux/futex.h @@ -17,7 +17,6 @@ union ktime; #define FUTEX_LOCK_PI 6 #define FUTEX_UNLOCK_PI 7 #define FUTEX_TRYLOCK_PI 8 -#define FUTEX_CMP_REQUEUE_PI 9 #define FUTEX_PRIVATE_FLAG 128 #define FUTEX_CMD_MASK ~FUTEX_PRIVATE_FLAG @@ -98,14 +97,9 @@ struct robust_list_head { #define FUTEX_OWNER_DIED 0x40000000 /* - * Some processes have been requeued on this PI-futex - */ -#define FUTEX_WAITER_REQUEUED 0x20000000 - -/* * The rest of the robust-futex field is for the TID: */ -#define FUTEX_TID_MASK 0x0fffffff +#define FUTEX_TID_MASK 0x3fffffff /* * This limit protects against a deliberately circular list. @@ -139,7 +133,6 @@ handle_futex_death(u32 __user *uaddr, struct task_struct *curr, int pi); #define FUT_OFF_MMSHARED 2 /* We set bit 1 if key has a reference on mm */ union futex_key { - u32 __user *uaddr; struct { unsigned long pgoff; struct inode *inode; diff --git a/include/linux/hugetlb.h b/include/linux/hugetlb.h index b4570b62ab85..2c13715e9dde 100644 --- a/include/linux/hugetlb.h +++ b/include/linux/hugetlb.h @@ -163,7 +163,7 @@ static inline struct hugetlbfs_sb_info *HUGETLBFS_SB(struct super_block *sb) extern const struct file_operations hugetlbfs_file_operations; extern struct vm_operations_struct hugetlb_vm_ops; -struct file *hugetlb_zero_setup(size_t); +struct file *hugetlb_file_setup(const char *name, size_t); int hugetlb_get_quota(struct address_space *mapping); void hugetlb_put_quota(struct address_space *mapping); @@ -185,7 +185,7 @@ static inline void set_file_hugepages(struct file *file) #define is_file_hugepages(file) 0 #define set_file_hugepages(file) BUG() -#define hugetlb_zero_setup(size) ERR_PTR(-ENOSYS) +#define hugetlb_file_setup(name,size) ERR_PTR(-ENOSYS) #endif /* !CONFIG_HUGETLBFS */ diff --git a/include/linux/ktime.h b/include/linux/ktime.h index c762954bda14..2b139f66027f 100644 --- a/include/linux/ktime.h +++ b/include/linux/ktime.h @@ -261,6 +261,18 @@ static inline s64 ktime_to_ns(const ktime_t kt) #endif +/** + * ktime_equal - Compares two ktime_t variables to see if they are equal + * @cmp1: comparable1 + * @cmp2: comparable2 + * + * Compare two ktime_t variables, returns 1 if equal + */ +static inline int ktime_equal(const ktime_t cmp1, const ktime_t cmp2) +{ + return cmp1.tv64 == cmp2.tv64; +} + static inline s64 ktime_to_us(const ktime_t kt) { struct timeval tv = ktime_to_timeval(kt); diff --git a/include/linux/skbuff.h b/include/linux/skbuff.h index e7367c74e1bb..6f0b2f7d0010 100644 --- a/include/linux/skbuff.h +++ b/include/linux/skbuff.h @@ -1579,6 +1579,10 @@ static inline ktime_t net_timedelta(ktime_t t) return ktime_sub(ktime_get_real(), t); } +static inline ktime_t net_invalid_timestamp(void) +{ + return ktime_set(0, 0); +} extern __sum16 __skb_checksum_complete_head(struct sk_buff *skb, int len); extern __sum16 __skb_checksum_complete(struct sk_buff *skb); diff --git a/include/linux/slub_def.h b/include/linux/slub_def.h index a0ad37463d62..6207a3d8da71 100644 --- a/include/linux/slub_def.h +++ b/include/linux/slub_def.h @@ -28,7 +28,7 @@ struct kmem_cache { int size; /* The size of an object including meta data */ int objsize; /* The size of an object without meta data */ int offset; /* Free pointer offset. */ - unsigned int order; + int order; /* * Avoid an extra cache line for UP, SMP and for the node local to @@ -56,7 +56,13 @@ struct kmem_cache { /* * Kmalloc subsystem. */ -#define KMALLOC_SHIFT_LOW 3 +#if defined(ARCH_KMALLOC_MINALIGN) && ARCH_KMALLOC_MINALIGN > 8 +#define KMALLOC_MIN_SIZE ARCH_KMALLOC_MINALIGN +#else +#define KMALLOC_MIN_SIZE 8 +#endif + +#define KMALLOC_SHIFT_LOW ilog2(KMALLOC_MIN_SIZE) /* * We keep the general caches in an array of slab caches that are used for @@ -76,6 +82,9 @@ static inline int kmalloc_index(size_t size) if (size > KMALLOC_MAX_SIZE) return -1; + if (size <= KMALLOC_MIN_SIZE) + return KMALLOC_SHIFT_LOW; + if (size > 64 && size <= 96) return 1; if (size > 128 && size <= 192) diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h index b6bedc3ee95c..1be5ea059477 100644 --- a/include/linux/spi/spi.h +++ b/include/linux/spi/spi.h @@ -341,9 +341,14 @@ extern struct spi_master *spi_busnum_to_master(u16 busnum); * chip transactions together. * * (ii) When the transfer is the last one in the message, the chip may - * stay selected until the next transfer. This is purely a performance - * hint; the controller driver may need to select a different device - * for the next message. + * stay selected until the next transfer. On multi-device SPI busses + * with nothing blocking messages going to other devices, this is just + * a performance hint; starting a message to another device deselects + * this one. But in other cases, this can be used to ensure correctness. + * Some devices need protocol transactions to be built from a series of + * spi_message submissions, where the content of one message is determined + * by the results of previous messages and where the whole transaction + * ends when the chipselect goes intactive. * * The code that submits an spi_message (and its spi_transfers) * to the lower layers is responsible for managing its memory. @@ -480,14 +485,15 @@ static inline void spi_message_free(struct spi_message *m) /** * spi_setup - setup SPI mode and clock rate * @spi: the device whose settings are being modified - * Context: can sleep + * Context: can sleep, and no requests are queued to the device * * SPI protocol drivers may need to update the transfer mode if the - * device doesn't work with the mode 0 default. They may likewise need + * device doesn't work with its default. They may likewise need * to update clock rates or word sizes from initial values. This function * changes those settings, and must be called from a context that can sleep. - * The changes take effect the next time the device is selected and data - * is transferred to or from it. + * Except for SPI_CS_HIGH, which takes effect immediately, the changes take + * effect the next time the device is selected and data is transferred to + * or from it. When this function returns, the spi device is deselected. * * Note that this call will fail if the protocol driver specifies an option * that the underlying controller or its driver does not support. For diff --git a/include/net/irda/irlap.h b/include/net/irda/irlap.h index f0248fb8e196..a3d370efb903 100644 --- a/include/net/irda/irlap.h +++ b/include/net/irda/irlap.h @@ -289,4 +289,21 @@ static inline void irlap_clear_disconnect(struct irlap_cb *self) self->disconnect_pending = FALSE; } +/* + * Function irlap_next_state (self, state) + * + * Switches state and provides debug information + * + */ +static inline void irlap_next_state(struct irlap_cb *self, IRLAP_STATE state) +{ + /* + if (!self || self->magic != LAP_MAGIC) + return; + + IRDA_DEBUG(4, "next LAP state = %s\n", irlap_state[state]); + */ + self->state = state; +} + #endif diff --git a/include/net/sctp/sctp.h b/include/net/sctp/sctp.h index dda72bf5b9b4..16baef4dab7e 100644 --- a/include/net/sctp/sctp.h +++ b/include/net/sctp/sctp.h @@ -503,6 +503,13 @@ static inline int sctp_frag_point(const struct sctp_sock *sp, int pmtu) return frag; } +static inline void sctp_assoc_pending_pmtu(struct sctp_association *asoc) +{ + + sctp_assoc_sync_pmtu(asoc); + asoc->pmtu_pending = 0; +} + /* Walk through a list of TLV parameters. Don't trust the * individual parameter lengths and instead depend on * the chunk length to indicate when to stop. Make sure diff --git a/include/net/sctp/structs.h b/include/net/sctp/structs.h index 5e81984b8478..ee4559b11302 100644 --- a/include/net/sctp/structs.h +++ b/include/net/sctp/structs.h @@ -912,6 +912,9 @@ struct sctp_transport { */ __u16 pathmaxrxt; + /* is the Path MTU update pending on this tranport */ + __u8 pmtu_pending; + /* PMTU : The current known path MTU. */ __u32 pathmtu; @@ -1006,6 +1009,7 @@ void sctp_transport_raise_cwnd(struct sctp_transport *, __u32, __u32); void sctp_transport_lower_cwnd(struct sctp_transport *, sctp_lower_cwnd_t); unsigned long sctp_transport_timeout(struct sctp_transport *); void sctp_transport_reset(struct sctp_transport *); +void sctp_transport_update_pmtu(struct sctp_transport *, u32); /* This is the structure we use to queue packets as they come into @@ -1565,6 +1569,9 @@ struct sctp_association { */ __u16 pathmaxrxt; + /* Flag that path mtu update is pending */ + __u8 pmtu_pending; + /* Association : The smallest PMTU discovered for all of the * PMTU : peer's transport addresses. */ |