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-rw-r--r--tools/perf/pmu-events/arch/powerpc/power9/floating-point.json32
1 files changed, 32 insertions, 0 deletions
diff --git a/tools/perf/pmu-events/arch/powerpc/power9/floating-point.json b/tools/perf/pmu-events/arch/powerpc/power9/floating-point.json
new file mode 100644
index 000000000000..8a83bca26552
--- /dev/null
+++ b/tools/perf/pmu-events/arch/powerpc/power9/floating-point.json
@@ -0,0 +1,32 @@
+[
+ {,
+ "EventCode": "0x1415A",
+ "EventName": "PM_MRK_DATA_FROM_L2_DISP_CONFLICT_LDHITST_CYC",
+ "BriefDescription": "Duration in cycles to reload from local core's L2 with load hit store conflict due to a marked load"
+ },
+ {,
+ "EventCode": "0x10058",
+ "EventName": "PM_MEM_LOC_THRESH_IFU",
+ "BriefDescription": "Local Memory above threshold for IFU speculation control"
+ },
+ {,
+ "EventCode": "0x2D028",
+ "EventName": "PM_RADIX_PWC_L2_PDE_FROM_L2",
+ "BriefDescription": "A Page Directory Entry was reloaded to a level 2 page walk cache from the core's L2 data cache"
+ },
+ {,
+ "EventCode": "0x30012",
+ "EventName": "PM_FLUSH_COMPLETION",
+ "BriefDescription": "The instruction that was next to complete did not complete because it suffered a flush"
+ },
+ {,
+ "EventCode": "0x2D154",
+ "EventName": "PM_MRK_DERAT_MISS_64K",
+ "BriefDescription": "Marked Data ERAT Miss (Data TLB Access) page size 64K"
+ },
+ {,
+ "EventCode": "0x4016E",
+ "EventName": "PM_THRESH_NOT_MET",
+ "BriefDescription": "Threshold counter did not meet threshold"
+ }
+] \ No newline at end of file