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* MN10300: Make various interrupt priority settings configurableAkira Takeuchi2010-10-272-6/+76
* MN10300: Optimise do_csum()Akira Takeuchi2010-10-271-27/+22Star
* MN10300: Implement atomic ops using atomic ops unitMark Salter2010-10-272-47/+351
* MN10300: Make the FPU operate in non-lazy mode under SMPAkira Takeuchi2010-10-2714-248/+440
* MN10300: SMP TLB flushingAkira Takeuchi2010-10-274-29/+290
* MN10300: Use the [ID]PTEL2 registers rather than [ID]PTEL for TLB controlAkira Takeuchi2010-10-273-47/+65
* MN10300: Make the use of PIDR to mark TLB entries controllableAkira Takeuchi2010-10-274-62/+84
* MN10300: Rename __flush_tlb*() to local_flush_tlb*()David Howells2010-10-276-28/+42
* MN10300: AM34 erratum requires MMUCTR read and write on exception entryAkira Takeuchi2010-10-273-6/+37
* MN10300: Make the boot wrapper able to use writeback cachingAkira Takeuchi2010-10-271-1/+48
* MN10300: Cache: Implement SMP global cache flushingAkira Takeuchi2010-10-279-15/+535
* MN10300: Allow some cacheflushes to be avoided if cache snooping is availableDavid Howells2010-10-279-96/+309
* MN10300: AM34: Add cacheflushing by using the AM34 purge registersAkira Takeuchi2010-10-274-1/+678
* MN10300: SMP: Differentiate local cache flushingAkira Takeuchi2010-10-274-112/+289
* MN10300: Cacheflush functions should take unsigned long addressesAkira Takeuchi2010-10-272-15/+15
* MN10300: AM34: The current cacheflush routines operate by controlling tag regsDavid Howells2010-10-274-2/+23
* MN10300: Reorder asm/cacheflush.h to put primitives firstDavid Howells2010-10-271-44/+44
* MN10300: Provide a MN10300_CACHE_ENABLED config optionDavid Howells2010-10-276-10/+13
* MN10300: Cache: Split cache bits out of arch KconfigDavid Howells2010-10-272-28/+33
* MN10300: Remove monitor/JTAG functionsAkira Takeuchi2010-10-274-55/+2Star
* MN10300: Add CPU register bits for AM34Akira Takeuchi2010-10-272-5/+74
* MN10300: Don't hard code the cacheline size in register defsAkira Takeuchi2010-10-271-5/+9
* MN10300: Move DMA engine control reg defs to MN103E010 processor directoryAkira Takeuchi2010-10-272-86/+103
* MN10300: Differentiate AM33_2 and AM33_3 in configAkira Takeuchi2010-10-271-2/+9
* MN10300: Provide the functions to fully disable maskable interruptsAkira Takeuchi2010-10-271-0/+77
* MN10300: Add reads[bwl]() and writes[bwl]()Akira Takeuchi2010-10-271-0/+13
* MN10300: Don't cast away the volatile in test_bit()Akira Takeuchi2010-10-271-1/+1
* Typedef SMP call function pointerDavid Howells2010-10-272-13/+14
* MN10300: Prevent cnt32_to_63() from being preempted in sched_clock()David Howells2010-10-271-0/+5
* mn10300: Use pci_claim_resourceDavid Howells2010-10-271-10/+6Star
* bitops: Change the bitmap index from int to unsigned long [mn10300]Justin Chen2010-10-272-8/+8
* MN10300: BUG to BUG_ON changesStoyan Gaydarov2010-10-275-10/+5Star
* Partially revert patch that encloses asm-offset.h numbers in bracketsDavid Howells2010-10-271-1/+1
* fix braino in fs: do not assign default i_ino in new_inodeAl Viro2010-10-271-1/+1
* Merge branch 'drm-core-next' of git://git.kernel.org/pub/scm/linux/kernel/git...Linus Torvalds2010-10-27212-11671/+18747
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| * vmwgfx: Implement a proper GMR eviction mechanismThomas Hellstrom2010-10-279-160/+252
| * drm/radeon/kms: fix r6xx/7xx 1D tiling CS checker v2Alex Deucher2010-10-271-0/+3
| * drm/radeon/kms: properly compute group_size on 6xx/7xxAlex Deucher2010-10-262-6/+10
| * drm/radeon/kms: fix 2D tile height alignment in the r600 CS checkerAlex Deucher2010-10-261-2/+2
| * drm/radeon/kms/evergreen: set the clear state to the blit stateAlex Deucher2010-10-264-54/+65
| * drm/radeon/kms: don't poll dac load detect.Dave Airlie2010-10-261-0/+10
| * gpu: Add Intel GMA500(Poulsbo) Stub DriverLee, Chun-Yi2010-10-265-1/+81
| * drm/radeon/kms: MC vram map needs to be >= pci aperture sizeAlex Deucher2010-10-261-0/+3
| * drm/radeon/kms: implement display watermark support for evergreenAlex Deucher2010-10-262-1/+449
| * drm/radeon/kms/evergreen: add some additional safe regs v2Alex Deucher2010-10-262-1/+9
| * drm/radeon/r600: fix tiling issues in CS checker.Dave Airlie2010-10-262-10/+22
| * Merge remote branch 'intel/drm-intel-next' of ../drm-next into drm-core-nextDave Airlie2010-10-2629-1366/+1979
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| | * drm/i915: Move gpu_write_list to per-ringChris Wilson2010-10-244-26/+29
| | * drm/i915: Invalidate the to-ring, flush the old-ring when updating domainsChris Wilson2010-10-231-3/+6
| | * drm/i915/ringbuffer: Write the value passed in to the tail registerChris Wilson2010-10-222-16/+16
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