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* sh: make pmb iomapping configurable.Paul Mundt2010-03-021-0/+17
| | | | | | | | This plugs in an early_param for permitting transparent PMB-backed ioremapping to be enabled/disabled. For the time being, we use a default-disabled policy. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: reworked dynamic PMB mapping.Paul Mundt2010-03-025-168/+223
| | | | | | | | | This implements a fairly significant overhaul of the dynamic PMB mapping code. The primary change here is that the PMB gets its own VMA that follows the uncached mapping and we attempt to be a bit more intelligent with dynamic sizing, multi-entry mapping, and so forth. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Fix up cpumask_of_pcibus() for the NUMA build.Paul Mundt2010-03-021-1/+1
| | | | | | Trivial build fix, following the change from asm-generic/topology.h. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* serial: sh-sci: Tidy up build warnings.Paul Mundt2010-03-021-3/+1Star
| | | | | | | The recent sh-sci DMA support introduces a number of trivial build warnings, clean them up. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Fix up ctrl_read/write stragglers in migor setup.Paul Mundt2010-03-021-1/+1
| | | | | | | ctrl_read/writeX are deprecated, this converts them over to their __raw_read/write() counterparts. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
*-. Merge branches 'sh/dmaengine', 'sh/hw-breakpoints' and 'sh/trivial'Paul Mundt2010-03-024-28/+8Star
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| | * sh: No need to explicitly include <linux/rwlock.h>.Robert P. J. Day2010-03-011-1/+0Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | Since <linux/spinlock.h> already includes <linux/rwlock.h>, and the latter file will warn about not having included the former file anyway, there is no value in including rwlock.h explicitly. Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| | * arch/sh/boot/compressed/cache.c: Checkpatch cleanupAndrea Gelmini2010-03-011-1/+1
| | | | | | | | | | | | | | | | | | | | | arch/sh/boot/compressed/cache.c:8: WARNING: space prohibited between function name and open parenthesis '(' Signed-off-by: Andrea Gelmini <andrea.gelmini@gelma.net> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| | * arch/sh/lib/libgcc.h: Checkpatch cleanupAndrea Gelmini2010-03-011-2/+1Star
| | | | | | | | | | | | | | | | | | | | | arch/sh/lib/libgcc.h:21: ERROR: open brace '{' following union go on the same line Signed-off-by: Andrea Gelmini <andrea.gelmini@gelma.net> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * | sh: hw-breakpoints: Accept breakpoints on NULL addresses.Paul Mundt2010-03-011-24/+6Star
| |/ | | | | | | | | | | | | | | This follows the x86 change 84d710926797a6e317e7e94654a3ccd771cfd8a3 ("hw-breakpoints: Accept breakpoints on NULL address") and restores the previous expected ptrace behaviour. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | serial: sh-sci: Add DMA support.Guennadi Liakhovetski2010-03-023-46/+582
| | | | | | | | | | | | | | | | Support using DMA for sending and receiving data over SCI(F) interfaces of various SH SoCs. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | dmaengine: shdma: extend .device_terminate_all() to record partial transferGuennadi Liakhovetski2010-03-023-16/+36
| | | | | | | | | | | | | | | | This patch extends the .device_terminate_all() method of the shdma driver to return number of bytes transfered in the current descriptor. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | sh: merge sh7722 and sh7724 DMA register definitionsGuennadi Liakhovetski2010-03-021-6/+2Star
| | | | | | | | | | | | | | DMA CHCR register layout is equal on sh7722 and sh7724, reuse definitions. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | sh: activate runtime PM for dmaengine on sh7722 and sh7724Guennadi Liakhovetski2010-03-022-0/+9
| | | | | | | | | | Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | dmaengine: shdma: add runtime PM support.Guennadi Liakhovetski2010-03-021-0/+20
| | | | | | | | | | | | | | | | Provided platforms implement runtime PM, this disables the controller, when not in use. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | dmaengine: shdma: separate DMA headers.Guennadi Liakhovetski2010-03-0217-258/+415
| | | | | | | | | | | | | | | | | | | | Separate SH DMA headers into ones, commonly used by both drivers, and ones, specific to each of them. This will make the future development of the dmaengine driver easier. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | dmaengine: shdma: convert to platform device resourcesGuennadi Liakhovetski2010-03-027-156/+636
| | | | | | | | | | | | | | | | | | | | | | The shdma dmaengine driver currently uses numerous macros to support various platforms, selected by ifdef's. Convert it to use platform device resources and lists of channel descriptors to specify register locations, interrupt numbers and other system-specific configuration variants. Unavoidably, we have to simultaneously convert all shdma users to provide those resources. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | dmaengine: shdma: fix DMA error handling.Guennadi Liakhovetski2010-03-021-36/+53
| | | | | | | | | | | | | | | | | | | | | | Present DMA error ISR in shdma.c is bogus, it locks the system hard in multiple ways. Fix it to abort all queued transactions on all channels on the affected controller and giving submitters a chance to get a DMA_ERROR status for aborted transactions. Afterwards further functionality is again possible without the need to re-load the driver. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | sh: audio support for the sh7722 Migo-R boardGuennadi Liakhovetski2010-03-022-0/+17
| | | | | | | | | | | | | | Configure SIU port B pins and register the WM8978 audio codec. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | sh: add DMA slave definitions and SIU platform data to sh7722 setupGuennadi Liakhovetski2010-03-021-6/+97
| | | | | | | | | | | | | | This patch is required to use the SIU ASoC driver on sh7722 systems. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | Merge branch 'davinci-for-linus' of ↵Linus Torvalds2010-03-0142-295/+1534
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-davinci * 'davinci-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-davinci: (40 commits) DaVinci DM365: Adding support for SPI EEPROM DaVinci DM365: Adding DM365 SPI support DaVinci DM355: Modifications to DM355 SPI support DaVinci: SPI: Adding header file for SPI support. davinci: dm646x: CDCE clocks: davinci_clk converted to clk_lookup davinci: clkdev cleanup: remove clk_lookup wrapper, use clkdev_add_table() DaVinci: DM365: Voice codec support for the DM365 SoC davinci: clock: let clk->set_rate function sleep Add SDA and SCL pin numbers to i2c platform data davinci: da8xx/omap-l1xx: Add EDMA platform data for da850/omap-l138 davinci: build list of unused EDMA events dynamically davinci: Fix edma_alloc_channel api for EDMA_CHANNEL_ANY case davinci: Keep count of channel controllers on a platform davinci: Correct return value of edma_alloc_channel api davinci: add CDCE949 support on DM6467 EVM davinci: add support for CDCE949 clock synthesizer davinci: da850/omap-l138 EVM: register for suspend support davinci: da850/omap-l138: add support for SoC suspend davinci: add power management support DaVinci: DM365: Changing default queue for DM365. ...
| * | DaVinci DM365: Adding support for SPI EEPROMSandeep Paulraj2010-03-011-0/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | The DM365 Spectrum Digital EVM comes with an EEPROM connected to SPI0. This patch adds support for the SPI EEPROM. Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | DaVinci DM365: Adding DM365 SPI supportSandeep Paulraj2010-03-012-0/+72
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds SPI init for DM365. It does the following 1) Initializes SPI0 2) Defines resources to be used by SPI0 3) Adds platform data for SPI0 Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | DaVinci DM355: Modifications to DM355 SPI supportSandeep Paulraj2010-03-011-11/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch does the following 1) Minor change to the SPI clocks making it similar to DM365. 2) Changing the interrupt used by SPI0 3) Adding EDMA resources that can be used by SPI0 4) Adding platform specific data. Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | DaVinci: SPI: Adding header file for SPI support.Sandeep Paulraj2010-03-011-0/+44
| | | | | | | | | | | | | | | | | | | | | | | | This patch adds "spi.h" header file that will be used by board and architecture specific code. Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | davinci: dm646x: CDCE clocks: davinci_clk converted to clk_lookupKevin Hilman2010-03-011-5/+5
| | | | | | | | | | | | | | | | | | | | | Remove unneeded 'struct davinci_clk' wrapper around 'struct clk_lookup' and use clk_lookup directly. Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | davinci: clkdev cleanup: remove clk_lookup wrapper, use clkdev_add_table()Kevin Hilman2010-02-049-29/+26Star
| | | | | | | | | | | | | | | | | | | | | Remove unneeded 'struct davinci_clk' wrapper around 'struct clk_lookup' and use clkdev_add_table() to add the list of clocks in one go. Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | DaVinci: DM365: Voice codec support for the DM365 SoCMiguel Aguilar2010-02-043-1/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the generic Voice Codec support for the DM365 based platforms. Signed-off-by: Miguel Aguilar <miguel.aguilar@ridgerun.com> Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | davinci: clock: let clk->set_rate function sleepSekhar Nori2010-02-042-4/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When supporting I2C/SPI based on-board PLLs like CDCE949, it is essential that clk->set_rate be able to sleep. Currently, this is not possible because clk->set_rate is called from within spin-lock in clk_set_rate This patch brings clk->set_rate outside of the spin-lock and lets the individual set_rate implementations achieve serialization through appropiate means. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | Add SDA and SCL pin numbers to i2c platform dataPhilby John2010-02-043-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Patch adds SDA and SCL pin numbers to the i2c platform data structure for Davinci DM355 and DM6446. This at present is used for i2c bus recovery. TODO: Add SDA and SCL pin number information to include all Davinci platforms such as dm355-leopard, dm365, dm646x, da8xx etc. Signed-off-by: Philby John <pjohn@in.mvista.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | davinci: da8xx/omap-l1xx: Add EDMA platform data for da850/omap-l138Sudhakar Rajashekhara2010-02-041-7/+114
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently da850/omap-l138 supports only one channel controller instance of EDMA though EDMA driver as such supports multiple channel controller instances. This patch adds platform data for the 2nd EDMA channel controller. As, the platform data differ between da830/omap-l137 and da850/omap-l138, existing code has been re-shuffled to accommodate this. Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | davinci: build list of unused EDMA events dynamicallySudhakar Rajashekhara2010-02-046-47/+43Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, the edma_noevent list is passed from platform data. But on some architectures, there will be many EDMA channels which will not be used at all. This patch scans all the platform devices and then builds a list of events which are not being used. The unused event list will be used to allocate EDMA channels in case of EDMA_CHANNEL_ANY usage instead of the edma_noevent being used earlier for this purpose. This patch is based on David Brownells's suggestion at http://article.gmane.org/gmane.linux.davinci/15176. Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | davinci: Fix edma_alloc_channel api for EDMA_CHANNEL_ANY caseSudhakar Rajashekhara2010-02-041-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Though edma_alloc_channel api was looping through the available channel controllers in EDMA_CHANNEL_ANY case, it was never returning the channel for 2nd channel controller, if 1st channel controller had no free channels. This issue has been fixed with this patch. Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | davinci: Keep count of channel controllers on a platformSudhakar Rajashekhara2010-02-041-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some architectures have only one channel controller, but the edma_alloc_channel api loops twice to findout the free channel available in EDMA_CHANNEL_ANY case. A new variable has been introduced to keep count of number of channel controllers being used on a particular architecture. Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | davinci: Correct return value of edma_alloc_channel apiSudhakar Rajashekhara2010-02-041-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, edma_alloc_channel api is returning the channel number without prepending the controller on which the channel was allocated. So, if a channel is allocated on 2nd controller, calls subsequent to edma_alloc_channel would never know that channel was allocated on the 2nd controller, and continue to operate on 1st controller, resulting in edma failure. This patch fixes this issue. Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | davinci: add CDCE949 support on DM6467 EVMNageswari Srinivasan2010-02-042-1/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the CDCE949 reference oscillator to the davinci clock list. On the DM6467T EVM, the CDCE949 is responsible for generating the pixel clock for display. On the DM6467 EVM, this pixel clock was being obtained from an internal source. This is not possible on the DM6467T EVM because of the presence of a 33MHz oscillator. The TSIF module also requires the CDCE949 to generate the data clocks. The actual clock definitions will be added by patches adding support for DM6467T VPIF and TSIF. This patch mearly lays the foundation for that work. Signed-off-by: Nageswari Srinivasan <nageswari@ti.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | davinci: add support for CDCE949 clock synthesizerNageswari Srinivasan2010-02-042-0/+308
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for TI's CDCE949 - a clock synthesizer with 4 PLLs and 9 outputs. It is used on DM6467 EVM. On the EVM, it generates clocks required for VPIF, TSIF and Audio modules. This patch adds it as part of the DaVinci clock framework. Testing: The various frequency outputs on Y1 have been tested using a out-of-tree VPIF video driver supporting HD video. The register values for Y5 frequency outputs have been derived from TSIF driver sources in MontaVista LSP kernel, but actual output has not been tested for lack of TSIF driver which actually works on the latest kernel. Signed-off-by: Nageswari Srinivasan <nageswari@ti.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | davinci: da850/omap-l138 EVM: register for suspend supportSekhar Nori2010-02-041-0/+17
| | | | | | | | | | | | | | | Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | davinci: da850/omap-l138: add support for SoC suspendSekhar Nori2010-02-043-0/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for registering for suspend-to-RAM functionality on da850/omap-l138 SoCs. da850 supports wakeup based on external event and RTC alarm. Currently only RTC alarm based wakeup is supported. Support for wakeup based on external event will be added as later improvements. For scheduling an alarm event on RTC some useful code is present in Documentation/rtc.txt Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | davinci: add power management supportSekhar Nori2010-02-045-0/+438
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds core power management (suspend-to-RAM) support for DaVinci SoCs. The code depends on the the "deepsleep" feature to suspend the SoC and saves power by gating the input clock. The wakeup can be based on an external event as supported by the SoC. Assembly code (in sleep.S) is added to aid gating DDR2 clocks. Code doing this work should not be accessing DDR2. The assembly code is relocated to SRAM by the code in pm.c The support has been validated on DA850/OMAP-L138 only though the code is (hopefully) generic enough that other SoCs supporting deepsleep feature simply requires SoC specific code to start using this driver. Note that all the device drivers don't support suspend/resume still and are being worked on. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | DaVinci: DM365: Changing default queue for DM365.Sandeep Paulraj2010-02-041-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | In DM365 Q0, Q1 and Q2 are used by codecs. LSP drivers should use Q3. This patch changes the default queue for DM365. Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | davinci: clock: Check CLK_PSC flag before disabling PSCChaithrika U S2010-02-041-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some modules do not have PSC to control their clocks. The 'lpsc' field in the clk structure is 0 for such clocks. In the clock disable function check for CLK PSC flag before disabling the PSC. If this is not taken care of then it may so happen that module controlled by LPSC 0 is erroneously disabled. Signed-off-by: Chaithrika U S <chaithrika@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | TI Davinci EMAC : Abstract Buffer address translation logic.Sriramakrishnan2010-02-042-17/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When programming the DMA engine, the next pointers must be programmed with physical address as seen from the DMA master address space. This address may be different from physical address of the buffer RAM area. This patch abstracts the buffer address translation logic. Signed-off-by: Sriramakrishnan <srk@ti.com> Acked-by: Chaithrika U S <chaithrika@ti.com> Acked-by: David S. Miller <davem@davemloft.net> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | TI Davinci EMAC : add platform specific interrupt enable/disable logic.Sriramakrishnan2010-02-042-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On certain SOCs, the EMAC controller is interfaced with a wrapper logic for handling interrupts. This patch implements a platform specific hook to cater to platforms that require custom interrupt handling logic Signed-off-by: Sriramakrishnan <srk@ti.com> Acked-by: Chaithrika U S <chaithrika@ti.com> Acked-by: David S. Miller <davem@davemloft.net> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | TI Davinci EMAC : Re-use driver for other platforms.Sriramakrishnan2010-02-048-10/+9Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The davinci EMAC peripheral is also available on other TI platforms -notably TI AM3517 SoC. This patch modifies the config option and the platform structure header files so that the driver can be reused on non-davinci platforms as well. Signed-off-by: Sriramakrishnan <srk@ti.com> Acked-by: Chaithrika U S <chaithrika@ti.com> Acked-by: David S. Miller <davem@davemloft.net> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | davinci: da850/omap-l138: Enable 4-bit eccSudhakar Rajashekhara2010-02-041-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | This patch initializes the platform data to enable 4-bit ecc support on DA850/OMAP-L138. Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | davinci: da850/omap-l138: Modify NOR partition infoSudhakar Rajashekhara2010-02-041-1/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On DA850/OMAP-L138, NOR flash partition was starting from offset ZERO erasing the UBL and u-boot when the complete NOR is erased. This patch moves the start of the partition to 512K, after the bootloaders and u-boot env variables. This patch also creates a new partition on NOR Flash to store Linux kernel image. Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | davinci: move /proc/davinci_clocks to debugfsSekhar Nori2010-02-041-31/+11Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move /proc/davinci_clocks to /sys/kernel/debug/davinci_clocks (debugfs). debugfs is more suited for this since the clock dump is debug information. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | davinci: make /proc/davinci_clocks display multi-rooted clock treeSekhar Nori2010-02-041-4/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch modifies clock dump to take care of clock tress rooted at multiple oscillators. Current code assumes the entire tree is rooted on a single oscillator. When using off-chip clock synthesizers, some of the clocks can be obtained from a different on-board oscillator. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | davinci: add support for DM6467T EVMSekhar Nori2010-02-044-2/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | DM6467T (T for Turbo) is a newer and faster DM6467 part from TI. The new part supports 1080p video and has the ARM running at 495MHz. More SoC information: http://focus.ti.com/docs/prod/folders/print/tms320dm6467t.html Spectrum Digital, Inc has a new EVM for this part. It is _mostly_ same as the older DM6467 EVM except for a 33MHz crystal input and THS8200 video encoder for 1080p support. The meat of this patch is dedicated to initializing the crystal frequency from EVM board file. Additional notes: I did consider some alternative ways to make the crystal input board specific including - (1) having board code initialize the crystal frequency using the first member of soc_info->cpu_clks array (2) introducing a new ref_clk_rate member in soc_info structure. But, the current way seems to be the simplest and least intruding considering that both the clock array and SoC info structure are actually private to the SoC file. Also the fact that davinci_common_init() initializes both the soc_info and clocks in one go. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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