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* [S390] dasd: add enhanced DASD statistics interfaceStefan Weinhuber2011-07-244-91/+686
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch extends the DASD statistics to allow for a more detailed analysis of DASD I/O operations. In particular we want the statistics to provide answers to the following questions: - How many requests used a PAV alias? - How many requests used High Performance FICON? - How do read request perform versus write requests? The existing DASD statistics interface has several shortcomings - The interface for global data is a formatted text table in procfs (/proc/dasd/statistics). The layout is meant for human readers and is not to easy to parse. If values get to large for the table layout, they get scaled down. - The statistics which are collected per block device can be accessed via an ioctl interface, which can only be extended by defining a new ioctl. - There is no statistics interface for individual PAV base and alias devices. To overcome theses shortcomings we create a new DASD statistics interface in debugfs. This interface will contain one entry for global data, one per DASD block device, and one per DASD base and alias device. Each file contains the statistic data in easy to parse name/value and name/array pairs. The existing interfaces will remain functional, but they will not be extended. Signed-off-by: Stefan Weinhuber <wein@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
* [S390] kvm: make sigp emerg smp capableChristian Ehrhardt2011-07-242-0/+9
| | | | | | | | SIGP emerg needs to pass the source vpu adress into __LC_CPU_ADDRESS of the target guest. Signed-off-by: Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
* [S390] disable cpu measurement alerts on a dying cpuJan Glauber2011-07-241-1/+2
| | | | | | | | | | The cpu measurement alerts that are used for instance by oprofile for hardware sampling are not turned off on a cpu that is going offline. Add the appropriate control register bit that should be disabled to the list. Signed-off-by: Jan Glauber <jang@linux.vnet.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
* [S390] initial cr0 bitsMartin Schwidefsky2011-07-241-1/+1
| | | | | | Remove outdated bits from the initial cr0 register. Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
* [S390] iucv cr0 enablement bitMartin Schwidefsky2011-07-243-4/+7
| | | | | | | Do not set the cr0 enablement bit for iucv by default in head[31|64].S, move the enablement to iucv_init in the iucv base layer. Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
* [S390] race safe external interrupt registrationJan Glauber2011-07-241-37/+46
| | | | | | | | | | | | | | | | | The (un-)register_external_interrupt functions are not race safe if more than one interrupt handler is added or deleted for an external interrupt concurrently. Make the registration / unregistration of external interrupts race safe by using RCU and a spinlock. RCU is used to avoid a performance penalty in the external interrupt handler, the register and unregister functions are protected by the spinlock and are not performance critical. call_rcu must be used since the SCLP driver uses the interface with IRQs disabled. Also use the generic list implementation rather than homebrewn list code. Signed-off-by: Jan Glauber <jang@linux.vnet.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
* [S390] remove tape block docuMartin Schwidefsky2011-07-241-122/+0Star
| | | | | | | After git commit 66ceed5ad1318863c21710f316942bcefff8081c removed the tape block device driver, remove its documentation as well. Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
* [S390] ap: toleration support for ap device type 10Holger Dengler2011-07-242-27/+91
| | | | | | | Add toleration support for ap devices with device type 10. Signed-off-by: Holger Dengler <hd@linux.vnet.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
* [S390] cleanup program check handler prototypesMartin Schwidefsky2011-07-242-13/+7Star
| | | | Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
* [S390] remove kvm mmu reload on s390Carsten Otte2011-07-242-19/+2Star
| | | | | | | | | | This patch removes the mmu reload logic for kvm on s390. Via Martin's new gmap interface, we can safely add or remove memory slots while guest CPUs are in-flight. Thus, the mmu reload logic is not needed anymore. Signed-off-by: Carsten Otte <cotte@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
* [S390] Use gmap translation for accessing guest memoryCarsten Otte2011-07-246-110/+194
| | | | | | | | | | This patch removes kvm-s390 internal assumption of a linear mapping of guest address space to user space. Previously, guest memory was translated to user addresses using a fixed offset (gmsor). The new code uses gmap_fault to resolve guest addresses. Signed-off-by: Carsten Otte <cotte@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
* [S390] use gmap address spaces for kvm guest imagesCarsten Otte2011-07-243-12/+40
| | | | | | | | | | This patch switches kvm from using (Qemu's) user address space to Martin's gmap address space. This way QEMU does not have to use a linker script in order to fit large guests at low addresses in its address space. Signed-off-by: Carsten Otte <cotte@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
* [S390] kvm guest address space mappingMartin Schwidefsky2011-07-2411-36/+473
| | | | | | | | | | | | | | | | | | Add code that allows KVM to control the virtual memory layout that is seen by a guest. The guest address space uses a second page table that shares the last level pte-tables with the process page table. If a page is unmapped from the process page table it is automatically unmapped from the guest page table as well. The guest address space mapping starts out empty, KVM can map any individual 1MB segments from the process virtual memory to any 1MB aligned location in the guest virtual memory. If a target segment in the process virtual memory does not exist or is unmapped while a guest mapping exists the desired target address is stored as an invalid segment table entry in the guest page table. The population of the guest page table is fault driven. Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
* [S390] fix s390 assembler code alignmentsJan Glauber2011-07-2421-680/+378Star
| | | | | | | | | | | | The alignment is missing for various global symbols in s390 assembly code. With a recent gcc and an instruction like stgrl this can lead to a specification exception if the instruction uses such a mis-aligned address. Specify the alignment explicitely and while add it define __ALIGN for s390 and use the ENTRY define to save some lines of code. Signed-off-by: Jan Glauber <jang@linux.vnet.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
* [S390] move sie code to entry.SMartin Schwidefsky2011-07-245-107/+79Star
| | | | | | | | | | | | | | The entry to / exit from sie has subtle dependencies to the first level interrupt handler. Move the sie assembler code to entry64.S and replace the SIE_HOOK callback with a test and the new _TIF_SIE bit. In addition this patch fixes several problems in regard to the check for the_TIF_EXIT_SIE bits. The old code checked the TIF bits before executing the interrupt handler and it only modified the instruction address if it pointed directly to the sie instruction. In both cases it could miss a TIF bit that normally would cause an exit from the guest and would reenter the guest context. Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
* [S390] kvm: handle tprot interceptsChristian Borntraeger2011-07-245-0/+53
| | | | | | | | | | When running a kvm guest we can get intercepts for tprot, if the host page table is read-only or not populated. This patch implements the most common case (linux memory detection). This also allows host copy on write for guest memory on newer systems. Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
* [S390] qdio: clear shared DSCI before scheduling the queue handlerJan Glauber2011-07-241-10/+5Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The following race can occur with qdio devices that use the shared device state change indicator: Device (Shared DSCI) CPU0 CPU1 =============================================================================== 1. DSCI 0 => 1, INT pending 2. Thinint handler * si_used = 1 * Inbound tasklet_schedule * DSCI 1 => 0 3. DSCI 0 => 1, INT pending 4. Thinint handler * si_used = 1 * Inbound tasklet_schedu le => NOP 5. Inbound tasklet run 6. DSCI = 1, INT surpressed 7. DSCI 1 => 0 The race would lead to a stall where new data in the input queue is not recognized so the device stops working in case of no further traffic. Fix the race by resetting the DSCI before scheduling the inbound tasklet so the device generates an interrupt if new data arrives in the above scenario in step 6. Reviewed-by: Ursula Braun <ursula.braun@de.ibm.com> Signed-off-by: Jan Glauber <jang@linux.vnet.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
* [S390] reference bit testing for unmapped pagesMartin Schwidefsky2011-07-241-3/+3
| | | | | | | | | | | | | On x86 a page without a mapper is by definition not referenced / old. The s390 architecture keeps the reference bit in the storage key and the current code will check the storage key for page without a mapper. This leads to an interesting effect: the first time an s390 system needs to write pages to swap it only finds referenced pages. This causes a lot of pages to get added and written to the swap device. To avoid this behaviour change page_referenced to query the storage key only if there is a mapper of the page. Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
* [S390] irqs: Do not trace arch_local_{*,irq_*} functionsSteven Rostedt2011-07-241-8/+8
| | | | | | | | | | | | | | Do not trace arch_local_save_flags(), arch_local_irq_*() and friends. Although they are marked inline, gcc may still make a function out of them and add it to the pool of functions that are traced by the function tracer. This can cause undesirable results (kernel panic, triple faults, etc). Add the notrace notation to prevent them from ever being traced. Cc: Heiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: Steven Rostedt <rostedt@goodmis.org> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
* [S390] kconfig: remove tape interface support commentMartin Schwidefsky2011-07-241-3/+0Star
| | | | | | | There is nothing below the menu entry "S/390 tape interface support". Remove it. Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
* Merge branch 'for-linus' of ↵Linus Torvalds2011-07-23115-2138/+1735Star
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/vapier/blackfin * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/vapier/blackfin: (43 commits) Blackfin: spi-docs: further clarify GPIO CS behavior with various modes Blackfin: boards: fix pcm device name Blackfin: SMP: punt unused atomic_test_mask helper Blackfin: irqs: do not trace arch_local_{*,irq_*} functions Blackfin: bf526: restrict reboot workaround to 0.0 silicon Blackfin: bf51x: fix alternative portmux options Blackfin: bf54x: fix GPIO resume code Blackfin: dpmc: optimize SDRAM programming slightly Blackfin: dpmc: don't save/restore scratch registers Blackfin: bf538: pull gpio/port logic out of core hibernate paths Blackfin: dpmc: optimize hibernate/resume path Blackfin: dpmc: do not save/restore EVT0/EVT1/EVT4 when hibernating Blackfin: dpmc: relocate hibernate helper macros Blackfin: dpmc: omit RETE/RETN when hibernating Blackfin: dpmc: optimize SIC_IWR programming a little Blackfin: gpio/ints: generalize pint logic Blackfin: dpmc: bind to MMR names and not CPUs Blackfin: debug-mmrs: generalize pint logic Blackfin: bf54x: switch to common pint MMR struct Blackfin: bf54x: tweak MMR pint names ...
| * Blackfin: spi-docs: further clarify GPIO CS behavior with various modesMike Frysinger2011-07-231-0/+2
| | | | | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: boards: fix pcm device nameScott Jiang2011-07-232-11/+56
| | | | | | | | | | | | | | The pcm driver name has been changed, but the device name has not. Signed-off-by: Scott Jiang <scott.jiang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: SMP: punt unused atomic_test_mask helperMike Frysinger2011-07-231-5/+0Star
| | | | | | | | | | | | No one uses this func, so just punt it. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: irqs: do not trace arch_local_{*,irq_*} functionsSteven Rostedt2011-07-231-21/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | Do not trace arch_local_save_flags(), arch_local_irq_*() and friends. Although they are marked inline, gcc may still make a function out of them and add it to the pool of functions that are traced by the function tracer. This can cause undesirable results (kernel panic, triple faults, etc). Add the notrace notation to prevent them from ever being traced. Signed-off-by: Steven Rostedt <rostedt@goodmis.org> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: bf526: restrict reboot workaround to 0.0 siliconMike Frysinger2011-07-231-1/+3
| | | | | | | | | | | | | | The bug in the BF526 rom when doing a software reset exists only in older silicon versions, so don't clear SWRST on newer parts. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: bf51x: fix alternative portmux optionsMike Frysinger2011-07-232-45/+87
| | | | | | | | | | | | | | | | | | The BF51x's alternative portmux Kconfig options were copy & pasted from the BF52x, but never tweaked to reflect it. So drop the old options as they were never used (and were simply wrong), and add the BF51x specific pieces to the Kconfig and header. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: bf54x: fix GPIO resume codeMike Frysinger2011-07-231-2/+2
| | | | | | | | | | | | | | | | | | Back in commit c03c2a87347b849ec927d, we fixed logic in the non-bf54x GPIO resume code to set the data levels properly before the direction to avoid spurious line glitches. But we missed the bf54x code paths. So add the same fix there. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: dpmc: optimize SDRAM programming slightlyMike Frysinger2011-07-231-9/+10
| | | | | | | | | | | | | | No need to reload these registers constantly since they're always available (we're not making any function calls in between). Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: dpmc: don't save/restore scratch registersMike Frysinger2011-07-231-6/+6
| | | | | | | | | | | | | | The Blackfin C ABI says we do not need to save/restore R0-R3 and P0-P2 as they are available as scratch registers. So don't bother. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: bf538: pull gpio/port logic out of core hibernate pathsMike Frysinger2011-07-235-36/+65
| | | | | | | | | | | | | | | | Re-architect how we save/restore the gpio/port logic that only pertains to bf538/bf539 parts by pulling it out of the core code paths and pushing it out to bf538-specific locations. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: dpmc: optimize hibernate/resume pathMike Frysinger2011-07-232-439/+572
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current save logic used in hibernation is to do a MMR load (base + offset) into a register, and then push that onto the stack. Then when restoring, pop off the stack into a register followed by a MMR store (base + offset). These use plenty of 32bit insns rather than 16bit, are pretty long winded, and full of pipeline bubbles. So, by taking advantage of MMRs that are contiguous, the multi-register push/pop insn, and register abuse, we can shrink this code considerably. When saving, the new logic does a lot of loads into the data and pointer registers before executing a single multi-register push insn. Then when restoring, we do a single multi-register pop insn followed by a lot of stores. Overall, this allows us to cut the insn count by ~30%, the code size by ~45%, and drastically reduce the register hazards that trigger bubbles in the pipeline. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: dpmc: do not save/restore EVT0/EVT1/EVT4 when hibernatingMike Frysinger2011-07-231-6/+0Star
| | | | | | | | | | | | | | | | | | | | EVT0 is for emulation, EVT1 is for reset, and EVT4 is the "global int disable" region. None of these are used by software (or even hardware), so don't bother saving/restoring them when we hibernate since nothing ever uses these in Linux (the only thing they would be useful for is core-memory scratch, but that's just crazy talk). Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: dpmc: relocate hibernate helper macrosMike Frysinger2011-07-232-26/+24Star
| | | | | | | | | | | | | | This defines only get used in the hibernate code, so remove them from the global dpmc header as no one else cares. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: dpmc: omit RETE/RETN when hibernatingMike Frysinger2011-07-231-4/+0Star
| | | | | | | | | | | | | | | | The RETE/RETN registers are only used in emulation(JTAG) and NMI nodes, or as scratch registers, neither of which need to be saved/restored as this code doesn't execute at those core event levels. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: dpmc: optimize SIC_IWR programming a littleMike Frysinger2011-07-231-9/+6Star
| | | | | | | | | | | | | | For parts with more than one SIC_IWR, we can optimize the writing a little bit using better Blackfin insns. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: gpio/ints: generalize pint logicMike Frysinger2011-07-233-12/+19
| | | | | | | | | | | | | | | | Have the logic that uses peripheral interrupt blocks key off of pint defines rather than CPU names so that things are generalized across families. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: dpmc: bind to MMR names and not CPUsMike Frysinger2011-07-231-4/+3Star
| | | | | | | | | | | | | | Have the code work off of MMR names rather than CPU defines so there is less code to tweak in the future with new parts. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: debug-mmrs: generalize pint logicMike Frysinger2011-07-231-19/+31
| | | | | | | | | | | | Don't bind the code to specific CPU defines. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: bf54x: switch to common pint MMR structMike Frysinger2011-07-231-18/+5Star
| | | | | | | | | | | | | | We have a struct in the headers describing the register layout, so drop the local duplicate one. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: bf54x: tweak MMR pint namesMike Frysinger2011-07-232-2/+2
| | | | | | | | | | | | | | The hardware block uses the name "request" rather than "irq", so update the struct accordingly. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: bf54x: constify pint register arrayMike Frysinger2011-07-231-1/+1
| | | | | | | | | | | | The array of pointers to register blocks never changes, so constify it. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: gpio: punt unused GPIO_# definesMike Frysinger2011-07-232-52/+3Star
| | | | | | | | | | | | | | | | These defines don't accomplish much as GPIO_# is the same thing as #. Each CPU already provides helpful symbolic defines like GPIO_<PIN> which everyone uses, so just punt these # ones. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: convert unicode space gremlinsMike Frysinger2011-07-237-27/+27
| | | | | | | | | | | | | | | | Not sure how these guys slipped in, but they're annoying me. So bring these unicode space gremlins down to earth to normal ascii spaces. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: pwm: implement linux/pwm.h APIMike Frysinger2011-07-233-0/+111
| | | | | | | | | | | | | | | | For now, this only supports gptimers. Support for dedicated PWM devices as found on newer parts to come. Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: gptimers: add enable/disable by timer idMike Frysinger2011-07-231-0/+10
| | | | | | | | | | | | | | The API is geared around timer ids, except for the act of enabling and disabling timers. So add a small helper to fill out the gap. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: make sure percpu section is aligned in XIP buildsSteven Miao2011-07-231-0/+1
| | | | | | | | | | | | | | | | The alignment is normally handled by PERCPU(), but we need to do it ourselves in the XIP build due to the custom layout. Signed-off-by: Steven Miao <realmz6@gmail.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: gptimers: use bfin read/write helpersMike Frysinger2011-07-231-20/+25
| | | | | | | | | | | | | | Use proper helper macros for reading/writing the MMRs rather than volatile markings on the struct. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: gptimers: use register structs from common headerMike Frysinger2011-07-231-32/+16Star
| | | | | | | | | | | | | | Now that asm/gptimers.h has the hardware register struct layout, there's no need to duplicate things locally. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: debug-mmrs: use new gptimer_group layout to simplify codeMike Frysinger2011-07-231-18/+34
| | | | | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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