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* MAINTAINERS: add entry for ARM ZTE architectureJun Nie2015-05-151-0/+9
| | | | | | | Add entry for ZTE ARM architecture Signed-off-by: Jun Nie <jun.nie@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* ARM: zx: enable SMP and hotplug for zx296702Jun Nie2015-05-154-0/+241
| | | | | | | | Bring up the secondary core. Enable hotplug with supporting powering off secondary core. Signed-off-by: Jun Nie <jun.nie@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* ARM: zx: add low level debug support for zx296702Jun Nie2015-05-152-0/+21
| | | | | | | | Use the UART0 peripheral for low level debug. Only the UART port 0 is currently supported. Signed-off-by: Jun Nie <jun.nie@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* ARM: zx: add basic support for ZTE ZX296702Jun Nie2015-05-155-0/+47
| | | | | | | | | | Add basic code for ZTE ZX296702 platform. [arnd: removed unused zx296702_init_machine function, and changed l2c aux val to default] Signed-off-by: Jun Nie <jun.nie@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* ARM: lpc18xx: add basic support for NXP LPC18xx/43xx SoCsJoachim Eastwood2015-05-156-1/+49
| | | | | | | | | | | | | | Add support for NXP's LPC18xx (Cortex-M3) and LPC43xx (Cortex-M4) SoCs. These SoCs are NXP's high preformance MCU line and can run at clock speeds up to 180 MHz for LPC18xx and 204 MHz for LPC43xx. LPC43xx is more or less a LPC18xx with a Cortex-M4F core and a few extra peripherals. The LPC43xx series also features one or two Cortex-M0 cores that can be used to offload the main M4 core. Signed-off-by: Joachim Eastwood <manabian@gmail.com> Reviewed-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* ARM: Add STM32 family machineMaxime Coquelin2015-05-157-0/+96
| | | | | | | | | | STMicrolectronics's STM32 series is a family of Cortex-M microcontrollers. It is used in various applications, and proposes a wide range of peripherals. Tested-by: Chanwoo Choi <cw00.choi@samsung.com> Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* Merge tag 'pxa-for-4.2' of https://github.com/rjarzmik/linux into next/socArnd Bergmann2015-05-1519-910/+63Star
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Merge "pxa changes for v4.2 cycle" from Robert Jarzmik: The main and only feature is the conversion of all pxa variants to clock framework. This encompasses pxa25x, pxa27x and pxa3xx, for all boards. This should be a disruptive cycle in the normally quiet pxa history, as the change can break any platform, and the test were performed on only 4 boards (lubbock, zylonite, mioa701, cm-x300). * tag 'pxa-for-4.2' of https://github.com/rjarzmik/linux: ARM: pxa: Constify irq_domain_ops ARM: pxa: Transition pxa25x, pxa27x, pxa3xx to clk framework ARM: pxa: convert eseries to clock framework ARM: pxa: Transition pxa25x and pxa27x to clk framework ARM: pxa: pxa27x skip default device initialization with DT clk: pxa: add missing pxa27x clocks for Irda and sa1100-rtc ARM: pxa: move gpio11 clock to board files ARM: pxa: change clocks init sequence
| * ARM: pxa: Constify irq_domain_opsKrzysztof Kozlowski2015-05-121-1/+1
| | | | | | | | | | | | | | | | The irq_domain_ops are not modified by the driver and the irqdomain core code accepts pointer to a const data. Signed-off-by: Krzysztof Kozlowski <k.kozlowski.k@gmail.com> Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
| * ARM: pxa: Transition pxa25x, pxa27x, pxa3xx to clk frameworkRobert Jarzmik2015-05-1216-528/+6Star
| | | | | | | | | | | | | | | | | | | | | | | | | | Transition the PXA25x, PXA27x and PXA3xx CPUs to the clock framework. This transition still enables legacy platforms to run without device tree as before, ie relying on platform data encoded in board specific files. This is the last step of clock framework transition for pxa platforms. It was tested on lubbock (pxa25x), mioa701 (pxa27x) and zylonite (pxa3xx). Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
| * ARM: pxa: convert eseries to clock frameworkRobert Jarzmik2015-05-121-19/+2Star
| | | | | | | | | | | | | | | | As pxa architecture transitions to clock framework, the previously available INIT_CLKREG is no more. Use the fixed clock rate initializer to declare the "fake" CLK_CK32K in eseries. Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
| * ARM: pxa: Transition pxa25x and pxa27x to clk frameworkRobert Jarzmik2015-05-124-359/+7Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Transition the PXA25x and PXA27x CPUs to the clock framework. This transition still enables legacy platforms to run without device tree as before, ie relying on platform data encoded in board specific files. The transition breaks the previous clocks activation of pin control (gpio11 and gpio12). Machine files should be amended to take that into account. This is the last step of clock framework transition for pxa25x and pxa27x, leaving only pxa3xx for further work. Reviewed-by: Michael Turquette <mturquette@linaro.org> Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
| * ARM: pxa: pxa27x skip default device initialization with DTRobert Jarzmik2015-05-121-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | When booting via DT, the default PXA devices must not have been probed before, otherwise the augmented information from the device tree is ignored. This is the twin commit of commit 82ce44d104dc ("ARM: pxa3xx: skip default device initialization when booting via DT"). Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr> Acked-by: Daniel Mack <daniel@zonque.org>
| * clk: pxa: add missing pxa27x clocks for Irda and sa1100-rtcRobert Jarzmik2015-05-121-0/+29
| | | | | | | | | | | | | | | | | | | | Add 2 clocks which were erronously forgotten by the clock framework port, namely : - sa1100-rtc - irda for pxa2xx-ir:UARTCLK Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr> Acked-by: Michael Turquette <mturquette@linaro.org>
| * ARM: pxa: move gpio11 clock to board filesRobert Jarzmik2015-05-122-1/+7
| | | | | | | | | | | | | | | | | | | | | | The pxa25x gpio11 clock output was previously selected on its pin by the clock enabling, toggling the pin function. As we transition to common clock framework, the pin function is moved to board file for the 2 users, ie. lubbock and eseries. Reviewed-by: Michael Turquette <mturquette@linaro.org> Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
| * ARM: pxa: change clocks init sequenceRobert Jarzmik2015-05-123-2/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since pxa clocks were ported to the clock framework, an ordering issue appears between clocks and clocksource initialization. As a consequence, the pxa timer clock cannot be acquired in pxa_timer, and is disabled by clock framework because it is "unused". The ordering issue is that in the kernel boot sequence : start_kernel() ... time_init() -> pxa_timer() -> here the clocksource is initialized ... rest_init() kernel_init() initcalls -> here the clocks are initialized In the current sequence, the clocks are initialized way after pxa_timer, which cannot acquire the OSTIMER0 clock. To solve this issue, the clocks initialization is moved to pxa_timer(), so that clocks are initialized before clocksource for non device-tree. For device-tree, the standard arm time_init() will take care of the ordering. Reviewed-by: Michael Turquette <mturquette@linaro.org> Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
* | Merge tag 'rpi-soc-for-armsoc-v4.2' of ↵Arnd Bergmann2015-05-152-91/+62Star
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/rpi/linux-rpi into next/soc Merge "RaspberryPi SoC (mach) changes due for v4.2" from Lee Jones: * tag 'rpi-soc-for-armsoc-v4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/rpi/linux-rpi: ARM: bcm2835: Move the restart/power_off handling to the WDT driver ARM: bcm2835: Drop the init_irq() hook ARM: bcm2835: Skip doing our own iotable_init() initialization
| * | ARM: bcm2835: Move the restart/power_off handling to the WDT driverEric Anholt2015-05-142-73/+62Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since the WDT is what's used to drive restart and power off, it makes more sense to keep it there, where the regs are already mapped and definitions for them provided. Note that this means you may need to add CONFIG_BCM2835_WDT to retain functionality of your kernel. Signed-off-by: Eric Anholt <eric@anholt.net> Acked-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Lee Jones <lee.jones@linaro.org>
| * | ARM: bcm2835: Drop the init_irq() hookEric Anholt2015-05-141-1/+0Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | This is the default function that gets called if the hook is NULL. Signed-off-by: Eric Anholt <eric@anholt.net> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Tested-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
| * | ARM: bcm2835: Skip doing our own iotable_init() initializationEric Anholt2015-05-141-17/+0Star
| |/ | | | | | | | | | | | | | | | | | | | | | | The only thing we were using this 16MB mapping of IO peripherals for was the uart's early debug mapping. If we just drop the map_io hook, the kernel will call debug_ll_io_init() for us, which maps the single page needed for the device. Signed-off-by: Eric Anholt <eric@anholt.net> Tested-by: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
* | Merge tag 'tegra-for-4.2-soc' of ↵Arnd Bergmann2015-05-139-33/+59
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/soc Merge "ARM: tegra: Core SoC changes for v4.2-rc1" from Thierry Reding: A couple of changes to the core SoC support code. Perhaps the most important part is a fix for a regression in LP1 suspend/resume code that was introduced a while back. * tag 'tegra-for-4.2-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: soc/tegra: pmc: move to using a restart handler ARM: tegra20: Store CPU "resettable" status in IRAM soc/tegra: Watch wait_for_completion_timeout() return type
| * | soc/tegra: pmc: move to using a restart handlerDavid Riley2015-05-043-9/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The pmc driver was previously exporting tegra_pmc_restart, which was assigned to machine_desc.init_machine, taking precedence over the restart handlers registered through register_restart_handler(). Signed-off-by: David Riley <davidriley@chromium.org> [tomeu.vizoso@collabora.com: Rebased] Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com> Acked-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Alexandre Courbot <acourbot@nvidia.com> [treding@nvidia.com: minor cleanups] Signed-off-by: Thierry Reding <treding@nvidia.com>
| * | ARM: tegra20: Store CPU "resettable" status in IRAMDmitry Osipenko2015-05-045-22/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 7232398abc6a ("ARM: tegra: Convert PMC to a driver") changed tegra_resume() location storing from late to early and, as a result, broke suspend on Tegra20. PMC scratch register 41 is used by tegra LP1 resume code for retrieving stored physical memory address of common resume function and in the same time used by tegra20_cpu_shutdown() (shared by Tegra20 cpuidle driver and platform SMP code), which is storing CPU1 "resettable" status. It implies strict order of scratch register usage, otherwise resume function address is lost on Tegra20 after disabling non-boot CPU's on suspend. Fix it by storing "resettable" status in IRAM instead of PMC scratch register. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Fixes: 7232398abc6a (ARM: tegra: Convert PMC to a driver) Cc: <stable@vger.kernel.org> # v3.17+ Signed-off-by: Thierry Reding <treding@nvidia.com>
| * | soc/tegra: Watch wait_for_completion_timeout() return typeNicholas Mc Guire2015-05-041-2/+4
| |/ | | | | | | | | | | | | | | | | The return type of the wait_for_completion_timeout() function is not int but unsigned long. An appropriately named unsigned long is added and the assignment fixed up. Signed-off-by: Nicholas Mc Guire <hofrat@osadl.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
* | Merge tag 'socfpga_updates_for_v4.2' of ↵Arnd Bergmann2015-05-137-66/+37Star
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into next/soc Merge "SoCFPGA updates for v4.2" from Dinh Nguyen: - Add big endian support - Add earlyprintk support on UART1 that is used on Arria10 - Remove the need to map uart_io_desc - Use of_iomap to map the SCU - Remove socfpga_smp_init_cpus as arm_dt_init_cpu_maps is already doing the CPU mapping. * tag 'socfpga_updates_for_v4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux: ARM: socfpga: use of_iomap to map the SCU ARM: socfpga: remove the need to map uart_io_desc ARM: socfpga: Add support for UART1 debug uart for earlyprintk ARM: socfpga: support big endian for socfpga ARM: socfpga: enable big endian for secondary core(s) ARM: debug: fix big endian operation for 8250 word mode
| * | ARM: socfpga: use of_iomap to map the SCUDinh Nguyen2015-05-133-49/+10Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use of_iomap to map the "arm,cortex-a9-scu". By doing this, we can remove map_io in socfpga.c. Also, we can remove socfpga_smp_init_cpus, as arm_dt_init_cpu_maps is already doing the CPU mapping. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
| * | ARM: socfpga: remove the need to map uart_io_descDinh Nguyen2015-05-111-9/+0Star
| | | | | | | | | | | | | | | | | | | | | All the necessary debug uart mapping is already being done in debug_ll_io_init, there's no need for it here. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
| * | ARM: socfpga: Add support for UART1 debug uart for earlyprintkDinh Nguyen2015-05-111-7/+19
| | | | | | | | | | | | | | | | | | Add support for hardware uart1 for earlyprintk support on Arria10 devkit. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
| * | ARM: socfpga: support big endian for socfpgaBen Dooks2015-05-111-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Now the debug and platsmp.S are fixed for big endian, the architecture can now advertise big endian support. Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
| * | ARM: socfpga: enable big endian for secondary core(s)Ben Dooks2015-05-111-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | Update the secondary code to allow the secondary boot to work when the system is running big endian. Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
| * | ARM: debug: fix big endian operation for 8250 word modeBen Dooks2015-05-111-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If the 8250 debug code is used in word mode on an big endian host then the writes need to be change into little endian for the bus. Note, we have to re-convert the value back as the debug code will inspect the value after writing it to see if a newline has been written. Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
* | | Merge tag 'sunxi-core-for-4.2' of ↵Arnd Bergmann2015-05-122-0/+70
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/soc Merge "Allwinner core additions for 4.2" from Maxime Ripard: This pull request contains only the changes needed to support the SMP on the Allwinner A23. * tag 'sunxi-core-for-4.2' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux: ARM: sun8i: Add SMP support for the Allwinner A23
| * | | ARM: sun8i: Add SMP support for the Allwinner A23Chen-Yu Tsai2015-04-272-0/+70
| | |/ | |/| | | | | | | | | | | | | | | | | | | | | | The A23 is a dual Cortex-A7. Add the logic to use the IPs used to control the CPU configuration and the CPU power so that we can bring up secondary CPUs at boot. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* | | MAINTAINERS: add myself as ARM/UniPhier maintainerMasahiro Yamada2015-05-121-0/+7
| | | | | | | | | | | | | | | Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* | | ARM: UniPhier: add basic support for UniPhier architectureMasahiro Yamada2015-05-126-0/+136
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Initial commit for a new SoC family, UniPhier, developed by Socionext Inc. (formerly, System LSI Business Division of Panasonic Corporation). This commit includes a minimal set of components for booting the kernel, including SMP support. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* | | Linux 4.1-rc3Linus Torvalds2015-05-111-1/+1
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* | | Merge branch 'drm-fixes' of git://people.freedesktop.org/~airlied/linuxLinus Torvalds2015-05-1018-106/+230
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull drm fixes from Dave Airlie: "I really need to get back to sending these on my Friday, instead of my Monday morning, but nothing too amazing in here: a few amdkfd fixes, a few radeon fixes, i915 fixes, one tegra fix and one core fix" * 'drm-fixes' of git://people.freedesktop.org/~airlied/linux: drm: Zero out invalid vblank timestamp in drm_update_vblank_count. drm/tegra: Don't use vblank_disable_immediate on incapable driver. drm/radeon: stop trying to suspend UVD sessions drm/radeon: more strictly validate the UVD codec drm/radeon: make UVD handle checking more strict drm/radeon: make VCE handle check more strict drm/radeon: fix userptr lockup drm/radeon: fix userptr BO unpin bug v3 drm/amdkfd: Initialize sdma vm when creating sdma queue drm/amdkfd: Don't report local memory size drm/amdkfd: allow unregister process with queues drm/i915: Drop PIPE-A quirk for 945GSE HP Mini drm/i915: Sink rate read should be saved in deca-kHz drm/i915/dp: there is no audio on port A drm/i915: Add missing MacBook Pro models with dual channel LVDS drm/i915: Assume dual channel LVDS if pixel clock necessitates it drm/radeon: don't setup audio on asics that don't support it drm/radeon: disable semaphores for UVD V1 (v2)
| * \ \ Merge tag 'drm-intel-fixes-2015-05-08' of ↵Dave Airlie2015-05-103-9/+29
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://anongit.freedesktop.org/drm-intel into drm-fixes misc i915 fixes. * tag 'drm-intel-fixes-2015-05-08' of git://anongit.freedesktop.org/drm-intel: drm/i915: Drop PIPE-A quirk for 945GSE HP Mini drm/i915: Sink rate read should be saved in deca-kHz drm/i915/dp: there is no audio on port A drm/i915: Add missing MacBook Pro models with dual channel LVDS drm/i915: Assume dual channel LVDS if pixel clock necessitates it
| | * | | drm/i915: Drop PIPE-A quirk for 945GSE HP MiniChris Wilson2015-05-071-3/+0Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since the introduction of BIOS fb preservation, circa 3.17, we began encountering a failure during boot when trying to use force-detect before GEM was initialised. That bug is from commit 7fad798e16fecddd41c6a91728a09f0b9507e40c Author: Daniel Vetter <daniel.vetter@ffwll.ch> Date: Wed Jul 4 17:51:47 2012 +0200 drm/i915: ensure the force pipe A quirk is actually followed but investigation of the affected machine revealed that it was using a PIPE-A quirk even though it was a 945GSE and the quirk is only supposed to be used to workaround a hardware issue on 830/845. That quirk was added for this HP Mini in commit 6b93afc564a5e74b0eaaa46c95f557449951b3b9 Author: Bryce Harrington <bryce@bryceharrington.org> Date: Wed May 27 03:40:52 2009 -0700 add pipe a force quirk for Dell mini in order to workaround an issue with the BIOS behaving strangely during lid-close. Since then we have a much larger hammer to thwart the BIOS after opening the lid and the PIPE-A quirk is no longer required. Reported-and-tested-by: Apostolos B. <barz621@gmail.com> References: https://bugs.freedesktop.org/show_bug.cgi?id=21960 Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=87521 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
| | * | | drm/i915: Sink rate read should be saved in deca-kHzSonika Jindal2015-05-071-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The sink rate read from supported link rate table is in KHz as per spec while in drm, the saved clock is in deca-KHz. So divide the link rate by 10 before storing. Reading of rates was added by: commit fc0f8e25318f ("drm/i915/skl: Read sink supported rates from edp panel") Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Sonika Jindal <sonika.jindal@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
| | * | | drm/i915/dp: there is no audio on port AJani Nikula2015-05-061-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The eDP port A register on PCH split platforms has a slightly different register layout from the other ports, with bit 6 being either alternate scrambler reset or reserved, depending on the generation. Our misinterpretation of the bit as audio has lead to warning. Fix this by not enabling audio on port A, since none of our platforms support audio on port A anyway. v2: DDI doesn't have audio on port A either (Sivakumar Thulasimani) Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89958 Reported-and-tested-by: Chris Bainbridge <chris.bainbridge@gmail.com> Cc: stable@vger.kernel.org Reviewed-by: Sivakumar Thulasimani <sivakumar.thulasimani@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
| | * | | drm/i915: Add missing MacBook Pro models with dual channel LVDSLukas Wunner2015-05-051-1/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Single channel LVDS maxes out at 112 MHz. The 15" pre-retina models shipped with 1440x900 (106 MHz) by default or 1680x1050 (119 MHz) as a BTO option, both versions used dual channel LVDS even though the smaller one would have fit into a single channel. Notes: Bug report showing that the MacBookPro8,2 with 1440x900 uses dual channel LVDS (this lead to it being hardcoded in intel_lvds.c by Daniel Vetter with commit 618563e3945b9d0864154bab3c607865b557cecc): https://bugzilla.kernel.org/show_bug.cgi?id=42842 If i915.lvds_channel_mode=2 is missing even though the machine needs it, every other vertical line is white and consequently, only the left half of the screen is visible (verified by myself on a MacBookPro9,1). Forum posting concerning a MacBookPro6,2 with 1440x900, author is using i915.lvds_channel_mode=2 on the kernel command line, proving that the machine uses dual channels: https://bbs.archlinux.org/viewtopic.php?id=185770 Chi Mei N154C6-L04 with 1440x900 is a replacement panel for all MacBook Pro "A1286" models, and that model number encompasses the MacBookPro6,2 / 8,2 / 9,1. Page 17 of the panel's datasheet shows it's driven with dual channel LVDS: http://www.ebay.com/itm/-/400690878560 http://www.everymac.com/ultimate-mac-lookup/?search_keywords=A1286 http://www.taopanel.com/chimei/datasheet/N154C6-L04.pdf Those three 15" models, MacBookPro6,2 / 8,2 / 9,1, are the only ones with i915 graphics and dual channel LVDS, so that list should be complete. And the 8,2 is already in intel_lvds.c. Possible motivation to use dual channel LVDS even on the 1440x900 models: Reduce the number of different parts, i.e. use identical logic boards and display cabling on both versions and the only differing component is the panel. Signed-off-by: Lukas Wunner <lukas@wunner.de> Acked-by: Jani Nikula <jani.nikula@intel.com> Cc: stable@vger.kernel.org [Jani: included notes in the commit message for posterity] Signed-off-by: Jani Nikula <jani.nikula@intel.com>
| | * | | drm/i915: Assume dual channel LVDS if pixel clock necessitates itLukas Wunner2015-05-051-1/+7
| | | |/ | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Single channel LVDS maxes out at 112 MHz, anything above must be dual channel. This avoids the need to specify i915.lvds_channel_mode=2 on all 17" MacBook Pro models with i915 graphics since they had 1920x1200 (193 MHz), plus those 15" pre-retina models which had a resolution of 1680x1050 (119 MHz) as a BTO option. Source for 112 MHz limit of single channel LVDS is section 2.3 of: https://01.org/linuxgraphics/sites/default/files/documentation/ivb_ihd_os_vol3_part4.pdf v2: Avoid hardcoding 17" models by assuming dual channel LVDS if the resolution necessitates it, suggested by Jani Nikula. v3: Fix typo, thanks Joonas Lahtinen. v4: Split commit in two, suggested by Ville Syrjälä. Signed-off-by: Lukas Wunner <lukas@wunner.de> Tested-by: Lukas Wunner <lukas@wunner.de> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: stable@vger.kernel.org [Jani: included spec reference into the commit message] Signed-off-by: Jani Nikula <jani.nikula@intel.com>
| * | | drm: Zero out invalid vblank timestamp in drm_update_vblank_count.Mario Kleiner2015-05-101-5/+4Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since commit 844b03f27739135fe1fed2fef06da0ffc4c7a081 we make sure that after vblank irq off, we return the last valid (vblank count, vblank timestamp) pair to clients, e.g., during modesets, which is good. An overlooked side effect of that commit for kms drivers without support for precise vblank timestamping is that at vblank irq enable, when we update the vblank counter from the hw counter, we can't update the corresponding vblank timestamp, so now we have a totally mismatched timestamp for the new count to confuse clients. Restore old client visible behaviour from before Linux 3.17, but zero out the timestamp at vblank counter update (instead of disable as in original implementation) if we can't generate a meaningful timestamp immediately for the new vblank counter. This will fix this regression, so callers know they need to retry again later if they need a valid timestamp, but at the same time preserves the improvements made in the commit mentioned above. Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com> Cc: <stable@vger.kernel.org> #v3.17+ Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Daniel Vetter <daniel@ffwll.ch> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * | | drm/tegra: Don't use vblank_disable_immediate on incapable driver.Mario Kleiner2015-05-081-1/+0Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tegra would not only need a hardware vblank counter that increments at leading edge of vblank, but also support for instantaneous high precision vblank timestamp queries, ie. a proper implementation of dev->driver->get_vblank_timestamp(). Without these, there can be off-by-one errors during vblank disable/enable if the scanout is inside vblank at en/disable time, and additionally clients will never see any useable vblank timestamps when querying via drmWaitVblank ioctl. This would negatively affect swap scheduling under X11 and Wayland. Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * | | Merge tag 'drm-amdkfd-fixes-2015-05-07' of ↵Dave Airlie2015-05-082-4/+7
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://people.freedesktop.org/~gabbayo/linux into drm-fixes - Add missing initialization of SDMA vm register when creating an SDMA queue - Don't report local memory size, as we don't support local memory allocation yet. - Allow to unregister process with exisiting queues. Until now we blocked it with BUG_ON, which was also an error by itself. * tag 'drm-amdkfd-fixes-2015-05-07' of git://people.freedesktop.org/~gabbayo/linux: drm/amdkfd: Initialize sdma vm when creating sdma queue drm/amdkfd: Don't report local memory size drm/amdkfd: allow unregister process with queues
| | * | | drm/amdkfd: Initialize sdma vm when creating sdma queueXihan Zhang2015-05-071-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes a bug where sdma vm wasn't initialized when an sdma queue was created in HWS mode. This caused GPUVM faults to appear on dmesg and it is one of the causes that SDMA queues are not working. Signed-off-by: Xihan Zhang <xihan.zhang@amd.com> Reviewed-by: Ben Goz <ben.goz@amd.comt> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com> Cc: stable@vger.kernel.org Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | drm/amdkfd: Don't report local memory sizeOded Gabbay2015-05-071-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch sets the local memory size that is reported to userspace to 0. This is done to make sure that userspace won't try to allocate local memory for HSA. As long as amdkfd doesn't support allocating local memory for HSA, we need this patch. Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com> Cc: stable@vger.kernel.org Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | drm/amdkfd: allow unregister process with queuesOded Gabbay2015-05-071-2/+3
| | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Sometimes we might unregister process that have queues, because we couldn't preempt the queues. Until now we blocked it with BUG_ON but instead just print it as debug. Reviewed-by: Ben Goz <ben.goz@amd.com> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com> Cc: stable@vger.kernel.org Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
| * | | Merge branch 'drm-fixes-4.1' of git://people.freedesktop.org/~agd5f/linux ↵Dave Airlie2015-05-0811-87/+190
| |\ \ \ | | |/ / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into drm-fixes Mostly stability fixes for UVD and VCE, plus a few other bug and regression fixes. * 'drm-fixes-4.1' of git://people.freedesktop.org/~agd5f/linux: drm/radeon: stop trying to suspend UVD sessions drm/radeon: more strictly validate the UVD codec drm/radeon: make UVD handle checking more strict drm/radeon: make VCE handle check more strict drm/radeon: fix userptr lockup drm/radeon: fix userptr BO unpin bug v3 drm/radeon: don't setup audio on asics that don't support it drm/radeon: disable semaphores for UVD V1 (v2)
| | * | drm/radeon: stop trying to suspend UVD sessionsChristian König2015-05-072-21/+19Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Saving the current UVD state on suspend and restoring it on resume just doesn't work reliable. Just close cleanup all sessions on suspend. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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