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* ALSA: hda - Export snd_hda_lock_devices()Takashi Iwai2012-05-142-27/+42
| | | | | | | | It's a preliminary work for the vga-switcher support. Export the function to do pseudo-lock for the sound card to be used in other places. Signed-off-by: Takashi Iwai <tiwai@suse.de>
* ALSA: hda - Check the dead HDMI audio controller by vga-switcherooTakashi Iwai2012-05-141-2/+52
| | | | | | | | | | | | | | | | | When a discrete-GPU is disabled by the VGA switcheroo, the corresponding HD-audio controller for HDMI output is also disabled. Such a dead controller still appears in the PCI device list, but you can't access properly any longer (even calling pci_read_config_*() triggers Oops!) which leads the stall of the whole communication of the driver. This patch adds a check of graphics controller at the probe time to see whether it's disabled by vga-switcheroo. If disabled, skip the whole initialization of this controller. Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=43155 Signed-off-by: Takashi Iwai <tiwai@suse.de>
* Merge branch 'topic/hda' into topic/hda-switcherooTakashi Iwai2012-05-1321-1309/+1540
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| * ALSA: hda - Disable FLOAT format supportTakashi Iwai2012-05-121-0/+2
| | | | | | | | | | | | | | | | | | | | It turned out that the FLOAT format on CS4206 results in simple noises, which implies that this is no right format as is. Since CS4206 is the only codec supporting the float, let's disable it until we find the correct format. Reported-and-tested-by: Adrian Knoth <adi@drcomp.erfurt.thur.de> Signed-off-by: Takashi Iwai <tiwai@suse.de>
| * ALSA: hda/conexant - Correct vendor IDs for new codecsTakashi Iwai2012-05-121-6/+9
| | | | | | | | | | | | Never trust datasheet... Signed-off-by: Takashi Iwai <tiwai@suse.de>
| * ALSA: hda - Fix concurrent hash accessesTakashi Iwai2012-05-102-81/+121
| | | | | | | | | | | | | | | | | | | | | | | | | | The amp and caps hashes aren't protected properly for concurrent accesses. Protect them via a new mutex now. But it can't be so simple as originally thought: since the update of a hash table entry itself might trigger the power-up sequence which again accesses the hash table, we can't cover the whole function simply via mutex. Thus the update part has to be split from the mutex and revalidated. Signed-off-by: Takashi Iwai <tiwai@suse.de>
| * ALSA: hda - Protect SPDIF-related stuff via spdif_mutexTakashi Iwai2012-05-102-12/+27
| | | | | | | | | | | | | | Add the missing mutex protection or move into the protected part for SPDIF access codes for codecs. Signed-off-by: Takashi Iwai <tiwai@suse.de>
| * ALSA: hda - Add Conexant CX20751/2/3/4 codec supportTakashi Iwai2012-05-101-0/+6
| | | | | | | | | | | | These are almost compatible with the older Conexant codecs. Signed-off-by: Takashi Iwai <tiwai@suse.de>
| * ALSA: hda - Add the support for Creative SoundCore3DTakashi Iwai2012-05-101-4/+22
| | | | | | | | | | | | | | | | | | The controller is compatible with HD-audio 1.0a with some specific restrictions. - The BDLE entries can't be over 4k boundary - No position-buffer and no MSI Signed-off-by: Takashi Iwai <tiwai@suse.de>
| * ALSA: hda - More robustify the power-up/down sequenceTakashi Iwai2012-05-092-8/+16
| | | | | | | | | | | | | | | | | | | | Check the power_transition up/down state instead of boolean bit, so that the power-up sequence can cancel the pending power-down work properly. Also, by moving cancel_delayed_work_sync() before the actual power-up sequence, make sure that the delayed power-down is completed. Signed-off-by: Takashi Iwai <tiwai@suse.de>
| * ALSA: hda - Remove pre_resume and post_suspend opsTakashi Iwai2012-05-093-27/+0Star
| | | | | | | | | | | | | | | | | | Since the recent commit, the resume procedure is always performed at the resume time. This makes the pre_resume hack for VREF mute LED on some HP laptops superfluous. As this is the only user of pre_resume (and there is no user of post_suspend) ops, let's kill them again. Signed-off-by: Takashi Iwai <tiwai@suse.de>
| * ALSA: hda - Move BIOS pin-parser code to hda_auto_parser.cTakashi Iwai2012-05-0813-675/+690
| | | | | | | | | | | | Just code shuffles. Signed-off-by: Takashi Iwai <tiwai@suse.de>
| * ALSA: hda - Move up the fixup helper functions to the library moduleTakashi Iwai2012-05-085-242/+309
| | | | | | | | | | | | | | Move the fixup helper functions in patch_realtek.c to hda_auto_parser.c so that they can be used in other codec drivers like patch_conexant.c. Signed-off-by: Takashi Iwai <tiwai@suse.de>
| * ALSA: hda - Protect the power-saving count with spinlockTakashi Iwai2012-05-082-2/+22
| | | | | | | | | | | | To avoid some races. Still not perfect, but now a bit safer. Signed-off-by: Takashi Iwai <tiwai@suse.de>
| * ALSA: hda - Clear the power-saving states properly at resetTakashi Iwai2012-05-081-0/+3
| | | | | | | | | | | | | | | | | | Some power-saving states have been left unchanged in snd_hda_codec_reset(), and this is a potential danger because the function may be called in various situations including the continuous operation after that call. Signed-off-by: Takashi Iwai <tiwai@suse.de>
| * ALSA: hda - Always resume the codec immediatelyTakashi Iwai2012-05-083-17/+8Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a fix for the problem in commit 785f857d1c, the pop noise issue on some machines with ALC269. The problem was the uninitialized state after the resume due to the delayed resume of the codec chips. In that commit, we tried to fix by forcibly putting the codec to D3 at suspend. But, this still also leaves the uninitialized state after resume, and it _might_ be still problematic with some BIOS. Since the commit turned out to regress another issues, we reverted it in the end. Now, in this fix, try to fix by turning on the codec immediately at the resume path. We need to take care of the power-saving in this case. When the device is woken up at the power-saved state, it should go power-saving again after the resume. Signed-off-by: Takashi Iwai <tiwai@suse.de>
| * ALSA: hda - Fix possible access to uninitialized work structTakashi Iwai2012-05-081-7/+8
| | | | | | | | | | | | | | The work struct must be initialized before the possible call in the destructor. Signed-off-by: Takashi Iwai <tiwai@suse.de>
| * ALSA: hda/realtek - Call a common helper for alc_spec initializationTakashi Iwai2012-05-081-75/+61Star
| | | | | | | | | | | | Just a clean up by calling the same helper function. Signed-off-by: Takashi Iwai <tiwai@suse.de>
| * Merge branch 'fix/hda' into topic/hdaTakashi Iwai2012-05-0817-87/+285
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| | * Revert "ALSA: hda - Set codec to D3 forcibly even if not used"Takashi Iwai2012-05-082-5/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 785f857d1cb0856b612b46a0545b74aa2596e44a. The commit causes a problem with the wrong D3 state after suspend because the call of hda_set_power_state() involves with the power-up sequence, which changes the power_count, and this confuses the resume sequence that checks the power_count as well. Originally, this go-to-D3 sequence should be a simple task without the power-up sequence. But, it'd need some proper sanity checks in the case of power-saved state, so it's not too easy to write now in the 3.4-rc cycle. In short, the safest option now is to revert this affecting commit. Of course, we need to clean up and robustify the power-saving code better for 3.5 kernel. Reported-by: Konstantin Khlebnikov <khlebnikov@openvz.org> Signed-off-by: Takashi Iwai <tiwai@suse.de>
| | * ALSA: hda/realtek - Call alc_auto_parse_customize_define() always after fixupTakashi Iwai2012-05-081-6/+7
| | | | | | | | | | | | | | | | | | | | | | | | The call for alc_auto_parse_customize_define() must be done after the fixup pre-probe initialization. Otherwise SKU_IGNORE fixup won't work properly (e.g. HP RP5800 with ALC662 codec). Signed-off-by: Takashi Iwai <tiwai@suse.de>
| | * ALSA: hdsp - Provide ioctl_compatAndre Schramm2012-05-081-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | snd_hdsp uses its own ioctls to acquire config- and status information. Expose the corresponding ioctl handler via ioctl_compat, so that 32bit applications can use it on 64bit kernels. Signed-off-by: Andre Schramm <andre.schramm@iosono-sound.com> Reviewed-by: Adrian Knoth <adi@drcomp.erfurt.thur.de> Signed-off-by: Adrian Knoth <adi@drcomp.erfurt.thur.de> Signed-off-by: Takashi Iwai <tiwai@suse.de>
| | * ALSA: hda/realtek - Add missing CD-input pin for MSI-7350 moboTakashi Iwai2012-05-071-0/+1
| | | | | | | | | | | | | | | | | | Reported-by: Philipp Matthias Hahn <pmhahn@pmhahn.de> Cc: <stable@kernel.org> [v3.3+] Signed-off-by: Takashi Iwai <tiwai@suse.de>
| | * ALSA: hda/realtek - Add a fixup for Acer Aspire 5739GTakashi Iwai2012-05-071-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | Acer Aspire 5739G requires the same fix-up for 4930G to support the surround / bass speakers. Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=43180 Signed-off-by: Takashi Iwai <tiwai@suse.de>
| | * ALSA: echoaudio: Remove incorrect part of assertionMark Hills2012-05-061-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This assertion seems to imply that chip->dsp_code_to_load is a pointer. It's actually an integer handle on the actual firmware, and 0 has no special meaning. The assertion prevents initialisation of a Darla20 card, but would also affect other models. It seems it was introduced in commit dd7b254d. ALSA sound/pci/echoaudio/echoaudio.c:2061 Echoaudio driver starting... ALSA sound/pci/echoaudio/echoaudio.c:1969 chip=ebe4e000 ALSA sound/pci/echoaudio/echoaudio.c:2007 pci=ed568000 irq=19 subdev=0010 Init hardware... ALSA sound/pci/echoaudio/darla20_dsp.c:36 init_hw() - Darla20 ------------[ cut here ]------------ WARNING: at sound/pci/echoaudio/echoaudio_dsp.c:478 init_hw+0x1d1/0x86c [snd_darla20]() Hardware name: Dell DM051 BUG? (!chip->dsp_code_to_load || !chip->comm_page) Signed-off-by: Mark Hills <mark@pogo.org.uk> Cc: <stable@kernel.org> Signed-off-by: Takashi Iwai <tiwai@suse.de>
| * | ALSA: hda - Skip pin capability sanity check for bogus valuesTakashi Iwai2012-04-201-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | Some old codecs like ALC880 seem to give a bogus pin capability value 0 occasionally. This breaks the new sanity check in snd_hda_set_pin_ctl(). Skip the sanity checks in such a case. Signed-off-by: Takashi Iwai <tiwai@suse.de>
| * | ALSA: hda - Add snd_hda_get_default_vref() helper functionTakashi Iwai2012-04-2010-58/+56Star
| | | | | | | | | | | | | | | | | | | | | | | | Add a new helper function to guess the default VREF pin control bits for mic in. This can be used to set the pin control value safely matching with the actual pin capabilities. Signed-off-by: Takashi Iwai <tiwai@suse.de>
| * | ALSA: hda - Introduce snd_hda_set_pin_ctl*() helper functionsTakashi Iwai2012-04-2010-117/+125
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For setting the pin-control values more safely to match with the actual pin capability bits, a copule of new helper functions, snd_hda_set_pin_ctl() and snd_hda_set_pin_ctl_cache(), are introduced. These are simple replacement of the codec verb write with AC_VERB_SET_PIN_WIDGET but do more sanity checks and filter out superfluous pin-control bits if they don't fit with the corresponding pin capabilities. Some codecs are screwed up or ignore the command when such a wrong bit is set. These helpers will avoid such secret errors. Signed-off-by: Takashi Iwai <tiwai@suse.de>
| * | Merge branch 'fix/hda' into topic/hdaTakashi Iwai2012-04-1919-53/+167
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: sound/pci/hda/patch_conexant.c Signed-off-by: Takashi Iwai <tiwai@suse.de>
| * | | ALSA: hda - Fix oops caused by recent commit "Fix internal mic for Lenovo ↵David Henningsson2012-04-101-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Ideapad U300s" Make sure we don't dereference the "quirk" pointer when it is null. Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: David Henningsson <david.henningsson@canonical.com> Signed-off-by: Takashi Iwai <tiwai@suse.de>
| * | | Merge branch 'fix/hda' into topic/hdaTakashi Iwai2012-04-075-77/+61Star
| |\ \ \ | | | | | | | | | | | | | | | | | | | | Conflicts: sound/pci/hda/patch_conexant.c
| * | | | ALSA: hda - Fix internal mic for Lenovo Ideapad U300sDavid Henningsson2012-04-051-13/+75
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The internal mic input is phase inverted on one channel. To avoid people in userspace summing the channels together and get zero result, use a separate mixer control for the inverted channel. BugLink: https://bugs.launchpad.net/bugs/903853 Signed-off-by: David Henningsson <david.henningsson@canonical.com> Signed-off-by: Takashi Iwai <tiwai@suse.de>
* | | | | vga_switcheroo: Add the support for audio clientsTakashi Iwai2012-05-132-14/+62
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the support for audio clients to VGA-switcheroo for handling the HDMI audio controller together with VGA switching. The id of the audio controller should be given explicitly at registration time unlike the video controller. Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=43155 Signed-off-by: Takashi Iwai <tiwai@suse.de>
* | | | | vga_switcheroo: Introduce struct vga_switcheroo_client_opsTakashi Iwai2012-05-135-31/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This changes the API as a clean-up. Instead of passing multiple function pointers at each time, introduce a new struct holding the whole callback functions and pass it to the registration. The same struct will be used for the upcoming audio client registration, too. Signed-off-by: Takashi Iwai <tiwai@suse.de>
* | | | | vga_switcheroo: Refactor using linked listTakashi Iwai2012-05-131-99/+110
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Refactor the code base a bit for the further work to adapt more clients. Signed-off-by: Takashi Iwai <tiwai@suse.de>
* | | | | Merge tag 'drm-intel-next-2012-05-06-merged' of ↵Dave Airlie2012-05-1127-2256/+2881
|\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://people.freedesktop.org/~danvet/drm-intel into drm-core-next Daniel says Highlights: - sparse fixes from Ben. - tons of little cleanups from Chris all over: tiling_changed clarification, deferred_free list removal, ... - fix up irq handler on gen2 & gen3 + related cleanups from Chris - prep work for wait_rendering_timeout from Ben with some nice refactorings - first set of infoframe fixes from Paulo for doubleclocked CEA modes - improve pch pll handling from Jesse and Chris - gpu hangman, this also contains the reset fix for gen4 - rps sanity check from Chris - this papers over issues when the gpu fails to clock up on snb/ivb, and it is shockingly easy to hit. The code prints a big WARN backtrace and restores the hw to a sane state. The real fix is still in the works. Atm I'm aware of 2 regressions in -next: - One of the gmbus patches (not gmbus itself) regressed lvds detection on a MacbookPro. I've analyzed the bug already and I think I know what's going on, patch is awaiting test feedback. - Just today QA reported that DP on ilk regressed. That bug is fresh of the press and still awaiting detailed logfiles and the bisect result. The only thing that's clear atm is that -fixes works and -next doesn't.
| * \ \ \ \ Merge remote-tracking branch 'airlied/drm-core-next' into drm-intel-next-queuedDaniel Vetter2012-05-08730-4911/+7683
| |\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Backmerge of drm-next to resolve a few ugly conflicts and to get a few fixes from 3.4-rc6 (which drm-next has already merged). Note that this merge also restricts the stencil cache lra evict policy workaround to snb (as it should) - I had to frob the code anyway because the CM0_MASK_SHIFT define died in the masked bit cleanups. We need the backmerge to get Paulo Zanoni's infoframe regression fix for gm45 - further bugfixes from him touch the same area and would needlessly conflict. Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * | | | | | drm/i915: Support pageflipping interrupts for all 3-pipes on IVBChris Wilson2012-05-062-11/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * | | | | | drm/i915: fix gen4 gpu resetDaniel Vetter2012-05-051-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | While trying to fix up gen4 gpu reset in commit f49f0586191fe16140410db0a46d43bdc690d6af Author: Kenneth Graunke <kenneth@whitecape.org> Date: Sat Sep 11 01:19:14 2010 -0700 drm/i915: Actually set the reset bit in i965_reset a little confusion about when wait_for times out has been introduced - wait for loops _until_ the condition is true. This fixes gpu reset on my gm45, testing with my hangman code shows that it's now fairly reliable - it only died after well over 100 reset cycles. Cc: Eric Anholt <eric@anholt.net> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com> Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * | | | | | drm/i915: remove modeset reset from i915_resetDaniel Vetter2012-05-051-10/+0Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On gen4+ we don't reset the display unit, so resetting the complete modeset state should not be necessary. We can't do reset on gen3 anyway, which leaves us with gen2 reset: According to Chris Wilson, that doesn't work so great, so he suggested we just ignore that. If the need ever arrises, we can re-add it later on. Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * | | | | | drm/i915: also reset the media engine on gen4/5Daniel Vetter2012-05-052-3/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ... we actually use it. Unfortunately we can't reset both at the same time without also resetting the display unit, so do render and media separately. Also replace magic constants with proper #defines. Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * | | | | | drm/i915: kill flags parameter for reset functionsDaniel Vetter2012-05-053-16/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Only half of them even cared, and it's always the same one. Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com> Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * | | | | | drm/i915: make gpu hangman more resilientDaniel Vetter2012-05-051-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - reset the stop_rings infrastructure while resetting the hw to avoid angering the hangcheck right away (and potentially declaring the gpu permanently wedged). - ignore reset failures when hanging due to the hangman - we don't have reset code for all generations. v2: Ensure that we only ignore reset failures when the hw reset is not implemented and not when it failed. Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * | | | | | drm/i915: extract intel_gpu_resetDaniel Vetter2012-05-051-16/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Slightly cleans up the code and could be useful for e.g. Ben Widawsky's hw context patches. v2: New colours! Cc: Ben Widawsky <ben@bwidawsk.net> Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com> Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * | | | | | drm/i915: simplify i915_reset a bitDaniel Vetter2012-05-051-14/+5Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - need_display is always true, scrap it. - don't reacquire the mutex to do nothing after having restored the gem state. Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com> Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * | | | | | drm/i915: allow the existing error_state to be destroyedDaniel Vetter2012-05-051-13/+77
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ... by writing (anything) to i915_error_state. This way we can simulate a bunch of gpu hangs and run the error_state capture code every time (without the need to reload the module). To make that happen we need to abandon the simple seq_file wrappers provided by the drm core. While at it put the new error_state refcounting to some good use and associated the error_state to the debugfs when opening the file. Otherwise the error_state could change while someone is reading it. This should help greatly when we finally get around to split up the giant single seq_file block that the error_state file currently is into smaller parts. v2: Actually squash all the fixes into the patch ... Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com> Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * | | | | | drm/i915: rework dev->first_error lockingDaniel Vetter2012-05-053-10/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - reduce the irq disabled section, even for a debugfs file this was way too long. - always disable irqs when taking the lock. v2: Thou shalt not mistake locking for reference counting, so: - reference count the error_state to protect from concurent freeeing. This will be only really used in the next patch. Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com> Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * | | | | | drm/i915: add interface to simulate gpu hangsDaniel Vetter2012-05-054-0/+73
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | gpu reset is a very important piece of our infrastructure. Unfortunately we only really it test by actually hanging the gpu, which often has bad side-effects for the entire system. And the gpu hang handling code is one of the rather complicated pieces of code we have, consisting of - hang detection - error capture - actual gpu reset - reset of all the gem bookkeeping - reinitialition of the entire gpu This patch adds a debugfs to selectively stopping rings by ceasing to update the hw tail pointer, which will result in the gpu no longer updating it's head pointer and eventually to the hangcheck firing. This way we can exercise the gpu hang code under controlled conditions without a dying gpu taking down the entire systems. Patch motivated by me forgetting to properly reinitialize ppgtt after a gpu reset. Usage: echo $((1 << $ringnum)) > i915_ring_stop # stops one ring echo 0xffffffff > i915_ring_stop # stops all, future-proof version then run whatever testload is desired. i915_ring_stop automatically resets after a gpu hang is detected to avoid hanging the gpu to fast and declaring it wedged. v2: Incorporate feedback from Chris Wilson. v3: Add the missing cleanup. v4: Fix up inconsistent size of ring_stop_read vs _write, noticed by Eugeni Dodonov. Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com> Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * | | | | | drm/i915: use mode values consistently when converting to sdvo dtdDaniel Vetter2012-05-041-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The drm_mode->dtd conversion used the crtc timings, whereas the dtd->drm_mod did not set these. Use the standard mode information, not the crtc timings, in both cases to make these two functions proper inverses of each another. Note that this also kills the risk that we handle interlaced timings inconsistently because the drm core uses half-frames for crtc timings, whereas we need full frames. But interlaced support is pretty decently broken anyway for sdvo encoders, so no big deal. Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * | | | | | drm/i915: rip out unnecessary calls to drm_mode_set_crtcinfoDaniel Vetter2012-05-044-6/+1Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Our handling of the crtc timing computation has been nicely cargo-culted with calls to drm_mode_set_crtcinfo sprinkled all over the place. But with commit f9bef081c3c3f77bec54454872e98d3ec635756f Author: Daniel Vetter <daniel.vetter@ffwll.ch> Date: Sun Apr 15 19:53:19 2012 +0200 drm/i915: don't clobber the special upscaling lvds timings and commit ca9bfa7eed20ea34e862804e62aae10eb159edbb Author: Daniel Vetter <daniel.vetter@ffwll.ch> Date: Sat Jan 28 14:49:20 2012 +0100 drm/i915: fixup interlaced vertical timings confusion, part 1 we now only set the crtc timing fields in the encoder->mode_fixup (lvds only) and in crtc->mode_fixup (for everyone else). And since commit 75c13993db592343bda1fd62f2555fea037d56bd Author: Daniel Vetter <daniel.vetter@ffwll.ch> Date: Sat Jan 28 23:48:46 2012 +0100 drm/i915: fixup overlay checks for interlaced modes the only places we actually need the crtc timings is in the mode_set function. I guess the idea of the drm core is that every time it creates a drm mode, it also sets the timings. But afaics it never uses them, safe for the precise vblank timestamp code (but that can only run on active modes, i.e. after our mode_fixup functions have been called). The problem is that drm core always sets CRTC_INTERLACE_HALVE_V, so the timings are pretty much bogus for us anyway (at least with interlaced support). So I guess it's the drivers job that every active modes needs to have crtc timings that suits it, and with these patches we should have that. drm core doesn't seem to care about modes that just get passed around. Hence we can now safely rip out all the remaining calls to set_crtcinfo left in the driver and clean up this confusion. Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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