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* fsi: Move various master definitions to a common headerBenjamin Herrenschmidt2018-07-122-29/+33
| | | | | | | | | | This moves the definitions for various protocol details (message & response codes, delays etc...) out of fsi-master-gpio.c to fsi-master.h in order to share them with other master implementations. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Reviewed-by: Joel Stanley <joel@jms.id.au>
* fsi: master-gpio: Add missing release functionBenjamin Herrenschmidt2018-07-121-18/+35
| | | | | | | | | | | | | The embedded struct device needs a release function to be able to successfully remove the driver. We remove the devm_gpiod_put() as they are unnecessary (the resources will be released automatically) and because fsi_master_unregister() will cause the master structure to be freed. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Reviewed-by: Joel Stanley <joel@jms.id.au>
* fsi: Don't use device_unregister() in fsi_master_register()Benjamin Herrenschmidt2018-07-121-5/+2Star
| | | | | | | | | | | | | | In the error path of fsi_master_register(), we currently use device_unregister(). This will cause the last reference to the structure to be dropped, thus freeing the enclosing structure, which isn't what the callers want. Use device_del() instead so that we return to the caller with a refcount of 1. The caller can then assume that it must use put_device() after a call to fsi_master_register() regardless of whether the latter suceeded or failed. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* fsi: master-gpio: Remove "GPIO" prefix on some definitionsBenjamin Herrenschmidt2018-07-121-34/+36
| | | | | | | | | | | | | Some definitions are generic to the FSI protocol or any give master implementation. Rename them to remove the "GPIO" prefix in preparation for moving them to a common header. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Reviewed-by: Joel Stanley <joel@jms.id.au> # Conflicts: # drivers/fsi/fsi-master-gpio.c
* fsi: master-gpio: Remove unused definitionsBenjamin Herrenschmidt2018-07-121-6/+0Star
| | | | | Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Reviewed-by: Joel Stanley <joel@jms.id.au>
* fsi: master-gpio: Add more tracepointsBenjamin Herrenschmidt2018-07-122-6/+69
| | | | | | | | | | | This adds a few more tracepoints that have proven useful when debugging issues with the FSI bus. This also makes echo_delay() use clock_zeros() instead of open-code it in order to share the tracepoint. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Reviewed-by: Joel Stanley <joel@jms.id.au>
* fsi: master-gpio: Add support for link_configBenjamin Herrenschmidt2018-07-121-2/+25
| | | | | | | To configure the send and echo delays Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Reviewed-by: Joel Stanley <joel@jms.id.au>
* fsi: master-gpio: Rename and adjust send delayBenjamin Herrenschmidt2018-07-121-3/+6
| | | | | | | | | What the driver called "FSI_GPIO_PRIME_SLAVE_CLOCKS" is what the FSI spec calls tSendDelay and should be 16 clocks by default. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Reviewed-by: Joel Stanley <joel@jms.id.au>
* fsi: Add mechanism to set the tSendDelay and tEchoDelay valuesBenjamin Herrenschmidt2018-07-122-18/+93
| | | | | | | | | | | | | | | Those values control the amount of "dummy" clocks between commands and between a command and its response. This adds a way to configure them from sysfs (to be later extended to defaults in the device-tree). The default remains 16 (the HW default). This is only supported if the backend supports the new link_config() callback to configure the generation of those delays. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Reviewed-by: Joel Stanley <joel@jms.id.au> ---
* fsi: Move code around to avoid forward declarationBenjamin Herrenschmidt2018-07-121-48/+46Star
| | | | | | | | Move fsi_slave_set_smode() and its helpers to before it's first user and remove the corresponding forward declaration. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Reviewed-by: Joel Stanley <joel@jms.id.au>
* fsi: sbefifo: Fix checker warning about late NULL checkBenjamin Herrenschmidt2018-07-121-2/+5
| | | | | | | "dev" is dereferences before it's checked. Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* fsi/sbefifo: Add dependency on OF_ADDRESSGuenter Roeck2018-07-121-0/+1
| | | | | | | | | | | | | The driver calls of_platform_device_create() which is only available if OF_ADDRESS is enabled. When building sparc64 images, this results in ERROR: "of_platform_device_create" [drivers/fsi/fsi-sbefifo.ko] undefined! Fixes: 9f4a8a2d7f9d ("fsi/sbefifo: Add driver for the SBE FIFO") Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* fsi: sbefifo: Add missing mutex_unlockEddie James2018-07-121-0/+1
| | | | | | | | There was no unlock of the FFDC mutex. Fixes: 9f4a8a2d7f9d ("fsi/sbefifo: Add driver for the SBE FIFO") Signed-off-by: Eddie James <eajames@linux.vnet.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* fsi: scom: Major overhaulBenjamin Herrenschmidt2018-06-182-30/+452
| | | | | | | | | | | | | | | This was too hard to split ... this adds a number of features to the SCOM user interface: - Support for indirect SCOMs - read()/write() interface now handle errors and retries - New ioctl() "raw" interface for use by debuggers Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Reviewed-by: Eddie James <eajames@linux.vnet.ibm.com> Reviewed-by: Alistair Popple <alistair@popple.id.au>
* fsi: scom: Add register definitionsBenjamin Herrenschmidt2018-06-181-1/+18
| | | | | | | | Add a few more register and bit definitions, also define and use SCOM_READ_CMD (which is 0 but it makes the code clearer) Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Reviewed-by: Eddie James <eajames@linux.vnet.ibm.com>
* fsi: scom: Fixup endian annotationsBenjamin Herrenschmidt2018-06-181-5/+4Star
| | | | | | | | Use the proper annotated type __be32 and fixup the accessor used for get_scom() Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Reviewed-by: Eddie James <eajames@linux.vnet.ibm.com>
* fsi: scom: Whitespace fixesBenjamin Herrenschmidt2018-06-181-4/+4
| | | | | | | No functional changes Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Reviewed-by: Eddie James <eajames@linux.vnet.ibm.com>
* fsi: scom: Add mutex around FSI2PIB accessesBenjamin Herrenschmidt2018-06-181-7/+18
| | | | | | | | | Otherwise, multiple clients can open the driver and attempt to access the PIB at the same time, thus clobbering each other in the process. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Reviewed-by: Eddie James <eajames@linux.vnet.ibm.com>
* fsi: core: Fix sparse warningsJoel Stanley2018-06-181-10/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | fsi-core.c:210:9: warning: cast to restricted __be32 fsi-core.c:210:9: warning: cast to restricted __be32 fsi-core.c:210:9: warning: cast to restricted __be32 fsi-core.c:210:9: warning: cast to restricted __be32 fsi-core.c:210:9: warning: cast to restricted __be32 fsi-core.c:210:9: warning: cast to restricted __be32 fsi-core.c:210:9: warning: cast to restricted __be32 fsi-core.c:210:9: warning: cast to restricted __be32 fsi-core.c:210:9: warning: cast to restricted __be32 fsi-core.c:210:9: warning: cast to restricted __be32 fsi-core.c:210:9: warning: cast to restricted __be32 fsi-core.c:210:9: warning: cast to restricted __be32 fsi-core.c:606:15: warning: incorrect type in assignment (different base types) fsi-core.c:606:15: expected unsigned int [unsigned] [assigned] [usertype] smode fsi-core.c:606:15: got restricted __be32 [usertype] <noident> fsi-core.c:492:28: warning: expression using sizeof(void) fsi-core.c:520:29: warning: expression using sizeof(void) fsi-core.c:682:19: warning: cast to restricted __be32 fsi-core.c:682:19: warning: cast to restricted __be32 fsi-core.c:682:19: warning: cast to restricted __be32 fsi-core.c:682:19: warning: cast to restricted __be32 fsi-core.c:682:19: warning: cast to restricted __be32 fsi-core.c:682:19: warning: cast to restricted __be32 fsi-core.c:706:24: warning: incorrect type in assignment (different base types) fsi-core.c:706:24: expected unsigned int [unsigned] [usertype] llmode fsi-core.c:706:24: got restricted __be32 [usertype] <noident> Signed-off-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* fsi: master-hub: Fix sparse warningsJoel Stanley2018-06-181-2/+3
| | | | | | | | | | | | fsi-master-hub.c:128:13: warning: incorrect type in assignment (different base types) fsi-master-hub.c:128:13: expected unsigned int [unsigned] [usertype] cmd fsi-master-hub.c:128:13: got restricted __be32 [usertype] <noident> fsi-master-hub.c:208:13: warning: incorrect type in assignment (different base types) fsi-master-hub.c:208:13: expected restricted __be32 [addressable] [assigned] [usertype] reg fsi-master-hub.c:208:13: got int Signed-off-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* fsi: sbefifo: Fix sparse warningsJoel Stanley2018-06-181-2/+3
| | | | | | | | | | | | | | | fsi-sbefifo.c:547:58: warning: incorrect type in argument 2 (different base types) fsi-sbefifo.c:547:58: expected restricted __be32 [usertype] *word fsi-sbefifo.c:547:58: got unsigned int *<noident> fsi-sbefifo.c:635:16: warning: incorrect type in assignment (different base types) fsi-sbefifo.c:635:16: expected unsigned int [unsigned] <noident> fsi-sbefifo.c:635:16: got restricted __be32 [usertype] <noident> fsi-sbefifo.c:636:16: warning: incorrect type in assignment (different base types) fsi-sbefifo.c:636:16: expected unsigned int [unsigned] <noident> fsi-sbefifo.c:636:16: got restricted __be32 [usertype] <noident> Signed-off-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* fsi: sbefifo: Remove unneeded semicolonBenjamin Herrenschmidt2018-06-141-1/+1
| | | | | | Spotted by kbuild-test-bot Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* fsi/sbefifo: Add driver for the SBE FIFOBenjamin Herrenschmidt2018-06-124-0/+1046
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This driver provides an in-kernel and a user API for accessing the command FIFO of the SBE (Self Boot Engine) of the POWER9 processor, via the FSI bus. It provides an in-kernel interface to submit command and receive responses, along with a helper to locate and analyse the response status block. It's a simple synchronous submit() type API. The user interface uses the write/read interface that an earlier version of this driver already provided, however it has some specific limitations in order to keep the driver simple and avoid using up a lot of kernel memory: - The user should perform a single write() with the command and a single read() to get the response (with a buffer big enough to hold the entire response). - On a write() the command is simply "stored" into a kernel buffer, it is submitted as one operation on the subsequent read(). This allows to have the code write directly from the FIFO into the user buffer and avoid hogging the SBE between the write() and read() syscall as it's critical that the SBE be freed asap to respond to the host. An extra write() will simply replace the previously written command. - A write of a single 4 bytes containing the value 0x52534554 in big endian will trigger a reset request. No read is necessary, the write() call will return when the reset has been acknowledged or times out. - The command is limited to 4K bytes. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Tested-by: Joel Stanley <joel@jms.id.au> ---
* fsi: scom: Remove PIB reset during probeEddie James2018-06-121-8/+0Star
| | | | | | | | | | The PIB reset causes problems for the running P9 chip. The reset shouldn't be performed by this driver. Signed-off-by: Eddie James <eajames@linux.vnet.ibm.com> Reviewed-by: Christopher Bostic <cbostic@linux.vnet.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Tested-by: Joel Stanley <joel@jms.id.au>
* fsi/master-gpio: Replace bit_bit lock with IRQ disable/enableJeremy Kerr2018-06-121-25/+23Star
| | | | | | | | | | | | | | | | We currently use a spinlock (bit_lock) around operations that clock bits out of the FSI bus, and a mutex to protect against simultaneous access to the master. This means that bit_lock isn't needed for mutual exlusion, only to prevent timing issues when clocking bits out. To reflect this, this change converts bit_lock to just the local_irq_save/restore operation. Signed-off-by: Jeremy Kerr <jk@ozlabs.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Tested-by: Joel Stanley <joel@jms.id.au>
* fsi/fsi-master-gpio: More error handling cleanupBenjamin Herrenschmidt2018-06-121-21/+5Star
| | | | | | | | | Remove calls to the empty and useless fsi_master_gpio_error() function, and report CRC errors as "FSI_ERR_NO_SLAVE" when reading an all 1's response. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Tested-by: Joel Stanley <joel@jms.id.au>
* fsi/fsi-master-gpio: Implement CRC error recoveryBenjamin Herrenschmidt2018-06-122-18/+99
| | | | | | | | | | | | | | | | | | | | | The FSI protocol defines two modes of recovery from CRC errors, this implements both: - If the device returns an ECRC (it detected a CRC error in the command), then we simply issue the command again. - If the master detects a CRC error in the response, we send an E_POLL command which requests a resend of the response without actually re-executing the command (which could otherwise have unwanted side effects such as dequeuing a FIFO twice). Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Reviewed-by: Christopher Bostic <cbostic@linux.vnet.ibm.com> Tested-by: Joel Stanley <joel@jms.id.au> --- Note: This was actually tested by removing some of my fixes, thus causing us to hit occasional CRC errors during high LPC activity.
* fsi/gpio: Use relative-addressing commandsJeremy Kerr2018-06-121-11/+91
| | | | | | | | | | | | FSI CFAMs support shorter commands that use a relative (or same) address as the last. This change introduces a last_addr to the master state, and uses it for subsequent reads/writes, and performs relative addressing when a subsequent read/write is in range. Signed-off-by: Jeremy Kerr <jk@ozlabs.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Reviewed-by: Christopher Bostic <cbostic@linux.vnet.ibm.com> Tested-by: Joel Stanley <joel@jms.id.au>
* fsi/gpio: Include command build in locked sectionJeremy Kerr2018-06-121-7/+18
| | | | | | | | | | For implementing relative addressing mode, we'll need to build a command that is coherent with CFAM state. To do that, include the build_command_* functions in the locked section of read/write/term. Signed-off-by: Jeremy Kerr <jk@ozlabs.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Tested-by: Joel Stanley <joel@jms.id.au>
* fsi/fsi-master-gpio: Delay sampling of FSI data inputBenjamin Herrenschmidt2018-06-121-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | Most SoC GPIO implementations, including the Aspeed one, have synchronizers on the GPIO inputs. This means that the value read from a GPIO is a couple of clocks old, from whatever clock source feeds those synchronizers. In practice, this means that in no-delay mode, we are using a value that can potentially be a bit too old and too close to the clock edge establishing the data on the other side of the link. The voltage converters we use on some systems make this worse and sensitive to things like voltage fluctuations etc... This is, we believe, the cause of occasional CRC errors encountered during heavy activity on the LPC bus. This is fixed by introducing a dummy GPIO read before the actual data read. It slows down SBEFIFO by about 15% (less than any delay primitive) and the end result is so far solid. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Reviewed-by: Christopher Bostic <cbostic@linux.vnet.ibm.com> Tested-by: Joel Stanley <joel@jms.id.au>
* fsi/fsi-master-gpio: Reduce dpoll clocksBenjamin Herrenschmidt2018-06-121-2/+3
| | | | | | | | | | | | | | | | | FSI_GPIO_DPOLL_CLOCKS is the number of clocks before sending a DPOLL command after receiving a BUSY status. It should be at least tSendDelay (16 clocks). According to comments in the code, it needs to also be at least 21 clocks due to HW issues. It's currently 100 clocks which impacts performances negatively in some cases. Reduces it in half to 50 clocks which seems to still be solid. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Reviewed-by: Christopher Bostic <cbostic@linux.vnet.ibm.com> Tested-by: Joel Stanley <joel@jms.id.au>
* fsi/fsi-master-gpio: Reduce turnaround clocksBenjamin Herrenschmidt2018-06-121-1/+1
| | | | | | | | | | | | | | | | | FSI_GPIO_PRIME_SLAVE_CLOCKS is the number of clocks if the "idle" phase between the end of a response and the beginning of the next one. It corresponds to tSendDelay in the FSI specification. The default value in the slave is 16 clocks. 100 is way overkill and significantly reduces the driver performance. This changes it to 20 (which gives the HW a bit of margin still just in case). Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Reviewed-by: Christopher Bostic <cbostic@linux.vnet.ibm.com> Tested-by: Joel Stanley <joel@jms.id.au>
* fsi/fsi-master-gpio: Add "no-gpio-delays" optionBenjamin Herrenschmidt2018-06-124-4/+19
| | | | | | | | | | | | | | | | | This adds support for an optional device-tree property that makes the driver skip all the delays around clocking the GPIOs and set it in the device-tree of common POWER9 based OpenPower platforms. This useful on chips like the AST2500 where the GPIO block is running at a fairly low clock frequency (25Mhz typically). In this case, the delays are unnecessary and due to the low precision of the timers, actually quite harmful in terms of performance. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Reviewed-by: Christopher Bostic <cbostic@linux.vnet.ibm.com> Tested-by: Joel Stanley <joel@jms.id.au>
* fsi/fsi-master-gpio: Sample input data on different clock phaseBenjamin Herrenschmidt2018-06-121-3/+5
| | | | | | | | | | | | | | We currently sample the input data right after we toggle the clock low, then high. The slave establishes the data on the rising edge, so this is not ideal. We should sample it on the low phase instead. This currently works because we have an extra delay, but subsequent patches will remove it. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Reviewed-by: Christopher Bostic <cbostic@linux.vnet.ibm.com> Tested-by: Joel Stanley <joel@jms.id.au>
* fsi: gpio: Use a mutex to protect transfersJeremy Kerr2018-06-121-22/+64
| | | | | | | | | | | Reduce time spent with interrupts disabled by limiting the critical sections to bitbanging FSI symbols. We only need to ensure exclusive use of the bus for an entire transfer, not that the transfer be performed in atomic context. Signed-off-by: Jeremy Kerr <jk@ozlabs.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Tested-by: Joel Stanley <joel@jms.id.au>
* fsi: gpio: Remove unused 'id' variableAndrew Jeffery2018-06-121-2/+1Star
| | | | | | Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Tested-by: Joel Stanley <joel@jms.id.au>
* fsi: gpio: Trace busy countAndrew Jeffery2018-06-122-0/+19
| | | | | | | | | | | | An observation from trace output of the existing FSI tracepoints was that the remote device was sometimes reporting as busy. Add a new tracepoint reporting the busy count in order to get a better grip on how often this is the case. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Acked-by: Eddie James <eajames@linux.vnet.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Tested-by: Joel Stanley <joel@jms.id.au>
* Merge tag 'armsoc-late' of ↵Linus Torvalds2018-06-1268-3409/+8943
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC late updates from Olof Johansson: "This is a branch with a few merge requests that either came in late, or took a while longer for us to review and merge than usual and thus cut it a bit close to the merge window. We stage them in a separate branch and if things look good, we still send them up -- and that's the case here. This is mostly DT additions for Renesas platforms, adding IP block descriptions for existing and new SoCs. There are also some driver updates for Qualcomm platforms for SMEM/QMI and GENI, which is their generalized serial protocol interface" * tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (186 commits) soc: qcom: smem: introduce qcom_smem_virt_to_phys() soc: qcom: qmi: fix a buffer sizing bug MAINTAINERS: Update pattern for qcom_scm soc: Unconditionally include qcom Makefile soc: qcom: smem: check sooner in qcom_smem_set_global_partition() soc: qcom: smem: fix qcom_smem_set_global_partition() soc: qcom: smem: fix off-by-one error in qcom_smem_alloc_private() soc: qcom: smem: byte swap values properly soc: qcom: smem: return proper type for cached entry functions soc: qcom: smem: fix first cache entry calculation soc: qcom: cmd-db: Make endian-agnostic drivers: qcom: add command DB driver arm64: dts: renesas: salvator-common: Add ADV7482 support ARM: dts: r8a7740: Add CEU1 ARM: dts: r8a7740: Add CEU0 arm64: dts: renesas: salvator-common: enable VIN arm64: dts: renesas: r8a77970: add VIN and CSI-2 nodes arm64: dts: renesas: r8a77965: add VIN and CSI-2 nodes arm64: dts: renesas: r8a7796: add VIN and CSI-2 nodes arm64: dts: renesas: r8a7795-es1: add CSI-2 node ...
| * Merge tag 'renesas-dt-for-v4.18' of ↵Olof Johansson2018-06-0227-554/+1235
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/late Renesas ARM Based SoC DT Updates for v4.18 * R-Mobile A1 (r8a7740) SoC - Describe CEU, IRQC, SYS-DMAC and USB devices - Cleanup for consistency with other Renesas SoCs and enhanced maintainability * RZ/A1H (r7s72100) SoC - Describe CEU device * R-Car Gen2, RZ/G1 and RZ/A1H SoCs - Add PMU device nodes * RZ/A1H (r7s72100) SoC - Correct interrupt types * R-Mobile APE6 (r8a73a4) APE4EVM board and SH-Mobile AG5 (sh73a0) SoC - Use generic disable-wp instead of now deprecated toshiba,mmc-wrprotect-disable property * EMMA Mobile EV2 (emev2) and SH-Mobile AG5 (sh73a0) SoCs - Add missing interrupt-affinity to PMU * R-Car H2 (r8a7790) and R-Mobile APE6 (r8a73a4) SoCs - Correct mask for GIC PPI interrupts * R-Car H2 (r8a7790), M2-W (r8a7791), M2-N (r8a7793) and E2 (r8a7794) SoCs - Describe FDP1 instances * R-Car Gen2 and RZ/G1 SoCs - Describe watchdog devices - For R-Car Gen2 this involves updating the SMP routine side as it is changed by a driver updated to allow watchdog device support * Alt board for R-Car E2 (r8a7794) SoC * RBoards for -Car Gen2 SoCs and kzm9d board for EMMA Mobile EV2 (emev2) SoC * iW-RainboW-G23S board for RZ/G1C (r8a77470) SoC - Initial SoC and board support - Enable EtherAVB - Describe all SCIF devices * Boards for R-Car Gen2 SoCs - Enable watchdog support * Wheat board for V2H (r8a7792) SoC - Correct ADV7513 address usage * tag 'renesas-dt-for-v4.18' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (69 commits) ARM: dts: r8a7740: Add CEU1 ARM: dts: r8a7740: Add CEU0 ARM: dts: r8a7745: Add PMU device node ARM: dts: r8a7743: Add PMU device node ARM: dts: r8a7794: Add PMU device node ARM: dts: r8a7793: Add PMU device node ARM: dts: r8a7792: Add PMU device node ARM: dts: r8a7791: Add PMU device node ARM: dts: r8a7790: Add PMU device nodes ARM: dts: r7s72100: Add PMU device node ARM: dts: r7s72100: Correct RTC interrupt types ARM: dts: r7s72100: Correct watchdog timer interrupt type ARM: dts: emev2: Add missing interrupt-affinity to PMU node ARM: dts: sh73a0: Add missing interrupt-affinity to PMU node ARM: dts: r8a73a4: Correct mask for GIC PPI interrupts ARM: dts: r8a7790: Correct mask for GIC PPI interrupts ARM: shmobile: r8a7794: alt: add EEPROM to DTS ARM: dts: kzm9d: Drop unnecessary address properties from gpio_keys node ARM: dts: silk: Drop unnecessary address properties from vin port node ARM: dts: alt: Drop unnecessary address properties from vin port node ... Signed-off-by: Olof Johansson <olof@lixom.net>
| | * ARM: dts: r8a7740: Add CEU1Simon Horman2018-05-161-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | Describe CEU1 peripheral for Renesas R-Mobile A1 R8A7740 Soc. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
| | * ARM: dts: r8a7740: Add CEU0Jacopo Mondi2018-05-161-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Describe CEU0 peripheral for Renesas R-Mobile A1 R8A7740 Soc. Reported-by: Geert Uytterhoeven <geert@glider.be> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> [simon: dropped clock-names property] Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * ARM: dts: r8a7745: Add PMU device nodeGeert Uytterhoeven2018-05-141-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable support for the ARM Performance Monitor Units in the Cortex-A7 CPU cores on RZ/G1E by adding a device node for the PMU. New Linux output: hw perfevents: enabled with armv7_cortex_a7 PMU driver, 5 counters available Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * ARM: dts: r8a7743: Add PMU device nodeGeert Uytterhoeven2018-05-141-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable support for the ARM Performance Monitor Units in the Cortex-A15 CPU cores on RZ/G1M by adding a device node for the PMU. New Linux output: hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * ARM: dts: r8a7794: Add PMU device nodeGeert Uytterhoeven2018-05-141-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable support for the ARM Performance Monitor Units in the Cortex-A7 CPU cores on R-Car E2 by adding a device node for the PMU. New Linux output: hw perfevents: enabled with armv7_cortex_a7 PMU driver, 5 counters available Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * ARM: dts: r8a7793: Add PMU device nodeGeert Uytterhoeven2018-05-141-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable support for the ARM Performance Monitor Units in the Cortex-A15 CPU cores on R-Car M2-N by adding a device node for the PMU. New Linux output: hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * ARM: dts: r8a7792: Add PMU device nodeGeert Uytterhoeven2018-05-141-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable support for the ARM Performance Monitor Units in the Cortex-A15 CPU cores on R-Car V2H by adding a device node for the PMU. New Linux output: hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * ARM: dts: r8a7791: Add PMU device nodeGeert Uytterhoeven2018-05-141-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable support for the ARM Performance Monitor Units in the Cortex-A15 CPU cores on R-Car M2-W by adding a device node for the PMU. New Linux output: hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * ARM: dts: r8a7790: Add PMU device nodesGeert Uytterhoeven2018-05-141-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable support for the ARM Performance Monitor Units in the Cortex-A15 and Cortex-A7 CPU cores on R-Car H2 by adding device nodes for the two PMUs. New Linux output: hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available hw perfevents: /pmu-1: failed to probe PMU! hw perfevents: /pmu-1: failed to register PMU devices! The last two lines are due to the Cortex-A7 CPU cores being described in DT, but not enabled by the firmware. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * ARM: dts: r7s72100: Add PMU device nodeGeert Uytterhoeven2018-05-141-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable support for the ARM Performance Monitor Units in the Cortex-A9 CPU core on RZ/A1H by adding a device node for the PMU. New Linux output: hw perfevents: enabled with armv7_cortex_a9 PMU driver, 7 counters available Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * ARM: dts: r7s72100: Correct RTC interrupt typesGeert Uytterhoeven2018-05-141-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | According to table 7.3 ("List of Interrupt IDs") in the RZ/A1H Hardware User's Manual rev. 3.00, the realtime clock interrupts are level not edge interrupts. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
generated by cgit v1.2.3-55-g7522 (git 2.39.0) at 2024-10-01 17:55:45 +0200