| Commit message (Collapse) | Author | Age | Files | Lines |
|---|
| |
|
|
|
|
|
|
|
|
|
|
| |
The TAS5086 has two power domains, DVDD and AVDD. Enable them both as
long as the codec is in use.
Also, switch on the power to identify the chip at device probe level,
and switch it off again afterwards. The codec level will take care for
power handling later.
Signed-off-by: Daniel Mack <zonque@gmail.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
|
| |
|
|
|
|
|
|
|
|
|
|
|
| |
The TAS5086 has two alternative modes to start its PWM channels, Mid-Z
and Low-Z. Which one to use depends on how the PWM power stages are
connected to the TAS5086.
This patch adds 6 optional boolean properties to the DT bindings of the
driver which allow the user to configure each individual channel to the
Mid-Z scheme, and leaves all the others to the default (Low-Z).
Signed-off-by: Daniel Mack <zonque@gmail.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
|
|
|
This patch adds a driver for TI's TA5086 6-channel PWM processor.
This chip has a very unusual register layout, specifically because the
registers are of unequal size, and multi-byte registers require bulk
writes to take effect. Regmap does not support these kind of mappings.
Currently, the driver does not touch any of the registers >= 0x20, so
it doesn't matter, because the register map is mapped to an 8-bit array.
In case more features will be added in the future that require access
to higher registers, the entire regmap H/W I/O routines have to be
open-coded.
Signed-off-by: Daniel Mack <zonque@gmail.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
|
