| Commit message (Collapse) | Author | Age | Files | Lines |
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git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm
Pull more power management and ACPI updates from Rafael Wysocki:
"The second batch of power management and ACPI updates for v4.6.
Included are fixups on top of the previous PM/ACPI pull request and
other material that didn't make into it but still should go into 4.6.
Among other things, there's a fix for an intel_pstate driver issue
uncovered by recent cpufreq changes, a workaround for a boot hang on
Skylake-H related to the handling of deep C-states by the platform and
a PCI/ACPI fix for the handling of IO port resources on non-x86
architectures plus some new device IDs and similar.
Specifics:
- Fix for an intel_pstate driver issue related to the handling of MSR
updates uncovered by the recent cpufreq rework (Rafael Wysocki).
- cpufreq core cleanups related to starting governors and frequency
synchronization during resume from system suspend and a locking fix
for cpufreq_quick_get() (Rafael Wysocki, Richard Cochran).
- acpi-cpufreq and powernv cpufreq driver updates (Jisheng Zhang,
Michael Neuling, Richard Cochran, Shilpasri Bhat).
- intel_idle driver update preventing some Skylake-H systems from
hanging during initialization by disabling deep C-states mishandled
by the platform in the problematic configurations (Len Brown).
- Intel Xeon Phi Processor x200 support for intel_idle
(Dasaratharaman Chandramouli).
- cpuidle menu governor updates to make it always honor PM QoS
latency constraints (and prevent C1 from being used as the fallback
C-state on x86 when they are set below its exit latency) and to
restore the previous behavior to fall back to C1 if the next timer
event is set far enough in the future that was changed in 4.4 which
led to an energy consumption regression (Rik van Riel, Rafael
Wysocki).
- New device ID for a future AMD UART controller in the ACPI driver
for AMD SoCs (Wang Hongcheng).
- Rockchip rk3399 support for the rockchip-io-domain adaptive voltage
scaling (AVS) driver (David Wu).
- ACPI PCI resources management fix for the handling of IO space
resources on architectures where the IO space is memory mapped
(IA64 and ARM64) broken by the introduction of common ACPI
resources parsing for PCI host bridges in 4.4 (Lorenzo Pieralisi).
- Fix for the ACPI backend of the generic device properties API to
make it parse non-device (data node only) children of an ACPI
device correctly (Irina Tirdea).
- Fixes for the handling of global suspend flags (introduced in 4.4)
during hibernation and resume from it (Lukas Wunner).
- Support for obtaining configuration information from Device Trees
in the PM clocks framework (Jon Hunter).
- ACPI _DSM helper code and devfreq framework cleanups (Colin Ian
King, Geert Uytterhoeven)"
* tag 'pm+acpi-4.6-rc1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (23 commits)
PM / AVS: rockchip-io: add io selectors and supplies for rk3399
intel_idle: Support for Intel Xeon Phi Processor x200 Product Family
intel_idle: prevent SKL-H boot failure when C8+C9+C10 enabled
ACPI / PM: Runtime resume devices when waking from hibernate
PM / sleep: Clear pm_suspend_global_flags upon hibernate
cpufreq: governor: Always schedule work on the CPU running update
cpufreq: Always update current frequency before startig governor
cpufreq: Introduce cpufreq_update_current_freq()
cpufreq: Introduce cpufreq_start_governor()
cpufreq: powernv: Add sysfs attributes to show throttle stats
cpufreq: acpi-cpufreq: make Intel/AMD MSR access, io port access static
PCI: ACPI: IA64: fix IO port generic range check
ACPI / util: cast data to u64 before shifting to fix sign extension
cpufreq: powernv: Define per_cpu chip pointer to optimize hot-path
cpuidle: menu: Fall back to polling if next timer event is near
cpufreq: acpi-cpufreq: Clean up hot plug notifier callback
intel_pstate: Do not call wrmsrl_on_cpu() with disabled interrupts
cpufreq: Make cpufreq_quick_get() safe to call
ACPI / property: fix data node parsing in acpi_get_next_subnode()
ACPI / APD: Add device HID for future AMD UART controller
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This adds the necessary data for handling io voltage domains on the rk3399.
As interesting tidbit, the rk3399 contains two separate iodomain areas.
One in the regular General Register Files (GRF) and one in PMUGRF in the
pmu power domain.
Signed-off-by: David Wu <david.wu@rock-chips.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux
Pull more RTC updates from Alexandre Belloni:
"A second pull request for v4.6 with a few fixesi before -rc1. The new
features for abx80x actually make the RTC behave correctly.
Drivers:
- abx80x: handle both XT and RC oscillators, XT failure bit and
autocalibration
- m41t80: avoid out of range year values
- rv8803: workaround an i2c HW issue"
* tag 'rtc-4.6-2' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux:
rtc: abx80x: handle the oscillator failure bit
rtc: abx80x: handle autocalibration
rtc: rv8803: workaround i2c HW issue
rtc: mcp795: add devicetree support
rtc: asm9260: remove incorrect __init/__exit annotations
rtc: m41t80: avoid out of range year values
rtc: s3c: Don't print an error on probe deferral
rtc: rv3029: stop mentioning rv3029c2
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Add device tree support to the rtc-mcp795 driver.
Signed-off-by: Emil Bartczak <emilbart@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
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Pull MTD updates from Brian Norris:
"NAND:
- Add sunxi_nand randomizer support
- begin refactoring NAND ecclayout structs
- fix pxa3xx_nand dmaengine usage
- brcmnand: fix support for v7.1 controller
- add Qualcomm NAND controller driver
SPI NOR:
- add new ls1021a, ls2080a support to Freescale QuadSPI
- add new flash ID entries
- support bottom-block protection for Winbond flash
- support Status Register Write Protect
- remove broken QPI support for Micron SPI flash
JFFS2:
- improve post-mount CRC scan efficiency
General:
- refactor bcm63xxpart parser, to later extend for NAND
- add writebuf size parameter to mtdram
Other minor code quality improvements"
* tag 'for-linus-20160324' of git://git.infradead.org/linux-mtd: (72 commits)
mtd: nand: remove kerneldoc for removed function parameter
mtd: nand: Qualcomm NAND controller driver
dt/bindings: qcom_nandc: Add DT bindings
mtd: nand: don't select chip in nand_chip's block_bad op
mtd: spi-nor: support lock/unlock for a few Winbond chips
mtd: spi-nor: add TB (Top/Bottom) protect support
mtd: spi-nor: add SPI_NOR_HAS_LOCK flag
mtd: spi-nor: use BIT() for flash_info flags
mtd: spi-nor: disallow further writes to SR if WP# is low
mtd: spi-nor: make lock/unlock bounds checks more obvious and robust
mtd: spi-nor: silently drop lock/unlock for already locked/unlocked region
mtd: spi-nor: wait for SR_WIP to clear on initial unlock
mtd: nand: simplify nand_bch_init() usage
mtd: mtdswap: remove useless if (!mtd->ecclayout) test
mtd: create an mtd_oobavail() helper and make use of it
mtd: kill the ecclayout->oobavail field
mtd: nand: check status before reporting timeout
mtd: bcm63xxpart: give width specifier an 'int', not 'size_t'
mtd: mtdram: Add parameter for setting writebuf size
mtd: nand: pxa3xx_nand: kill unused field 'drcmr_cmd'
...
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Add DT bindings document for the Qualcomm NAND controller driver.
Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Add optional properties for QSPI:
big-endian
if the register is big endian on this platform.
Signed-off-by: Yuan Yao <yao.yuan@nxp.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Han xu <han.xu@nxp.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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new compatible string: "fsl,ls2080a-qspi".
Signed-off-by: Yuan Yao <yao.yuan@nxp.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Han xu <han.xu@nxp.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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As the SAMA5D2 controller supports the 32-bit ECC strength, accept it
as a valid setting when required by the device tree or the NAND
parameter page.
Then configure the controller to use this new setting.
For the binding:
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Romain Izard <romain.izard.pro@gmail.com>
Tested-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Starting with the SAMA5D2, there is a new revision of the Atmel PMECC
controller that can correct 32 bits in each sector. This controller is
not 100% compatible with the previous revision that corrected a maximum
of 24 bits by sector, as some register addresses overlap.
Using information from the device tree, we can configure the driver to
work with both versions.
For the binding:
Acked-by: Rob Herring <robh@kernel.org>
Tested-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Romain Izard <romain.izard.pro@gmail.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Do not mention which chips supporting the PMECC controller, as it a
duplicate of the information in the chips' device trees.
Use common terms when describing the sub-node for the NAND Flash
controller.
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Romain Izard <romain.izard.pro@gmail.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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The NFC controller used to accelerate the NAND transfers on SAMA5 chips
can use either RB_EDGE0 or RB_EDGE3 as its ready/busy interrupt bit.
Use the controller's compatible string to select the correct bit.
For the binding:
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Wenyou Yang <Wenyou.yang@atmel.com>
Tested-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Romain Izard <romain.izard.pro@gmail.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull more ARM DT changes from Arnd Bergmann:
"Here are some final updates for ARM SoC specific dts files:
- The i.MX changes were sent relatively late, and had a dependency on
the clk tree, so I delayed that a bit. Support for the new i.MX6qp
SoC and a couple of new boards is added in this branch.
- Uniphier renames a few files to match the final product names that
were decided by the company, kudos to the kernel developer(s) for
getting support upstream before the product release. Also two
boards are added. The patches were posted early enough and nice
overall, but we forgot to apply them and decided to give it some
more time in linux-next
- at91 has two small bug fixes"
* tag 'armsoc-dt2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (83 commits)
ARM: dts: at91: sama5d4 Xplained: don't disable hsmci regulator
ARM: dts: at91: sama5d3 Xplained: don't disable hsmci regulator
ARM: dts: uniphier: add pinmux node for I2C ch4
ARM: dts: uniphier: add @{address} to EEPROM node
ARM: dts: uniphier: add PH1-Pro4 Sanji board support
ARM: dts: uniphier: add PH1-Pro4 Ace board support
ARM: dts: uniphier: enable I2C channel 2 of ProXstream2 Gentil board
ARM: dts: uniphier: add EEPROM node for ProXstream2 Gentil board
ARM: dts: uniphier: add reference clock nodes
ARM: dts: uniphier: rework UniPhier System Bus nodes
ARM: dts: uniphier: factor out ranges property of support card
arm64: dts: uniphier: rename PH1-LD10 to PH1-LD20
ARM: dts: imx53-qsb: Fix gpio button polarity
ARM: dts: vfxxx: Add DAC node for Vybrid SoC
ARM: dts: imx6q: add missing links between ipu2 and mipi dsi
ARM: dts: imx: Add support for Advantech/GE B850v3
ARM: dts: imx: Add support for Advantech/GE B650v3
ARM: dts: imx: Add support for Advantech/GE B450v3
ARM: dts: imx: Add support for Advantech/GE Bx50v3
ARM: dts: imx: Add Advantech BA-16 Qseven module
...
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git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt2
Merge "i.MX device tree updates for 4.6" from Shawn Guo:
- New i.MX6 board support: NXP/Freescale imx6qp boards, Advantech/GE,
Uniwest evi, Engicam IMX6 Q7, Toradex Apalis SoM and Ixora carrier
boards
- Relicense vf610 dts files under GPLv2/X11
- A patch series from Stefan updating Vybrid Colibri board support with
PMU, regulators and other devices enabled
- Correct PWM pinmux for Ventana boards and add more pinmux for GW54xx
- Clean up imx6q-tbs2910 dts file and add SATA PHY configuration
- A series from Russell cleaning up hummingboard dts files
- A series from Lothar updating Ka-Ro i.MX28, i.MX53 and i.MX6 boards
to use better audio codec frequency and display configurations
- Clean up whitespaces in i.MX6UL pinctrl header and add more devices
support for the SoC
- Other random dts updates to enable various devices
* tag 'imx-dt-4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (75 commits)
ARM: dts: imx53-qsb: Fix gpio button polarity
ARM: dts: vfxxx: Add DAC node for Vybrid SoC
ARM: dts: imx6q: add missing links between ipu2 and mipi dsi
ARM: dts: imx: Add support for Advantech/GE B850v3
ARM: dts: imx: Add support for Advantech/GE B650v3
ARM: dts: imx: Add support for Advantech/GE B450v3
ARM: dts: imx: Add support for Advantech/GE Bx50v3
ARM: dts: imx: Add Advantech BA-16 Qseven module
of: Add vendor prefix for General Electric Company
of: Add vendor prefix for Advantech Corporation
ARM: dts: imx35.dtsi: change the clock information for usb
ARM: dts: imx25.dtsi: change the clock information for usb
ARM: dts: imx6ul: add kpp support
ARM: dts: imx6ul: add gpmi support
ARM: dts: imx6ul: add lcdif support
ARM: dts: imx6ul: add sai support
ARM: dts: imx6ul: add flexcan support
ARM: dts: imx6ul: add sdma support
ARM: dts: imx6ul: add pwm[1-4] nodes
ARM: dts: imx6ul: disable PWMs by default
...
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This patch adds vendor prefix for General Electric Company
Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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This patch adds vendor prefix for Advantech Corporation.
Website: http://www.advantech.com/
Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/rzhang/linux
Pull thermal updates from Zhang Rui:
- Fix a regression where bogus trip points on some Lenovo laptops start
to screw up thermal control after commit 81ad4276b505 ("Thermal:
initialize thermal zone device correctly").
On these Lenovo laptops, a bogus passive trip point is reported,
which is 0 degree Celsius. Without commit 81ad4276b505, thermal zone
fails to set cooling devices to proper cooling state, which is a bug.
But with commit 81ad4276b505 applied, the processors are always
throttled on these Lenovo laptops because the current temperature is
always higher than the passive trip point.
Fix things to ignore such bogus trip points. (Zhang Rui)
- Introduce Mediatek thermal driver. (Sascha Hauer)
- Introduce devm_ versions of OF thermal sensor register API. (Laxman
Dewangan)
- Changes in Kconfigs to allow compile test on UM arch. (Krzysztof
Kozlowski)
- Introduce Skylake support in intel_pch_thermal driver. (Srinivas
Pandruvada)
- Several small fixes on Rockchip, TI-SoC, Tegra, RCar, and Exynos
thermal drivers.
* 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/rzhang/linux: (26 commits)
Thermal: Ignore invalid trip points
thermal: trace: migrating thermal traces to use TRACE_DEFINE_ENUM() macros
thermal: intel_pch_thermal: Enable Skylake PCH thermal
thermal: doc: Add details of devm_thermal_zone_of_sensor_{register,unregister}
thermal: of-thermal: Add devm version of thermal_zone_of_sensor_register
thermal: doc: Add details of thermal_zone_of_sensor_{register,unregister}
thermal: exynos: Defer probe if vtmu is present but not registered
thermal: exynos: Use devm_regulator_get_optional() for vtmu
thermal: exynos: List vtmu-supply as optional property in DT binding
thermal: exynos: Print a message about exceeded number of supported trip-points
thermal: exynos: Document number of supported trip-points
thermal: exynos: Document compatible for Exynos5433 TMU
thermal: mtk: allow compile testing on UM
thermal: tegra_soctherm: fix sign bit of temperature
thermal: Fix build error of missing devm_ioremap_resource on UM
thermal: ti-soc-thermal: clean up the error handling a bit
thermal: rcar: Use ARCH_RENESAS
thermal: rcar_thermal: don't open code of_device_get_match_data()
thermal: db8500_cpufreq_cooling: Compile with COMPILE_TEST
thermal: rockchip: fix the tsadc sequence output on rk3228/rk3399
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git://git.kernel.org/pub/scm/linux/kernel/git/evalenti/linux-soc-thermal into thermal-soc
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This adds the device tree binding documentation for the mediatek thermal
controller found on Mediatek MT8173 and other SoCs.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
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The Exynos Thermal Management Unit binding says that the vtmu-supply
is optional but is listed in the required properties section. Add an
optional properties section and move the regulator property there.
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Andi Shyti <andi.shyti@samsung.com>
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
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Document the number of configurable temperature thresholds (for
trip-points in interrupt-driven mode).
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
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Commit 488c7455d74c ("thermal: exynos: Add the support for Exynos5433
TMU") added new compatible but forgot to update documentation.
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull irq fixes from Thomas Gleixner:
"A small set of fixes for the usual ARM/SOC irqchip drivers
- A set of fixes for mbigen to handle multiple devices in a hardware
module proper
- A cleanup for the mbigen config option which was pointlessly user
configurable.
- A cleanup for tegra replacing open coded functionality by the
proper core function
The config cleanup touches arch/arm64/Kconfig.platforms to select the
irq chip for the related platform"
* 'irq-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
irqchip/mbigen: Make CONFIG_HISILICON_IRQ_MBIGEN a hidden option
ARM64: Kconfig: Select mbigen interrupt controller on Hisilicon platform
irqchip/mbigen: Handle multiple device nodes in a mbigen module
irqchip/mbigen: Adjust DT bindings to handle multiple devices in a module
irqchip/tegra: Switch to use irq_domain_free_irqs_common
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A mbigen hardware module can contain more than one device node. These device
nodes contain the same register definition.
mbigen_dev1:intc_dev1 {
...
reg = <0x0 0xc0080000 0x0 0x10000>;
...
};
mbigen_dev2:intc_dev2 {
...
reg = <0x0 0xc0080000 0x0 0x10000>;
...
};
In this case both devices try to request the same resource resulting in a
resource conflict.
To address this problem the devices need to be subnodes of the mbigen hardware
module, which then contains the unique register space.
[ tglx: Massaged changelog ]
Suggested-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Ma Jun <majun258@huawei.com>
Cc: jason@lakedaemon.net
Cc: marc.zyngier@arm.com
Cc: Catalin.Marinas@arm.com
Cc: guohanjun@huawei.com
Cc: Will.Deacon@arm.com
Cc: huxinwei@huawei.com
Cc: lizefan@huawei.com
Cc: dingtianhong@huawei.com
Cc: zhaojunhua@hisilicon.com
Cc: liguozhu@hisilicon.com
Cc: linux-arm-kernel@lists.infradead.org
Link: http://lkml.kernel.org/r/20160203111602.GA1234@leverpostej
Link: http://lkml.kernel.org/r/1458203641-17172-2-git-send-email-majun258@huawei.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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git://git.linaro.org/landing-teams/working/fujitsu/integration
Pull more mailbox updates from Jassi Brar:
"Device tree bindings and driver for TI's Message-Manager controller.
Due to some last minute cosmetic changes, the driver was not included
in the first pull request, otherwise the driver has been reviewed
twice"
* 'mailbox-for-next' of git://git.linaro.org/landing-teams/working/fujitsu/integration:
mailbox: Introduce TI message manager driver
Documentation: dt: mailbox: Add TI Message Manager
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Message Manager is a hardware block used to communicate with various
processor systems within certain Texas Instrument's Keystone
generation SoCs.
This hardware engine is used to transfer messages from various compute
entities(or processors) within the SoC. It is designed to be self
contained without needing software initialization for operation.
Signed-off-by: Nishanth Menon <nm@ti.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk updates from Stephen Boyd:
"The clk changes for this release cycle are mostly dominated by new
device support in terms of LoC, but there has been some cleanup in the
core as well as the usual minor clk additions to various drivers.
Core:
- parent tracking has been simplified
- CLK_IS_ROOT is now a no-op flag, cleaning up drivers has started
- of_clk_init() doesn't consider disabled DT nodes anymore
- clk_unregister() had an error path bug squashed
- of_clk_get_parent_count() has been fixed to only return unsigned ints
- HAVE_MACH_CLKDEV is removed now that the last arch user (ARM) is gone
New Drivers:
- NXP LPC18xx creg
- QCOM IPQ4019 GCC
- TI dm814x ADPLL
- i.MX6QP
Updates:
- Cyngus audio clks found on Broadcom iProc devices
- Non-critical fixes for BCM2385 PLLs
- Samsung exynos5433 updates for clk id errors, HDMI support,
suspend/resume simplifications
- USB, CAN, LVDS, and FCP clks on shmobile devices
- sunxi got support for more clks on new SoCs and went through a
minor refactoring/rewrite to use a simpler factor clk construct
- rockchip added some more clk ids and added suport for fraction
dividers
- QCOM GDSCs in msm8996
- A new devm helper to make adding custom actions simpler (acked by Greg)"
* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (197 commits)
clk: bcm2835: fix check of error code returned by devm_ioremap_resource()
clk: renesas: div6: use RENESAS for #define
clk: renesas: Rename header file renesas.h
clk: max77{686,802}: Remove CLK_IS_ROOT
clk: versatile: Remove CLK_IS_ROOT
clk: sunxi: Remove use of variable length array
clk: fixed-rate: Remove CLK_IS_ROOT
clk: qcom: Remove CLK_IS_ROOT
doc: dt: add documentation for lpc1850-creg-clk driver
clk: add lpc18xx creg clk driver
clk: lpc32xx: fix compilation warning
clk: xgene: Add missing parenthesis when clearing divider value
clk: mb86s7x: Remove CLK_IS_ROOT
clk: x86: Remove clkdev.h and clk.h includes
clk: x86: Remove CLK_IS_ROOT
clk: mvebu: Remove CLK_IS_ROOT
clk: renesas: move drivers to renesas directory
clk: si5{14,351,70}: Remove CLK_IS_ROOT
clk: scpi: Remove CLK_IS_ROOT
clk: s2mps11: Remove CLK_IS_ROOT
...
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Add DT binding documentation for lpc1850-creg-clk driver.
Signed-off-by: Joachim Eastwood <manabian@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
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https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into clk-next
Pull Allwinner clk updates from Maxime Ripard:
Allwinner clocks additions for 4.6
A bunch of things, mostly:
- Finally switched everything over to OF_CLK_DECLARE, which should remove
orphans clocks entirely
- Reworked the clk-factors to be able to add new parameters
- Improved the error reporting
- A bunch of new clocks for new SoCs.
* tag 'sunxi-clocks-for-4.6' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux: (25 commits)
clk: sunxi: Add apb0 gates for H3
clk: sunxi: Improve divs_clk error handling and reporting
clk: sunxi: improve divider_clk error handling and reporting
clk: sunxi: improve mux_clk error handling and reporting
clk: sunxi: Fix sun8i-a23-apb0-clk divider flags
clk: sunxi: Remove clk_register_clkdev calls
clk: sunxi: Remove old probe and protection code
clk: sunxi: convert current clocks registration to CLK_OF_DECLARE
clk: sunxi: Make clocks setup functions take const pointer
clk: sunxi: Make clocks setup functions return their clock
clk: sunxi: improve error reporting for the mux clock
clk: sunxi: don't mark sun6i_ar100_data __initconst
clk: sunxi: add bus gates for A83T
clk: sunxi: Add apb0 gates for A83T
clk: sunxi: rewrite sun8i-a23-mbus-clk using the simpler composite clk
clk: sunxi: rewrite sun6i-ar100 using factors clk
clk: sunxi: rewrite sun6i-a31-ahb1-clk using factors clk with custom recalc
clk: sunxi: factors: Drop round_rate from clk ops
clk: sunxi: factors: Support custom formulas
clk: sunxi: factors: Consolidate get_factors parameters into a struct
...
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This patch adds support for APB0 in H3. It seems to be compatible with
earlier SOCs. apb0 gates controls R_ block peripherals (R_PIO, R_IR,
etc).
Since this gates behave just like any Allwinner clock gate, add a generic
compatible that can be reused if we don't have any clock to protect.
Signed-off-by: Krzysztof Adamski <k@japko.eu>
[Maxime: Removed the H3 compatible from the simple-gates driver, reworked
the commit log a bit]
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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A83T has similar bus gates that of H3, including single gating register has
different clock parent.
As per H3 and A83T datasheet, usbhost is under AHB2.
However,below shows allwinner source code assignment:
bits: 26 (ehci0), 27 (ehci1), 29 (ohci0) => AHB1 for A83T.
bits: 26 (ehci0), 27 (ehci1) => AHB1 for H3
bits 29, 30, 31(ohci0,1,2) => AHB2 for H3.
until, this confusion is cleared keep it H3 way.
Signed-off-by: Vishnu Patekar <vishnupatekar0510@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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APB0 is part of PRCM, and is compatible with earlier SOCs.
apb0 gates controls R_PIO, R_UART, R_RSB, etc clocks.
This patch adds support for APB0 gates for A83T.
Signed-off-by: Vishnu Patekar <vishnupatekar0510@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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Conflicts:
drivers/clk/Kconfig
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On dm814x we have 13 ADPLLs with 3 to 4 outputs on each. The
ADPLLs have several dividers and muxes controlled by a shared
control register for each PLL.
Note that for the clocks to work as device drivers for booting on
dm814x, this patch depends on "ARM: OMAP2+: Change core_initcall
levels to postcore_initcall" that has already been merged.
Also note that this patch does not implement clk_set_rate for the
PLL, that will be posted later on when available.
Cc: Stephen Boyd <sboyd@codeaurora.org>
Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
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* clk-ipq4019:
clk: qcom: Add IPQ4019 Global Clock Controller support
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This patch adds support for the global clock controller found on
the IPQ4019 based devices. This includes UART, I2C, SPI etc.
Signed-off-by: Pradeep Banavathi <pradeepb@codeaurora.org>
Signed-off-by: Senthilkumar N L <snlakshm@codeaurora.org>
Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org>
Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org>
Acked-by: Andy Gross <andy.gross@linaro.org>
[sboyd@codeaurora.org: Drop 0x16024 enable_reg in crypto_ahb]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-next
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Cfr. commit a9ec81f4ed5c05db ("serial: sh-sci: Drop the interface
clock").
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Michael Turquette <mturquette@baylibre.com>
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* clk-fixes:
clk: rockchip: rk3368: fix some clock gates
clk: rockchip: rk3036: rename emac ext source clock
clk: rockchip: rk3036: fix the div offset for emac clock
clk: rockchip: rk3036: fix uarts clock error
clk: rockchip: rk3036: fix the FLAGs for clock mux
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The clock generator has two clock inputs that can be used as the reference
clock. Add support for switching between them at runtime.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
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* clk-iproc:
clk: iproc: Remove __init from header
clk: iproc: Add support for Cygnus audio clocks
Documentation: dt-bindings: Add DT bindings for Cygnus audio clock
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This patch adds audio clock device tree binding documentation to an
existing Cygnus clock DT bindings document.
Signed-off-by: Simran Rai <ssimran@broadcom.com>
Reviewed-by: Ray Jui <rjui@broadcom.com>
Reviewed-by: Lori Hikichi <lhikichi@broadcom.com>
Reviewed-by: Scott Branden <sbranden@broadcom.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux
Pull i2c updates from Wolfram Sang:
"Mostly usual driver updates and improvements. The changelog should
give an idea. Standing out is the i2c-qup driver with lots of new
capabilities and we also have now an i2c-demuxer.
I'd especially like to welcome Peter Rosin as the i2c-mux maintainer.
He has an interesting series for muxes in the queue and agreed to look
after this part of the subsystem. Thank you, Peter, and welcome
again!
The octeon changes were applied pretty recently before the merge
window. I am aware. They are the first (and relatively simple)
patches of a larger overhaul to this driver. In case something goes
wrong with them, they are easy to fix (or revert). The advantage I
see is that they are out of the way, and I can concentrate on the next
block of patches. I really would like to apply the overhaul in
smaller batches to avoid regressions. And waiting a cycle for the
introductory patches seemed too much of a delay for me"
* 'i2c/for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux: (39 commits)
i2c: octeon: Support I2C_M_RECV_LEN
i2c: octeon: Cleanup resource allocation code
i2c: octeon: Cleanup i2c-octeon driver
MAINTAINERS: add Peter Rosin as i2c mux maintainer
dt-bindings: i2c: Spelling s/propoerty/property/
i2c: immediately mark ourselves as registered
i2c: i801: sort IDs alphabetically
MAINTAINERS: Mika and me are designated reviewers for I2C DESIGNWARE
i2c: octeon: Cleanup kerneldoc comments
i2c: do not use internal data from driver core
i2c: cadence: Fix the kernel-doc warnings
i2c: imx: remove extra spaces.
i2c: rcar: don't open code of_device_get_match_data()
i2c: qup: Fix fifo handling after adding V2 support
i2c: xiic: Implement power management
i2c: piix4: Pre-shift the port number
i2c: piix4: Always use the same type for port
i2c: piix4: Support alternative port selection register
i2c: tegra: don't open code of_device_get_match_data()
i2c: riic, sh_mobile, rcar: Use ARCH_RENESAS
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Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Enable power management. This patch enables the clocks before transfer
and disables after the transfer. It also adds the clock description.
Signed-off-by: Shubhrajyoti Datta <shubhraj@xilinx.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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This driver allows an I2C bus to switch between multiple masters. This
is not hot-switching because connected I2C slaves will be
re-instantiated. It is meant to select the best I2C core at runtime once
the task is known. Example: Prefer i2c-gpio over another I2C core
because of HW errata affecting your use case.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu
Pull IOMMU updates from Joerg Roedel:
- updates for the Exynos IOMMU driver to make use of default domains
and to add support for the SYSMMU v5
- new Mediatek IOMMU driver
- support for the ARMv7 short descriptor format in the io-pgtable code
- default domain support for the ARM SMMU
- couple of other small fixes all over the place
* tag 'iommu-updates-v4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (41 commits)
iommu/ipmmu-vmsa: Add r8a7795 DT binding
iommu/mediatek: Check for NULL instead of IS_ERR()
iommu/io-pgtable-armv7s: Fix kmem_cache_alloc() flags
iommu/mediatek: Fix handling of of_count_phandle_with_args result
iommu/dma: Fix NEED_SG_DMA_LENGTH dependency
iommu/mediatek: Mark PM functions as __maybe_unused
iommu/mediatek: Select ARM_DMA_USE_IOMMU
iommu/exynos: Use proper readl/writel register interface
iommu/exynos: Pointers are nto physical addresses
dts: mt8173: Add iommu/smi nodes for mt8173
iommu/mediatek: Add mt8173 IOMMU driver
memory: mediatek: Add SMI driver
dt-bindings: mediatek: Add smi dts binding
dt-bindings: iommu: Add binding for mediatek IOMMU
iommu/ipmmu-vmsa: Use ARCH_RENESAS
iommu/exynos: Support multiple attach_device calls
iommu/exynos: Add Maintainers entry for Exynos SYSMMU driver
iommu/exynos: Add support for v5 SYSMMU
iommu/exynos: Update device tree documentation
iommu/exynos: Add support for SYSMMU controller with bogus version reg
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'arm/io-pgtable', 'arm/renesas' and 'core' into next
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Update the IPMMU DT binding documentation to include the r8a7795 compat
string as well as the "renesas,ipmmu-main" property that on r8a7795 will
be used to describe the topology and the relationship between the various
cache IPMMU instances and the main IPMMU.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
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This patch add smi binding document and smi local arbiter header file.
Signed-off-by: Yong Wu <yong.wu@mediatek.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
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