summaryrefslogtreecommitdiffstats
path: root/arch/arc
Commit message (Collapse)AuthorAgeFilesLines
* ARC: lazy dcache flush broke gdb in non-aliasing configsVineet Gupta2013-05-252-19/+11Star
| | | | | | | | | | | | | gdbserver inserting a breakpoint ends up calling copy_user_page() for a code page. The generic version of which (non-aliasing config) didn't set the PG_arch_1 bit hence update_mmu_cache() didn't sync dcache/icache for corresponding dynamic loader code page - causing garbade to be executed. So now aliasing versions of copy_user_highpage()/clear_page() are made default. There is no significant overhead since all of special alias handling code is compiled out for non-aliasing build Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARC: Use enough bits for determining page's cache colorVineet Gupta2013-05-231-1/+1
| | | | | | | | | The current code uses 2 bits for determining page's dcache color, thus sorting pages into 4 bins, whereas the aliasing dcache really has 2 bins (8k page, 64k dcache - 4 way-set-assoc). This can cause extraneous flushes - e.g. color 0 and 2. Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARC: Brown paper bag bug in macro for checking cache colorVineet Gupta2013-05-232-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | The VM_EXEC check in update_mmu_cache() was getting optimized away because of a stupid error in definition of macro addr_not_cache_congruent() The intention was to have the equivalent of following: if (a || (1 ? b : 0)) but we ended up with following: if (a || 1 ? b : 0) And because precedence of '||' is more that that of '?', gcc was optimizing away evaluation of <a> Nasty Repercussions: 1. For non-aliasing configs it would mean some extraneous dcache flushes for non-code pages if U/K mappings were not congruent. 2. For aliasing config, some needed dcache flush for code pages might be missed if U/K mappings were congruent. Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARC: copy_(to|from)_user() to honor usermode-access permissionsVineet Gupta2013-05-233-15/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This manifested as grep failing psuedo-randomly: -------------->8--------------------- [ARCLinux]$ ip address show lo | grep inet [ARCLinux]$ ip address show lo | grep inet [ARCLinux]$ ip address show lo | grep inet [ARCLinux]$ [ARCLinux]$ ip address show lo | grep inet inet 127.0.0.1/8 scope host lo -------------->8--------------------- ARC700 MMU provides fully orthogonal permission bits per page: Ur, Uw, Ux, Kr, Kw, Kx The user mode page permission templates used to have all Kernel mode access bits enabled. This caused a tricky race condition observed with uClibc buffered file read and UNIX pipes. 1. Read access to an anon mapped page in libc .bss: write-protected zero_page mapped: TLB Entry installed with Ur + K[rwx] 2. grep calls libc:getc() -> buffered read layer calls read(2) with the internal read buffer in same .bss page. The read() call is on STDIN which has been redirected to a pipe. read(2) => sys_read() => pipe_read() => copy_to_user() 3. Since page has Kernel-write permission (despite being user-mode write-protected), copy_to_user() suceeds w/o taking a MMU TLB-Miss Exception (page-fault for ARC). core-MM is unaware that kernel erroneously wrote to the reserved read-only zero-page (BUG #1) 4. Control returns to userspace which now does a write to same .bss page Since Linux MM is not aware that page has been modified by kernel, it simply reassigns a new writable zero-init page to mapping, loosing the prior write by kernel - effectively zero'ing out the libc read buffer under the hood - hence grep doesn't see right data (BUG #2) The fix is to make all kernel-mode access permissions mirror the user-mode ones. Note that the kernel still has full access to pages, when accessed directly (w/o MMU) - this fix ensures that kernel-mode access in copy_to_from() path uses the same faulting access model as for pure user accesses to keep MM fully aware of page state. The issue is peudo-random because it only shows up if the TLB entry installed in #1 is present at the time of #3. If it is evicted out, due to TLB pressure or some-such, then copy_to_user() does take a TLB Miss Exception, with a routine write-to-anon COW processing installing a fresh page for kernel writes and also usable as it is in userspace. Further the issue was dormant for so long as it depends on where the libc internal read buffer (in .bss) is mapped at runtime. If it happens to reside in file-backed data mapping of libc (in the page-aligned slack space trailing the file backed data), loader zero padding the slack space, does the early cow page replacement, setting things up at the very beginning itself. With gcc 4.8 based builds, the libc buffer got pushed out to a real anon mapping which triggers the issue. Reported-by: Anton Kolesov <akolesov@synopsys.com> Cc: <stable@vger.kernel.org> # 3.9 Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARC: [mm] Prevent stray dcache lines after__sync_icache_dcach()Vineet Gupta2013-05-231-1/+1
| | | | | | | | | | | Flush and INVALIDATE the dcache page. This helper is only used for writeback of CODE pages to memory. So there's no value in keeping the dcache lines around. Infact it is risky as a writeback on natural eviction under pressure can cause un-needed writeback with weird issues on aliasing dcache configurations. Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARC: [TB10x] Remove redundant abilis,simple-pinctrl mechanismChristian Ruppert2013-05-154-32/+4Star
| | | | | | | | | | | | | | | | The TB10x platform port includes a custom mechanism using to set up default pin controller configurations using abilis,simple-default pin configurations of nodes compatible with abilis,simple-pinctrl. This mechanism is redundant with the Linux standard "default" pin configuration, see commit ab78029ecc347debbd737f06688d788bd9d60c1d "drivers/pinctrl: grab default handles from device core". This patch removes the TB10x custom mechanism in favour of the Linux standard. Signed-off-by: Christian Ruppert <christian.ruppert@abilis.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* Merge tag 'arc-v3.10-rc1-part2' of ↵Linus Torvalds2013-05-1013-74/+377
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc Pull second set of arc arch updates from Vineet Gupta: "Aliasing VIPT dcache support for ARC I'm satisified with testing, specially with fuse which has historically given grief to VIPT arches (ARM/PARISC...)" * tag 'arc-v3.10-rc1-part2' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc: ARC: [TB10x] Remove GENERIC_GPIO ARC: [mm] Aliasing VIPT dcache support 4/4 ARC: [mm] Aliasing VIPT dcache support 3/4 ARC: [mm] Aliasing VIPT dcache support 2/4 ARC: [mm] Aliasing VIPT dcache support 1/4 ARC: [mm] refactor the core (i|d)cache line ops loops ARC: [mm] serious bug in vaddr based icache flush
| * ARC: [TB10x] Remove GENERIC_GPIOVineet Gupta2013-05-101-7/+0Star
| | | | | | | | | | | | | | This tracks Alexandre Courbot's mainline GPIO rework Signed-off-by: Vineet Gupta <vgupta@synopsys.com> Acked-by: Alexandre Courbot <acourbot@nvidia.com>
| * ARC: [mm] Aliasing VIPT dcache support 4/4Vineet Gupta2013-05-097-5/+101
| | | | | | | | | | | | Enforce congruency of userspace shared mappings Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
| * ARC: [mm] Aliasing VIPT dcache support 3/4Vineet Gupta2013-05-092-2/+4
| | | | | | | | | | | | Fix the one zillion warnings Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
| * ARC: [mm] Aliasing VIPT dcache support 2/4Vineet Gupta2013-05-096-22/+223
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is the meat of the series which prevents any dcache alias creation by always keeping the U and K mapping of a page congruent. If a mapping already exists, and other tries to access the page, prev one is flushed to physical page (wback+inv) Essentially flush_dcache_page()/copy_user_highpage() create K-mapping of a page, but try to defer flushing, unless U-mapping exist. When page is actually mapped to userspace, update_mmu_cache() flushes the K-mapping (in certain cases this can be optimised out) Additonally flush_cache_mm(), flush_cache_range(), flush_cache_page() handle the puring of stale userspace mappings on exit/munmap... flush_anon_page() handles the existing U-mapping for anon page before kernel reads it via the GUP path. Note that while not complete, this is enough to boot a simple dynamically linked Busybox based rootfs Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
| * ARC: [mm] Aliasing VIPT dcache support 1/4Vineet Gupta2013-05-093-18/+34
| | | | | | | | | | | | | | This preps the low level dcache flush helpers to take vaddr argument in addition to the existing paddr to properly flush the VIPT dcache Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
| * ARC: [mm] refactor the core (i|d)cache line ops loopsVineet Gupta2013-05-091-29/+24Star
| | | | | | | | | | | | | | | | Nothing semantical * simplify the alignement code by using & operation only * rename variables clearly as paddr Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
| * ARC: [mm] serious bug in vaddr based icache flushVineet Gupta2013-05-091-1/+1
| | | | | | | | | | | | | | | | | | | | vaddr used to index the cache was clipped from the wrong end, and thus would potentially fail to flush the correct lines. The problem was dorment for so long because up until the recent optimizations it was only used for ptrace break-point only flushes. Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* | Merge tag 'arc-v3.10-rc1-part1' of ↵Linus Torvalds2013-05-0938-342/+1840
|\| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc Pull ARC port updates from Vineet Gupta: "Support for two new platforms based on ARC700: - Abilis TB10x SoC [Chritisian/Pierrick] - Simulator only System-C Model [Mischa] ARC specific MM improvements: - Avoid full TLB flush (ASID increment) on munmap (even single page) - VIPT Cache Flushing improvements + Delayed dcache flush for non-aliasing dcache (big performance boost) + icache flush aliasing agnostic (no need to kill all possible aliases) Others: - Avoid needless rebuild of DTB files for every kernel build - Remove builtin cmdline as that is already provided by DeviceTree/bootargs - Fixing unaligned access emulation corner case - checkpatch fixes [Sachin] - Various fixlets [Noam] - Minor build failures/cleanups" * tag 'arc-v3.10-rc1-part1' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc: (35 commits) ARC: [mm] Lazy D-cache flush (non aliasing VIPT) ARC: [mm] micro-optimize page size icache invalidate ARC: [mm] remove the pessimistic all-alias-invalidate icache helpers ARC: [mm] consolidate icache/dcache sync code ARC: [mm] optimise icache flush for kernel mappings ARC: [mm] optimise icache flush for user mappings ARC: [mm] optimize needless full mm TLB flush on munmap ARC: Add support for nSIM OSCI System C model ARC: [TB10x] Adapt device tree to new compatible string ARC: [TB10x] Add support for TB10x platform ARC: [TB10x] Device tree of TB100 and TB101 Development Kits ARC: Prepare interrupt code for external controllers ARC: Allow embedded arc-intc to be properly placed in DT intc hierarchy ARC: [cmdline] Don't overwrite u-boot provided bootargs ARC: [cmdline] Remove CONFIG_CMDLINE ARC: [plat-arcfpga] defconfig update ARC: unaligned access emulation broken if callee-reg dest of LD/ST ARC: unaligned access emulation error handling consolidation ARC: Debug/crash-printing Improvements ARC: fix typo with clock speed ...
| * ARC: [mm] Lazy D-cache flush (non aliasing VIPT)Vineet Gupta2013-05-073-7/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | flush_dcache_page( ) is MM hook to ensure that a page has consistent views between kernel and userspace. Thus it is called when * kernel writes to a page which at some later point could get mapped to userspace (so kernel mapping needs to be flushed-n-inv) * kernel is about to read from a page with possible userspace mappings (so userspace mappings needs to be made coherent with kernel ones) However for Non aliasing VIPT dcache, any userspace mapping will always be congruent to kernel mapping. Thus d-cache need need not be flushed at all (or delayed indefinitely). The only reason it does need to be flushed is when mapping code pages. Since icache doesn't snoop dcache, those dirty dcache lines need to be written back to memory and icache line invalidated so that icache lines fetch will get the right data. Decent gains on LMBench fork/exec/sh and File I/O micro-benchmarks. (1) FPGA @ 80 MHZ Processor, Processes - times in microseconds - smaller is better ------------------------------------------------------------------------------ Host OS Mhz null null open slct sig sig fork exec sh call I/O stat clos TCP inst hndl proc proc proc --------- ------------- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- 3.9-rc6-a Linux 3.9.0-r 80 4.79 8.72 66.7 116. 239. 8.39 30.4 4798 14.K 34.K 3.9-rc6-b Linux 3.9.0-r 80 4.79 8.62 65.4 111. 239. 8.35 29.0 3995 12.K 30.K 3.9-rc7-c Linux 3.9.0-r 80 4.79 9.00 66.1 106. 239. 8.61 30.4 2858 10.K 24.K ^^^^ ^^^^ ^^^ File & VM system latencies in microseconds - smaller is better ------------------------------------------------------------------------------- Host OS 0K File 10K File Mmap Prot Page 100fd Create Delete Create Delete Latency Fault Fault selct --------- ------------- ------ ------ ------ ------ ------- ----- ------- ----- 3.9-rc6-a Linux 3.9.0-r 317.8 204.2 1122.3 375.1 3522.0 4.288 20.7 126.8 3.9-rc6-b Linux 3.9.0-r 298.7 223.0 1141.6 367.8 3531.0 4.866 20.9 126.4 3.9-rc7-c Linux 3.9.0-r 278.4 179.2 862.1 339.3 3705.0 3.223 20.3 126.6 ^^^^^ ^^^^^ ^^^^^ ^^^^ (2) Customer Silicon @ 500 MHz (166 MHz mem) ------------------------------------------------------------------------------ Host OS Mhz null null open slct sig sig fork exec sh call I/O stat clos TCP inst hndl proc proc proc --------- ------------- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- abilis-ba Linux 3.9.0-r 497 0.71 1.38 4.58 12.0 35.5 1.40 3.89 2070 5525 13.K abilis-ca Linux 3.9.0-r 497 0.71 1.40 4.61 11.8 35.6 1.37 3.92 1411 4317 10.K ^^^^ ^^^^ ^^^ Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
| * ARC: [mm] micro-optimize page size icache invalidateVineet Gupta2013-05-071-3/+12
| | | | | | | | | | | | | | | | | | | | | | | | start address is already page aligned and size is const PAGE_SIZE, thus fixups for alignment not needed in generated code. bloat-o-meter vmlinux-mm5 vmlinux add/remove: 0/0 grow/shrink: 0/1 up/down: 0/-32 (-32) function old new delta __inv_icache_page 82 50 -32 Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
| * ARC: [mm] remove the pessimistic all-alias-invalidate icache helpersVineet Gupta2013-05-071-184/+17Star
| | | | | | | | | | | | No users of this code anymore - so RIP ! Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
| * ARC: [mm] consolidate icache/dcache sync codeVineet Gupta2013-05-072-19/+18Star
| | | | | | | | | | | | | | | | | | | | Now that we have same helper used for all icache invalidates (i.e. vaddr+paddr based exact line invalidate), consolidate the open coded calls into one place. Also rename flush_icache_range_vaddr => __sync_icache_dcache Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
| * ARC: [mm] optimise icache flush for kernel mappingsVineet Gupta2013-05-071-4/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change continues the theme from prev commit - this time icache handling for kernel's own code modification (vmalloc: loadable modules, breakpoints for kprobes/kgdb...) flush_icache_range() calls the CDU icache helper with vaddr to enable exact line invalidate. For a true kernel-virtual mapping, the vaddr is actually virtual hence valid as index into cache. For kprobes breakpoint however, the vaddr arg is actually paddr - since that's how normal kernel is mapped in ARC memory map. This implies that CDU will use the same addr for indexing as for tag match - which is fine since kernel code would only have that "implicit" mapping and none other. This should speed up module loading significantly - specially on default ARC700 icache configurations (32k) which alias. Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
| * ARC: [mm] optimise icache flush for user mappingsVineet Gupta2013-05-073-15/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ARC icache doesn't snoop dcache thus executable pages need to be made coherent before mapping into userspace in flush_icache_page(). However ARC700 CDU (hardware cache flush module) requires both vaddr (index in cache) as well as paddr (tag match) to correctly identify a line in the VIPT cache. A typical ARC700 SoC has aliasing icache, thus the paddr only based flush_icache_page() API couldn't be implemented efficiently. It had to loop thru all possible alias indexes and perform the invalidate operation (ofcourse the cache op would only succeed at the index(es) where tag matches - typically only 1, but the cost of visiting all the cache-bins needs to paid nevertheless). Turns out however that the vaddr (along with paddr) is available in update_mmu_cache() hence better suits ARC icache flush semantics. With both vaddr+paddr, exactly one flush operation per line is done. Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
| * ARC: [mm] optimize needless full mm TLB flush on munmapVineet Gupta2013-05-071-4/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | munmap ends up calling tlb_flush() which for ARC was flushing the entire TLB unconditionally (by moving the MMU to a new ASID) do_munmap unmap_region unmap_vmas unmap_single_vma unmap_page_range tlb_start_vma zap_pud_range tlb_end_vma() tlb_finish_mmu tlb_flush() ---> unconditional flush_tlb_mm() So even a single page munmap, a frequent operation when uClibc dynamic linker (ldso) is loading the dependent shared libraries, would move the the ASID multiple times - needlessly invalidating the pre-faulted TLB entries (and increasing the rate of ASID wraparound + full TLB flush). This is now optimised to only be called if tlb->full_mm (which means for exit/execve) cases only. And for those cases, flush_tlb_mm() is already optimised to be a no-op for mm->mm_users == 0. So essentially there are no mmore full mm flushes - except for fork which anyhow needs it for properly COW'ing parent address space. munmap now needs to do TLB range flush, which is implemented with tlb_end_vma() Results ------- 1. ASID now consistenly moves by 4 during a simple ls (as opposed to 5 or 7 before). 2. LMBench microbenchmark also shows improvements Basic system parameters ------------------------------------------------------------------------------ Host OS Description Mhz tlb cache mem scal pages line par load bytes --------- ------------- ----------------------- ---- ----- ----- ------ ---- 3.9-rc5-0 Linux 3.9.0-r 3.9-rc5-0404-gcc-4.4-ba 80 8 64 1.1000 1 3.9-rc5-0 Linux 3.9.0-r 3.9-rc5-0405-avoid-full 80 8 64 1.1200 1 Processor, Processes - times in microseconds - smaller is better ------------------------------------------------------------------------------ Host OS Mhz null null open slct sig sig fork exec sh call I/O stat clos TCP inst hndl proc proc proc --------- ------------- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- 3.9-rc5-0 Linux 3.9.0-r 80 4.81 8.69 68.6 118. 239. 8.53 31.6 4839 13.K 34.K 3.9-rc5-0 Linux 3.9.0-r 80 4.46 8.36 53.8 91.3 223. 8.12 24.2 4725 13.K 33.K File & VM system latencies in microseconds - smaller is better ------------------------------------------------------------------------------- Host OS 0K File 10K File Mmap Prot Page 100fd Create Delete Create Delete Latency Fault Fault selct --------- ------------- ------ ------ ------ ------ ------- ----- ------- ----- 3.9-rc5-0 Linux 3.9.0-r 314.7 223.2 1054.9 390.2 3615.0 1.590 20.1 126.6 3.9-rc5-0 Linux 3.9.0-r 265.8 183.8 1014.2 314.1 3193.0 6.910 18.8 110.4 Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
| * ARC: Add support for nSIM OSCI System C modelMischa Jonker2013-05-073-0/+164
| | | | | | | | | | | | | | | | | | | | | | | | This adds support for an ARC Virtual Platform. This platform is based on the System C standard promoted by the OSCI (Open System C Initiative) and uses nSIM to simulate the ARC CPU core itself. Users can build a virtual SoC by combining System C models of peripherals and CPU cores. Signed-off-by: Mischa Jonker <mjonker@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
| * ARC: [TB10x] Adapt device tree to new compatible stringChristian Ruppert2013-05-071-2/+2
| | | | | | | | | | | | | | | | | | | | The original device tree was written using a slightly different implementation of the fixed-factor-clock device tree binding. The compatible string must be modified in order to be compatible with the new implementation. Signed-off-by: Christian Ruppert <christian.ruppert@abilis.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
| * ARC: [TB10x] Add support for TB10x platformChristian Ruppert2013-05-077-0/+257
| | | | | | | | | | | | | | | | | | | | | | Infrastructure required to make the Linux kernel compile and boot on the Abilis Systems TB10x series of SOCs based on ARC700 CPUs: - Kmake related files (Kconfig, Makefile, tb10x_defconfig) - TB10x platform initialisation Signed-off-by: Christian Ruppert <christian.ruppert@abilis.com> Signed-off-by: Pierrick Hascoet <pierrick.hascoet@abilis.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
| * ARC: [TB10x] Device tree of TB100 and TB101 Development KitsChristian Ruppert2013-05-075-0/+1190
| | | | | | | | | | | | | | | | | | | | | | These are the device tree files for the Abilis Systems TB100 and TB101 ICs and their respective development kit PCBs. These files are committed in preparation of the following patch set which adds support for these chips to the ARC platform. Signed-off-by: Christian Ruppert <christian.ruppert@abilis.com> Signed-off-by: Pierrick Hascoet <pierrick.hascoet@abilis.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
| * ARC: Prepare interrupt code for external controllersChristian Ruppert2013-05-072-2/+3
| | | | | | | | | | | | | | | | | | | | | | This patch adds some room for CPU-external interrupt controllers in the Linux interrupt space. Until now, only the 32 CPU internal interrupt lines were supported which does not allow for external interrupt controllers such as GPIO modules etc. Signed-off-by: Christian Ruppert <christian.ruppert@abilis.com> Signed-off-by: Pierrick Hascoet <pierrick.hascoet@abilis.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
| * ARC: Allow embedded arc-intc to be properly placed in DT intc hierarchyVineet Gupta2013-05-071-8/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | arc-intc is initialized in arc common code as it is applicable to all platforms. However platforms with their own external intc still need to refer to it for correct DT interrupt tree hierarchy setup, e.g. static struct of_device_id __initdata tb10x_irq_ids[] = { { .compatible = "snps,arc700-intc", .data = dummy_init_irq }, { .compatible = "abilis,tb10x_ictl", .data = tb10x_init_irq }, {}, }; The fix is to use the generic irqchip framework to tie all irqchips in a special linker section and then call irqchip_init() which calls the DT of_irq_init() for all the intc in one go. That way the platform code need not be aware of arc-intc at all. Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
| * ARC: [cmdline] Don't overwrite u-boot provided bootargsVineet Gupta2013-05-071-8/+10
| | | | | | | | | | | | | | | | | | | | | | | | The existing code was wrong on several counts: * uboot provided bootargs were copied into @boot_command_line, only to be over-written by setup_machine_fdt(), effectively lost * @cmdline_p returned by setup_arch() to start_kernel() didn't include the DT /bootargs Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
| * ARC: [cmdline] Remove CONFIG_CMDLINEVineet Gupta2013-05-072-14/+2Star
| | | | | | | | | | | | | | Given that DeviceTree /bootargs can provide similar functionality, no point in providing duplicate infrastructure. Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
| * ARC: [plat-arcfpga] defconfig updateVineet Gupta2013-05-071-1/+2
| | | | | | | | | | | | | | * Allow initramfs path to be symlink * CONFIG_PREEMPT be default Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
| * ARC: unaligned access emulation broken if callee-reg dest of LD/STVineet Gupta2013-05-071-1/+3
| | | | | | | | | | | | | | | | | | The fixup code correctly updates the callee-regs on stack, but fails to unwind it into actual register file. Thus userspace won't see the update. Reported-by: Noam Camus <noamc@ezchip.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
| * ARC: unaligned access emulation error handling consolidationVineet Gupta2013-05-072-15/+6Star
| | | | | | | | | | | | | | If CONFIG_ARC_MISALIGN_ACCESS is not enabled, or if the fixup fails, call the same error handler: same signal/si_code to user (SIGBUS) Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
| * ARC: Debug/crash-printing ImprovementsVineet Gupta2013-05-071-18/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * Remove the line-break between scratch/callee-regs (sneaked in when we converted from printk to pr_* * Use %pS to print the symbol names of faulting PC (ret pseudo register) and BLINK (call return register) * Don't print user-vma for a kernel crash (only do it for print-fatal-signals based regfile dump) * Verbose print the Interrupt/Exception Enable/Active state * for main executable link address is 0x10000 based (vs. 0) thus offset of faulting PC needs to be adjusted Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
| * ARC: fix typo with clock speedNoam Camus2013-05-071-1/+1
| | | | | | | | | | Signed-off-by: Noam Camus <noamc@ezchip.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
| * ARC: Respect the cpu_id passed for fetching correct cpu infoNoam Camus2013-05-071-1/+1
| | | | | | | | | | Signed-off-by: Noam Camus <noamc@ezchip.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
| * ARC: Remove non existent refs to GENERIC_KERNEL_EXECVE & GENERIC_KERNEL_THREADAlexander Shiyan2013-05-071-2/+0Star
| | | | | | | | | | | | | | | | | | | | | | This tracks mainline commit ae903caae267 "Bury the conditionals from kernel_thread/kernel_execve series" which we missed out as ARC port was not yet mainline. [vgupta: commit log modified] Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
| * ARC: [kbuild] Avoid DTB rebuilds if DTS are untouchedVineet Gupta2013-04-171-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, for every ARC kernel build I see the following: --------------->8----------------- DTB arch/arc/boot/dts/angel4.dtb.S AS arch/arc/boot/dts/angel4.dtb.o LD arch/arc/boot/dts/built-in.o rm arch/arc/boot/dts/angel4.dtb.S <-- forces rebuild next iter CHK kernel/config_data.h --------------->8----------------- This is because *.dts.S is intermediate file in dtb generation and is by default deleted by make which needs a ".SECONDARY" hint to NOT do so. This could have ideally been done in scripts/Makefile.lib - for benefit of all, however .SECONDARY doesn't seem to work with wildcards. Thanks to Stephen for suggesting .SECONDARY (vs .PRECIOUS) and making that work using a non wildcard version in arch makefile. Thanks to James Hogan for pointing out that *.dtb.S now needs to be added to clean-files Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
| * ARC: [kbuild] Include Kconfig.binfmtVineet Gupta2013-04-091-3/+4
| | | | | | | | | | | | | | | | commit "fs: make binfmt support for #! scripts modular and removable" made support for #!scripts optional - thus need to include the Kconfig file to get all relevant BINFMT_* Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
| * ARC: [kbuild] Allow platforms to disable LLSC for !SMP as wellVineet Gupta2013-04-091-6/+4Star
| | | | | | | | | | | | | | | | | | | | | | Currently ARC_HAS_LLSC can be influenced by platform for SMP only using ARC_HAS_COH_LLSC. For !SMP it defaults to "y". It turns out that some customers can't support it all, even in UP. So we change the semantics, and use a negative dependency ARC_CANT_LLSC. Any platform (independent of SMP or !SMP) can select it to disable LLSC. Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
| * ARC: [build] Fix warnings with CONFIG_DEBUG_SECTION_MISMATCHVineet Gupta2013-04-094-10/+10
| | | | | | | | Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
| * ARC: [build] Build failure with !KPROBESChristian Ruppert2013-04-091-0/+1
| | | | | | | | | | | | | | | | arch/arc/kernel/traps.c no longer compiles without explicitly including asm/kprobes.h Signed-off-by: Christian Ruppert <christian.ruppert@abilis.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
| * ARC: [build] Allow uncompressed uImageVineet Gupta2013-04-092-5/+17
| | | | | | | | | | | | | | | | | | | | | | The existing uImage target always generates gzip compressed image which drags bootup for some very slow FPGA customer boards. So introduce seperate make targets:uImage.{bin,gz} with uncompressed being default. Also tie gz generation to CONFIG_KERNEL_GZIP, which a platform can select in it's Kconfig if it wishes gz to be default. Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
| * ARC: [build] cleanup Makefile a bitVineet Gupta2013-04-092-4/+3Star
| | | | | | | | Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
| * ARC: [build] silence make defconfig warnings with host gcc 4.7Vineet Gupta2013-04-091-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We do cross compiles for ARC Linux. With gcc 4.7, a make defconfig spews out the following: ------------------->8-------------------------- make ARCH=arc defconfig gcc: error: unrecognized command line option '-marc600' gcc: error: unrecognized command line option '-mA7' gcc: error: unrecognized command line option '-mno-sdata' gcc: error: unrecognized command line option '-mno-mpy' *** Default configuration is based on 'fpga_defconfig' ------------------->8-------------------------- This apparently is coming from LIBGCC line - which is strange to be invoked for defconfig generation. Reported-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
| * ARC: remove #ifdef-ed out include of dead headerPaul Bolle2013-04-091-3/+0Star
| | | | | | | | | | | | | | | | | | There's no (Kconfig) macro CONFIG_BLOCK_DEV_RAM. (CONFIG_BLK_DEV_RAM does exist though.) But linux/blk.h got killed in 2005 anyway (in a patch titled "kill blk.h"), so these three lines can be removed. Signed-off-by: Paul Bolle <pebolle@tiscali.nl> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
| * ARC: Remove duplicate inclusion of header filesSachin Kamat2013-04-093-3/+0Star
| | | | | | | | | | | | | | Some header files were included twice in the same file. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
| * ARC: Fix coding style issuesSachin Kamat2013-04-093-5/+5
| | | | | | | | | | | | | | | | | | | | | | Fixes the following coding style issues as detected by checkpatch: ERROR: space required before the open parenthesis '(' ERROR: "foo * bar" should be "foo *bar" WARNING: space prohibited between function name and open parenthesis '(' WARNING: please, no spaces at the start of a line Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
| * ARC: Use <linux/*> headers instead of <asm/*>Sachin Kamat2013-04-095-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | Silences the following checkpatch warnings: WARNING: Use #include <linux/ptrace.h> instead of <asm/ptrace.h> WARNING: Use #include <linux/kprobes.h> instead of <asm/kprobes.h> WARNING: Use #include <linux/kgdb.h> instead of <asm/kgdb.h> WARNING: Use #include <linux/uaccess.h> instead of <asm/uaccess.h> WARNING: Use #include <linux/cache.h> instead of <asm/cache.h> Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
| * ARC: Remove unneeded version.h header includeSachin Kamat2013-04-091-1/+0Star
| | | | | | | | | | | | | | | | version.h header file inclusion is not necessary as detected by versioncheck script. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
generated by cgit v1.2.3-55-g7522 (git 2.39.0) at 2024-06-30 04:25:31 +0200