| Commit message (Collapse) | Author | Age | Files | Lines |
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Leave b{4,6}50v3 GPIO expander pca953x pins P05,P10,P11 unconfigured as
they are now used to implement an additional watchdog mechanism in user
space. P10,P11 pins remain unused (and therefore hogged) on b850v3.
Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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This adds support for the Marvell switch and names the network
ports according to the labels, that can be found next to the
connectors. The switch is connected to the host system using a
PCI based network card.
The PCI bus configuration has been written using the following
information:
root@b450v3# lspci -tv
-[0000:00]---00.0-[01]----00.0 Intel Corporation I210 Gigabit Network Connection
root@b450v3# lspci -nn
00:00.0 PCI bridge [0604]: Synopsys, Inc. Device [16c3:abcd] (rev 01)
01:00.0 Ethernet controller [0200]: Intel Corporation I210 Gigabit Network Connection [8086:1533] (rev 03)
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Leave pca953x P06,P07 pins on b850v3 platform and P06 pin on
b450v3/b650v3 unconfigured in the kernel space since they could be
configured as DP1_RST and DP2_RST by the applications for the DP FW
update support.
Signed-off-by: Ken Lin <ken.lin@advantech.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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The license text has been mangled at some point then copy pasted across
multiple files. Restore it to what it should be.
Note that this is not intended as a license change.
Reviewed-by: Heiko Schocher <hs@denx.de>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Acked-by: Afzal Mohammed <afzal.mohd.ma@gmail.com>
Acked-by: Michael Trimarchi <michael@amarulasolutions.com>
Acked-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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At power on, pca953x GPIO pins are configured as input and may cause
unexpected interrupts. Configure the unused pins as GPO low to
avoid unexpected interrupts.
Signed-off-by: Ken Lin <ken.lin@advantech.com.tw>
Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Previously the LDB_DIx clocks could be specified in the ldb node. With
the ERR009219 errata fix applied, the ldb_di clocks now needs to be
specified in the clks node to ensure the clocks are setup early in the
boot process.
Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Add support for Advantech/GE B450v3 board.
Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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