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* ARM: dts: imx6qdl-sabreauto: Add CEC supportFabio Estevam2017-12-261-0/+8
| | | | | | | HDMI_TX_CEC_LINE pin is used for CEC, so pass it in the device tree. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* ARM: dts: imx6qdl-sabreauto: Pass the DDC I2C busFabio Estevam2017-12-261-0/+1
| | | | | | | | On imx6qdl-sabreauto the HDMI DDC bus is connected to I2C2, so pass the 'ddc-i2c-bus' property accordingly. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* arm: dts: fix unit-address leading 0sRob Herring2017-10-201-1/+1
| | | | | | | | | | | | | Fix dtc warnings for 'simple_bus_reg' due to leading 0s. Converted using the following command: perl -p -i -e 's/\@0+([0-9a-f])/\@$1/g' `find arch/arm/boot/dts -type -f -name '*.dts*' Dropped changes to ARM, Ltd. boards LED nodes and manually fixed up some occurrences of uppercase hex. Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* ARM: dts: imx6-sabreauto: add the ADV7180 video decoderSteve Longerbeam2017-06-141-0/+45
| | | | | | | | | | | | | | | | Enables the ADV7180 decoder sensor. The ADV7180 connects to the parallel-bus mux input on ipu1_csi0_mux. The ADV7180 power pin is via max7310_b port expander. Changes from Tim Harvey: - Use IRQ_TYPE_LEVEL_LOW instead of 0x8 for interrupt type for clarity. - For 8-bit parallel IPU1-CSI0 bus connection only data[12-19] are used. Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Tim Harvey <tharvey@gateworks.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* ARM: dts: imx6-sabreauto: add pinctrl for gpt input captureSteve Longerbeam2017-06-141-0/+12
| | | | | | | | Add pinctrl groups for both GPT input capture channels. Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* ARM: dts: imx6-sabreauto: add reset-gpios property for max7310_bSteve Longerbeam2017-06-141-0/+9
| | | | | | | | | | | | The reset pin to the port expander chip (MAX7310) is controlled by a gpio, so define a reset-gpios property to control it. There are three MAX7310's on the SabreAuto CPU card (max7310_[abc]), but all use the same pin for their reset. Since all can't acquire the same pin, assign it to max7310_b, that chip is needed by more functions (usb and adv7180). Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* ARM: dts: imx6-sabreauto: create i2cmux for i2c3Steve Longerbeam2017-06-141-21/+44
| | | | | | | | | | | | | | | | | | | | | | The sabreauto uses a steering pin to select between the SDA signal on i2c3 bus, and a data-in pin for an SPI NOR chip. Use i2cmux to control this steering pin. Idle state of the i2cmux selects SPI NOR. This is not a classic way to use i2cmux, since one side of the mux selects something other than an i2c bus, but it works and is probably the cleanest solution. Note that if one thread is attempting to access SPI NOR while another thread is accessing i2c3, the SPI NOR access will fail since the i2cmux has selected the SDA pin rather than SPI NOR data-in. This couldn't be avoided in any case, the board is not designed to allow concurrent i2c3 and SPI NOR functions (and the default device-tree does not enable SPI NOR anyway). Devices hanging off i2c3 should now be defined under i2cmux, so that the steering pin can be properly controlled to access those devices. The port expanders (MAX7310) are thus moved into i2cmux. Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* ARM: dts: imx: remove obsoleted property fsl,spi-num-chipselectsVladimir Zapolskiy2017-01-021-1/+0Star
| | | | | | | | | | | | Since commit b36581df7e78 ("spi: imx: Using existing properties for chipselects") the device tree property 'fsl,spi-num-chipselects' is unused and it is already marked as obsolete in device tree binding documentation. Remove the property from the existing DTS files to avoid its reoccurence on copying. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* ARM: dts: imx6: Add imx-weim parameters to dtsi'sJoshua Clayton2016-11-051-2/+0Star
| | | | | | | | | | | | | imx-weim should always set address-cells to 2, and size_cells to 1. On imx6, fsl,weim-cs-gpr will always be &gpr Set these common parameters in the dtsi file, rather than in a downstream dts. Signed-off-by: Joshua Clayton <stillcompiling@gmail.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* ARM: dts: imx6qdl: Fix "ERROR: code indent should use tabs where possible"Jagan Teki2016-10-241-1/+1
| | | | | | | Fixed code indent tabs in respetcive imx6qdl dtsi files. Signed-off-by: Jagan Teki <jteki@openedev.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* ARM: dts: imx6qdl: don't configure reserved pad settingsUwe Kleine-König2016-08-091-12/+12
| | | | | | | | | Several dts files set a bit in the SPEED field for pads RGMII_{R,T}{XC,D0,D1,D2,D3,X_CTL}, but that doesn't exist. Writing there doesn't have an effect and the bit reads as zero. Signed-off-by: Uwe Kleine-König <uwe@kleine-koenig.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* ARM: dts: imx6: tag boards that have the HW workaround for ERR006687Lucas Stach2016-06-111-0/+1
| | | | | | | | | Add the DT property to all boards that have the hardware workaround for erratum ERR006687 present. This allows the CPUidle driver to use the deep idle states, even if the FEC is active. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* ARM: dts: imx: Fix the assigned-clock mismatch issue on imx6q/dlBai Ping2015-12-151-3/+3
| | | | | | | | | | The 'assigned-clock-parents' and 'assigned-clock-rates' list should corresponding to the 'assigned-clocks' property clock list. Signed-off-by: Bai Ping <b51503@freescale.com> Fixes: ed339363de1b ("ARM: dts: imx6qdl-sabreauto: Allow HDMI and LVDS to work simultaneously") Cc: <stable@vger.kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* ARM: dts: imx: add "jedec,spi-nor" flash compatible bindingRafał Miłecki2015-10-191-1/+1
| | | | | | | | | | | | Starting with commit 8947e396a829 ("Documentation: dt: mtd: replace "nor-jedec" binding with "jedec, spi-nor"") we have "jedec,spi-nor" binding indicating support for JEDEC identification. Use it for all flashes that are supposed to support READ ID op according to the datasheets. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* Merge tag 'armsoc-dt' of ↵Linus Torvalds2015-09-011-0/+137
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM DT updates from Olof Johansson: "Ladies and gentlemen, we proudly announce to you the latest branch of ARM device tree contents for the mainline kernel. Come and see, come and see! No less than twentythree thousand lines of additions! Just imagine the joy you will have of using your mainline kernel on newly supported hardware such as Rockchip Chromebooks, Freescale i.MX6UL boards or UniPhier hardware! For those of you feeling less adventurous, added hardware support on platforms such as TI DM814x and Gumstix Overo platforms might be more of your liking. We've got something for everyone here! Ahem. Cough. So, anyway... This is the usual large batch of DT updates. Lots and lots of smaller changes, some of the larger ones to point out are: - Rockchip veyron (Chromebook) support, as well as several other new boards - DRM support on Atmel AT91SAM9N12EK - USB additions on some Allwinner platforms - Mediatek MT6580 support - Freescale i.MX6UL support - cleanups for Renesas shmobile platforms - lots of added devices on LPC18xx - lots of added devices and boards on UniPhier There's also some dependent code added here, in particular some branches that are primarily merged through the clock tree" * tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (389 commits) ARM: tegra: Add gpio-ranges property ARM: tegra: Fix AHB base address on Tegra20, Tegra30 and Tegra114 ARM: tegra: Add Tegra124 PMU support ARM: tegra: jetson-tk1: Add GK20A GPU DT node ARM: tegra: venice2: Add GK20A GPU DT node ARM: tegra: Add IOMMU node to GK20A ARM: tegra: Add CPU regulator to the Jetson TK1 device tree ARM: tegra: Add entries for cpufreq on Tegra124 ARM: tegra: Enable the DFLL on the Jetson TK1 ARM: tegra: Add the DFLL to Tegra124 device tree ARM: dts: zynq: Add devicetree entry for Xilinx Zynq reset controller. ARM: dts: UniPhier: fix PPI interrupt CPU mask of timer nodes ARM: dts: rockchip: correct regulator power states for suspend ARM: dts: rockchip: correct regulator PM properties ARM: dts: vexpress: Use assigned-clock-parents for sp810 pinctrl: tegra: Only set the gpio range if needed arm: boot: dts: am4372: add ARM timers and SCU nodes ARM: dts: AM4372: Add the am4372-rtc compatible string ARM: shmobile: r8a7794 dtsi: Add CPG/MSTP Clock Domain ARM: shmobile: r8a7793 dtsi: Add CPG/MSTP Clock Domain ...
| * ARM: imx6qdl-sabreauto.dtsi: enable USB supportPeter Chen2015-08-111-0/+38
| | | | | | | | | | | | | | Add USBOTG and USB host 1 support Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| * ARM: dts: imx6qdl-sabreauto: Allow HDMI and LVDS to work simultaneouslyFabio Estevam2015-08-111-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently it is not possible to have HDMI and LVDS working simultaneously, because both ports try to use PLL5. Move the LVDS clock parent to PLL3_USB_OTG, so that HDMI and LVDS can be driven from independent sources. With this change the LDB pixel clock goes to 68.57 MHz, which is still within the valid range for the HSD100PXN1 LVDS panel. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| * ARM: dts: imx6qdl-sabreauto: Add audio supportShengjiu Wang2015-07-151-0/+91
| | | | | | | | | | | | | | Add ESAI, ASRC, CS42888 for imx6qdl-sabreauto board Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * ARM: dts: imx6qdl-sabreauto: Add HDMI supportFabio Estevam2015-07-151-0/+4
| | | | | | | | | | | | | | | | | | Add HDMI support. As the DDC I2C pins are not connected due to pin conflicts, we do not pass the 'ddc-i2c-bus' property in this case. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* | dts: imx6: fix sd card gpio polarity specified in device treeDong Aisheng2015-07-241-2/+2
|/ | | | | | | | | | | cd-gpios polarity should be changed to GPIO_ACTIVE_LOW and wp-gpios should be changed to GPIO_ACTIVE_HIGH. Otherwise, the SD may not work properly due to wrong polarity inversion specified in DT after switch to common parsing function mmc_of_parse(). Signed-off-by: Dong Aisheng <aisheng.dong@freescale.com> Acked-by: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* ARM: dts: imx6qdl-sabreauto: remove pinctrl-assert-gpiosShawn Guo2015-04-281-1/+0Star
| | | | | | | | The pinctrl-assert-gpios is an invalid pinctrl property. It was probably sneaked from vendor tree. Remove it. Fixes: 4e18a2243a87 ("ARM: imx6qdl-sabreauto.dtsi: add max7310 support") Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: imx6qdl-sabreauto.dtsi: add max7310 supportPeter Chen2015-03-301-0/+35
| | | | | | | max7310 is an i2c interface gpio expander Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: dts: imx6qdl-sabreauto: Support debug LEDLiu Ying2014-02-201-0/+19
| | | | | | | | | | The D9 LED controlled by gpio on the imx6qdl-sabreauto CPU board is a debug LED according to the board design. This patch adds the relevant device tree nodes to the imx6qdl-sabreauto device tree file to support this LED. Signed-off-by: Liu Ying <Ying.Liu@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: dts: imx6qdl-sabreauto: Add PFUZE100 supportFabio Estevam2014-02-101-0/+113
| | | | | | | mx6 sabreauto boards have Freescale PFUZE100 regulator, so add support for it. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: dts: imx6qdl-sabreauto: Add LVDS supportFabio Estevam2014-02-101-0/+45
| | | | | | | Add LVDS support for mx6 sabreauto boards. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: dts: imx6qdl-sabreauto: use GPIO_6 for FEC interrupt.Troy Kisky2014-02-101-0/+3
| | | | | | | This works around a hardware bug. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: dts: imx6qdl: add spdif support for sabreautoNicolin Chen2014-02-091-0/+20
| | | | | | | | This patch adds spdif support for imx6qdl-sabreauto by inserting the cpu dai node with pinctrl group and its ASoC dai link node. Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: dts: imx6qdl: make pinctrl nodes board specificShawn Guo2014-02-091-12/+166
| | | | | | | | | | | | | | | | | | | Currently, all pinctrl setting nodes are defined in <soc>.dtsi, so that boards that share the same pinctrl setting do not have to define it time and time again in <board>.dts. However, along with the devices and use cases being added continuously, the pinctrl setting nodes under iomuxc becomes more than expected. This bloats device tree blob for particular board unnecessarily since only a small subset of those pinctrl setting nodes will be used by the board. It impacts not only the DTB file size but also the run-time device tree lookup efficiency. The patch moves all the pinctrl data into individual boards as needed. With the changes, the pinctrl setting nodes becomes local to particular board, and it makes no sense to continue numbering the setting for given peripheral. Thus, all the pinctrl phandler name gets updated to have only peripheral name in there. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: dts: imx6qdl: add uhs pinctrl state for usdhc3Dong Aisheng2013-09-261-1/+4
| | | | | | | This is needed for supporting ultra high speed cards like SD3.0 cards. Signed-off-by: Dong Aisheng <b29396@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: dts: imx: share pad macro names between imx6q and imx6dlShawn Guo2013-08-221-0/+22
| | | | | | | | | | | | | | | | | | | | | The imx6q and imx6dl are two pin-to-pin compatible SoCs. The same board design can work with either chip plugged into the socket, e.g. sabresd and sabreauto boards. We currently define pin groups in imx6q.dtsi and imx6dl.dtsi respectively because the pad macro names are different between two chips. This brings a maintenance burden on having the same label point to the same pin group defined in two places. The patch replaces prefix MX6Q_ and MX6DL_ with MX6QDL_ for both SoCs pad macro names. Then the pin groups becomes completely common between imx6q and imx6dl and can just be moved into imx6qdl.dtsi, so that the long term maintenance of imx6q/dt pin settings becomes easier. Unfortunately, the change brings some dramatic diff stat, but it's all about DTS file, and the ultimate net diff stat is good. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: dts: imx6qdl-sabreauto: enable the WEIM NORHuang Shijie2013-06-171-0/+19
| | | | | | | | | Enable the WEIM NOR for imx6q{dl}-sabreauto boards. For the pin conflict with SPI NOR, its status is set to "disabled". Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: dts: imx6q{dl}: fix the pin conflict between SPI and WEIMHuang Shijie2013-06-171-1/+1
| | | | | | | | | | | | | | In the imx6q-sabreauto and imx6dl-sabreauto boards, the pin MX6Q{DL}_PAD_EIM_D19 is used as a GPIO for SPI NOR, but it is used as a data pin for the WEIM NOR. In order to fix the conflict, this patch removes the pin from the hog, and adds a new board-level pinctrl: pinctrl_ecspi1_sabreauto. The SPI NOR selects this pinctrl_ecspi1_sabreauto when it is enabled. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: dts: add SPI/NOR for mx6q{dl}-sabreauto boardsHuang Shijie2013-06-171-0/+16
| | | | | | | | Since the SPI/NOR has pin conflict with the WEIM NOR, we disable the spi/nor by default. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: dts: enable the gpmi-nand for imx6q{dl}-sabreauto boardsHuang Shijie2013-06-171-0/+6
| | | | | | | enable the gpmi-nand for imx6q-sabreauto and imx6qdl-sabreauto boards. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: dts: imx: make sabreauto and sabresd commonShawn Guo2013-04-091-0/+38
The sabreauto and sabresd boards are common for imx6q and imx6dl. Create imx6qdl-sabreauto.dtsi and imx6qdl-sabresd.dtsi for those common parts. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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