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* ARM: dts: imx7d-pinfunc: update sai select input valueShengjiu Wang2018-04-161-3/+3
| | | | | | | | | | Update SAI select input daisy chain value according to Reference Manual. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* ARM: dts: imx7: Fix typo in watchdog pin nameFabio Estevam2017-06-041-3/+3
| | | | | | | Change "WDOD1" to "WDOG1" in watchdog pin names. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* ARM: dts: imx7: Add "LPSR" to LPSR iomux pin namesSascha Hauer2017-01-291-55/+55
| | | | | | | | | | | | | The i.MX7 has two iomux controllers. the iomuxc and the iomuxc_lpsr. In a board dts we have to make sure that both controllers are supplied with the correct pins. It's way too easy to do this wrong since only a look into the reference manual can reveal which pins belong to which controller. To make this clearer add "LPSR" to the pin names which belong to the LPSR controller. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* ARM: dts: imx7d-pinfunc: fix UART pinmux definesStefan Agner2016-11-141-4/+8
| | | | | | | | | | | The UART pinmux defines for the pins which are part of the LPSR pinmux controller are wrong: Output signals configure the input sel value and the pinmux defines allow not to distinguish between DCE/DTE mode. Follow the usual pattern using DTE/DCE as part of the define to denote the two UART configuration options. Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* ARM: dts: imx7d-pinfunc: add input mux for UART2 RX DTE modeStefan Agner2016-06-061-1/+1
| | | | | | | | | | | | | | | Add input mux for UART2 RX in DTE mode. This allows to use the pad UART2_TX_DATA_ALT0 as UART2 RX. This particular input select seems to be missing in current reference manuals (Rev. B), but when looking at the tables and other UART input select registers (e.g. UART3) it seems naturally that this input mux register also has a fourth pad option for UART2_TX_DATA_ALT0. It has also been proven to be required to use UART2 in DTE mode and the particular pads on the Colibri iMX7 platform. Signed-off-by: Stefan Agner <stefan@agner.ch> Acked-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* ARM: dts: imx7d-pinfunc: add gpio1 pad iomux settingsAdrian Alonso2015-10-191-3/+119
| | | | | | | | | - Add imx7 SoC GPIO1 pad iomuxc settings <mux_reg conf_reg input_reg mux_mode input_val> - Fix UART input select daisy chain setting values Signed-off-by: Adrian Alonso <aalonso@freescale.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* ARM: dts: add pinfunc include file to support imx7dFrank Li2015-06-031-0/+1038
Addi i.MX7D support: pinfunc part except GPIO1 Signed-off-by: Frank Li <Frank.Li@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>