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path: root/arch/arm/boot/dts/sun5i-r8-chip.dts
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* ARM: sunxi: Convert pinctrl nodes to generic bindingsMaxime Ripard2016-12-261-10/+10
| | | | | | | | Now that we can handle the generic pinctrl bindings, convert our DT to it. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
* ARM: sunxi: Remove useless allwinner,pull propertyMaxime Ripard2016-12-261-3/+0Star
| | | | | | | | | | | | The allwinner,pull property set to NO_PULL was really considered our default (and wasn't even changing the default value in the code). Remove these properties to make it obvious that we do not set anything in such a case. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
* ARM: sunxi: Remove useless allwinner,drive propertyMaxime Ripard2016-12-261-4/+0Star
| | | | | | | | | The allwinner,drive property set to 10mA was really considered as our default. Remove all those properties entirely to make that obvious. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
* ARM: sun5i: chip: Add optional busesMaxime Ripard2016-11-221-0/+14
| | | | | | | | | | The I2C1 and SPI2 buses are exposed on the CHIP headers, and are not explicitly dedicated to anything. Add them to the DTS with the muxing already set, but keep them disabled. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
* ARM: sun5i: chip: add a node for the w1 gpio controllerAntoine Tenart2016-11-221-0/+14
| | | | | | | | The CHIP uses a 1-Wire bus to discover the DIPs. Enable the bus in the DT. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: sun5i: chip: Enable Wi-Fi SDIO chipMaxime Ripard2016-11-221-0/+41
| | | | | | | | | The WiFi chip is powered through a GPIO and two regulators in parallel. Since that case is not supported yet, just set them as always on before we rework the regulator framework to deal with those. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
* ARM: sun5i: chip: Add status LEDMaxime Ripard2016-08-221-0/+10
| | | | | | | The CHIP has a status LED connected to one of the AXP GPIOs. Add the gpio-leds node to be able to use the proper LED framework to control it. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: sunxi/dt: make the CHIP inherit from allwinner,sun5i-a13Boris Brezillon2016-06-161-1/+1
| | | | | | | | | | | | The sun4i-timer driver registers its sched_clock only if the machine is compatible with "allwinner,sun5i-a13", "allwinner,sun5i-a10s" or "allwinner,sun4i-a10". Add the missing "allwinner,sun5i-a13" string to the machine compatible. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Fixes: 465a225fb2af ("ARM: sun5i: Add C.H.I.P DTS") Cc: <stable@vger.kernel.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: sun5i: chip: Enable the TV EncoderMaxime Ripard2016-05-041-0/+12
| | | | | | | | | The CHIP has a composite output available muxed with the microphone in the micro-jack plug. Enable the composite output in its DTS. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: sun5i: chip: Add CPU regulator for cpufreqMaxime Ripard2016-01-251-0/+4
| | | | | | | | | The current DT doesn't have a phandle to the CPU regulator in the CPU node, which disables the CPU voltage scaling entirely. Add that phandle. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: sun5i: chip: Enable the audio codecMaxime Ripard2015-10-221-0/+4
| | | | | | | | The CHIP v0.2 has a composite output on a mini-jack connector, the audio part being provided by the on-SoC codec. Enable it. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
* ARM: sun5i: Add C.H.I.P DTSMaxime Ripard2015-10-121-0/+214
The C.H.I.P. is a small SBC with an Allwinner R8, 8GB of NAND, 512MB of RAM, USB host and OTG, a wifi / bluetooth combo chip, an audio/video jack and two connectors to plug additional boards on top of it. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Chen-Yu Tsai <wens@csie.org>