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* ARM: dts: uniphier: Add all CPUs in cooling mapsViresh Kumar2018-11-261-2/+4
| | | | | | | | | | | | | | | | | | | Each CPU can (and does) participate in cooling down the system but the DT only captures a handful of them, normally CPU0, in the cooling maps. Things work by chance currently as under normal circumstances its the first CPU of each cluster which is used by the operating systems to probe the cooling devices. But as soon as this CPU ordering changes and any other CPU is used to bring up the cooling device, we will start seeing failures. Also the DT is rather incomplete when we list only one CPU in the cooling maps, as the hardware doesn't have any such limitations. Update cooling maps to include all devices affected by individual trip points. Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: dts: uniphier: Add USB3 controller nodesKunihiko Hayashi2018-10-041-0/+180
| | | | | | | | Add USB3 controller nodes including usb-core, resets, regulator, ss-phy and hs-phy. This supports for Pro4, PXs2 and the boards. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: dts: uniphier: add SD/eMMC controller nodesMasahiro Yamada2018-10-031-0/+34
| | | | | | | Add SD controller nodes for LD4, Pro4, sLD8, Pro5, and PXs2. This is also used as an eMMC controller for LD4, Pro4, and sLD8. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: dts: uniphier: add SPI node for UniPhier 32bit SoCsKunihiko Hayashi2018-08-281-0/+22
| | | | | | | Add nodes of SPI controller for LD4, Pro4, sLD8, Pro5 and PXs2. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: dts: add more clocks to Denali NAND controller nodeMasahiro Yamada2018-08-281-1/+2
| | | | | | | | | | Catch up with the new binding of the Denali IP where three clocks, "nand", "nand_x", "ecc" are required. For UniPhier SoCs, the "nand_x" and "ecc" are tied up because they are both 200MHz. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: dts: uniphier: Add missing cooling device properties for CPUsViresh Kumar2018-07-181-0/+3
| | | | | | | | | | | | | | | The cooling device properties, like "#cooling-cells" and "dynamic-power-coefficient", should either be present for all the CPUs of a cluster or none. If these are present only for a subset of CPUs of a cluster then things will start falling apart as soon as the CPUs are brought online in a different order. For example, this will happen because the operating system looks for such properties in the CPU node it is trying to bring up, so that it can register a cooling device. Add such missing properties. Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: dts: uniphier: add syscon-phy-mode property to each ethernet nodeKunihiko Hayashi2018-04-241-0/+1
| | | | | | | | Add syscon-phy-mode property specifying a phandle of system controller to each ethernet node. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: dts: uniphier: add required clocks and resets to Pro4 ethernet nodeKunihiko Hayashi2018-04-241-0/+2
| | | | | | | | | | | The GIO clock/reset, Another MAC clock, and the PHY clock are required for the ethernet of Pro4 SoC. And add clock-names and reset-names to the ethernet node of PXs2 since we need to distinguish clocks and resets now. Suggested-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: dts: uniphier: add syscon property for UniPhier sound systemKatsuhiro Suzuki2018-03-201-1/+2
| | | | | | | | | | | This patch adds syscon property for specifying soc-glue core into device-tree of PXs2 SoC. Currently, soc-glue core is used for changing the state of S/PDIF signal output pin to signal output state or Hi-Z state. Signed-off-by: Katsuhiro Suzuki <suzuki.katsuhiro@socionext.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: dts: uniphier: add sound node for PXs2Katsuhiro Suzuki2018-03-151-0/+54
| | | | | | | | This patch adds audio controller, external codec and simple card node of UniPhier AIO sound system for PXs2 SoCs. Signed-off-by: Katsuhiro Suzuki <suzuki.katsuhiro@socionext.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: dts: uniphier: use proper SPDX-License-Identifier styleMasahiro Yamada2018-03-151-8/+6Star
| | | | | | | | | | | | According to Documentation/process/license-rules.rst, move the SPDX License Identifier to the very top of the file. I used C++ comment style not only for the SPDX line but for the entire block because this seems Linus' preference [1]. I also dropped the parentheses to follow the examples in that document. [1] https://lkml.org/lkml/2017/11/25/133 Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: dts: uniphier: add AVE ethernet nodeKunihiko Hayashi2018-03-151-0/+18
| | | | | | | | | Add nodes of the AVE ethernet controller for Pro4, PXs2, LD6b SoCs and the boards. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: dts: uniphier: add efuse node for UniPhier 32bit SoCKeiji Hayashibara2017-12-111-0/+18
| | | | | | | | Add efuse node for UniPhier LD4, Pro4, sLD8, Pro5 and PXs2. This efuse node is included in soc-glue. Signed-off-by: Keiji Hayashibara <hayashibara.keiji@socionext.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: dts: uniphier: use macros in dt-bindings headerMasahiro Yamada2017-12-111-0/+1
| | | | | | | The dt-bindings header was applied to the driver subsystem. I had to wait for a merge window to use it from DT. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: dts: uniphier: add resets propertiesMasahiro Yamada2017-10-231-0/+12
| | | | | | Add resets properties to all nodes that have reset lines. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: dts: uniphier: add GPIO controller nodesMasahiro Yamada2017-10-231-0/+17
| | | | | | | The GPIO controller also acts as an interrupt controller and the interrupt lines are connected to the AIDET block. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: dts: uniphier: fix W=2 build warningsMasahiro Yamada2017-10-151-2/+2
| | | | | | | | | | | | | | | Fix warnings like follows: Warning (node_name_chars_strict): Character '_' not recommended in ... Commit 8654cb8d0371 ("dtc: update warning settings for new bus and node/property name checks") says these checks are a bit subjective, but Rob also says to not add new W=2 warnings. The exising warnings should be fixed in order to catch new ones easily. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: dts: uniphier: add nodes of thermal monitor and thermal zone for PXs2Kunihiko Hayashi2017-10-151-4/+43
| | | | | | | | | | | | Add nodes of thermal monitor and thermal zone for UniPhier PXs2 SoC. The thermal monitor node is included in sysctrl. Since the efuse might not have a calibrated value of thermal monitor, this patch gives the default value for PXs2. Furthermore, add cpuN labels for reference in cooling-device property. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: dts: uniphier: fix size of sdctrl nodesMasahiro Yamada2017-08-281-1/+1
| | | | | | All registers are located within 0x400 size from the base address. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: dts: uniphier: add AIDET nodesMasahiro Yamada2017-08-281-0/+7
| | | | | | | Add UniPhier AIDET (ARM Interrupt Detector) nodes to support active low interrupts. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: dts: uniphier: add Denali NAND controller nodeMasahiro Yamada2017-08-151-0/+11
| | | | | | | | | Add NAND controller node to LD4, Pro4, sLD8, Pro5, and PXs2. Set up pinctrl to enable 2 chip select lines except Pro4. The CS1 for Pro4 is multiplexed with other peripherals such as UART2, so I did not enable it. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: dts: uniphier use #include instead of /include/Masahiro Yamada2017-08-151-1/+1
| | | | | | To include dt-bindings headers. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: dts: uniphier: use SPDX-License-IdentifierMasahiro Yamada2017-06-061-37/+1Star
| | | | | | | | | | | | | | Follow the recent trend for the license description, and fix the wrongly stated X11 to MIT. The X11 license text [1] is explicitly for the X Consortium and has a couple of extra clauses. The MIT license text [2] is actually what the current DT files claim. [1] https://spdx.org/licenses/X11.html [2] https://spdx.org/licenses/MIT.html Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: dts: uniphier: fix simple-bus unit address format errorMasahiro Yamada2017-06-061-1/+1
| | | | | | | | | | Compiling the UniPhier DT files with W=1, DTC warns like follows: Warning (simple_bus_reg): Node /soc/system-bus@58c00000/support_card@1,1f00000/ethernet@00000000 simple-bus unit address format error, expected "0" Warning (simple_bus_reg): Node /soc/system-bus@58c00000/support_card@1,1f00000/uart@000b0000 simple-bus unit address format error, expected "b0000" Warning (simple_bus_reg): Node /soc/smpctrl@59800000 simple-bus unit address format error, expected "59801000" Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: dts: uniphier: Use - instead of @ for DT OPP entriesViresh Kumar2017-06-061-8/+8
| | | | | | | | | | | | | | | | | Compiling the DT file with W=1, DTC warns like follows: Warning (unit_address_vs_reg): Node /opp_table0/opp@1000000000 has a unit name, but no reg property Fix this by replacing '@' with '-' as the OPP nodes will never have a "reg" property. Reported-by: Krzysztof Kozlowski <krzk@kernel.org> Reported-by: Masahiro Yamada <yamada.masahiro@socionext.com> Suggested-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: dts: uniphier: remove skeleton.dtsi inclusionMasahiro Yamada2017-03-061-2/+2
| | | | | | | Commit 9c0da3cc61f1 ("ARM: dts: explicitly mark skeleton.dtsi as deprecated") declared that skeleton.dtsi was deprecated. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: dts: uniphier: make 32bit SoC DTSI linearMasahiro Yamada2016-11-051-115/+238
| | | | | | | | | | | | | | | | | | | I notice some mistakes in the SoC DTSI; wrong interrupts properties of timer nodes, mismatch between the node name and the compatible for sdctrl block. Given those problems fixed, the common parts among SoCs are less than I had first expected. The more and more property overrides are making the SoC DTSI unreadable. Stretch out the SoC DTSI files and fix the following: - Fix the 3rd cell of the interrupts property of the timer nodes for Pro4, Pro5, PXs2 - Fix the node name mioctrl to sdctrl for Pro5, PXs2 - Fix the second region of l2 node for PXs2 Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: dts: uniphier: add CPU clocks and OPP table for PXs2 SoCMasahiro Yamada2016-11-051-0/+46
| | | | | | | | Add a CPU clock to every CPU node and a CPU OPP table to use the generic cpufreq driver. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
* ARM: dts: uniphier: change MIO node to SD control nodeMasahiro Yamada2016-10-221-2/+2
| | | | | | | I made a mistake bacuse the Media I/O block is not implemented in these SoCs. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: dts: uniphier: use clock/reset controllersMasahiro Yamada2016-08-301-19/+31
| | | | | | | | The UniPhier reset controller driver has been merged. Enable it. Also, replace the fixed-rate clocks with the dedicated clock drivers. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: dts: uniphier: switch over to PSCIMasahiro Yamada2016-08-301-1/+4
| | | | | | Use PSCI for enable-method instead of SoC specific implementation. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: dts: uniphier: match DT names to other projects and documentsMasahiro Yamada2016-08-301-0/+210
All UniPhier device trees have the common prefix "uniphier-", so "ph1-" is just making names longer. Recent documents and other projects are not using PH1- prefixes any more. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>