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* ARM: imx: add timer stop flag to ARM power off stateStefan Agner2018-02-121-0/+1
| | | | | | | | | | | | | | | | | | | | When the CPU is in ARM power off state the ARM architected timers are stopped. The flag is already present in the higher power WAIT mode. This allows to use the ARM generic timer on i.MX 6UL/6ULL SoC. Without the flag the kernel freezes when the timer enters the first time ARM power off mode. Note: The default timer on i.MX6SX is the i.MX GPT timer which is not disabled during CPU idle. However, the timer is not affected by the CPUIDLE_FLAG_TIMER_STOP flag. The flag only affects CPU local timers. Cc: Anson Huang <anson.huang@nxp.com> Signed-off-by: Stefan Agner <stefan@agner.ch> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* ARM: imx: add cpuidle support for i.mx6ulAnson Huang2016-08-291-0/+10
| | | | | | | | | | | | | | | | | | | This patch enables cpuidle driver for i.MX6UL, it reuses i.MX6SX's cpuidle driver, 3 levels of cpuidle supported: 1. ARM WFI; 2. SOC in WAIT mode; 3. SOC in WAIT mode + ARM power off. As i.MX6UL has cortex-A7 CORE with an internal L2 cache, so flushing it before powering down ARM platform is necessary, flush_cache_all() in last step of cpu_suspend has very small overhead, just call it to avoid cache type check for different platforms. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* ARM: imx: enable WAIT mode hardware workaround for imx6sxAnson Huang2016-08-291-0/+1
| | | | | | | | | | | Need to enable INT_MEM_CLK_LPM bit in CCM_CGPR for WAIT mode, without this bit set, if there is pending interrupt during ARM platform entering WAIT mode without power gating, cache data will be corrupted, this is a hardware workaround for WAIT mode and must be enabled. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* ARM: imx6: set initial power mode in pm functionShawn Guo2015-06-031-2/+2
| | | | | | | | | | | Rather than setting initial low-power mode in every single i.MX6 clock initialization function, we should really do that in pm code. Let's move imx6q_set_lpm(WAIT_CLOCKED) call into imx6_pm_common_init(). While at it, let's rename the function to imx6_set_lpm() since it's actually common for all i.MX6 SoCs. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: cpuidle: Remove duplicate header inclusionDaniel Lezcano2015-03-231-1/+0Star
| | | | | | | | | | | | | | The cpu_do_idle() function is always used by the cpuidle drivers. That led to have each driver including cpuidle.h and proc-fns.h, they are always paired. That makes a lot of duplicate headers inclusion. Instead of including both in each .c file, move the proc-fns.h header inclusion in the cpuidle.h header file directly, so we can save some line of code. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Kevin Hilman <khilman@linaro.org> Acked-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Tested-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
* ARM: imx: drop CPUIDLE_FLAG_TIME_VALID from cpuidle-imx6sxShawn Guo2015-01-061-3/+1Star
| | | | | | | | | | | | | | | As the result of commit b82b6cca4880 ("cpuidle: Invert CPUIDLE_FLAG_TIME_VALID logic"), the flag gets removed and hence we see the compile error below. CC arch/arm/mach-imx/cpuidle-imx6sx.o arch/arm/mach-imx/cpuidle-imx6sx.c:69:13: error: ‘CPUIDLE_FLAG_TIME_VALID’ undeclared here (not in a function) Since the behavior of the original flag has been the default, we can simply drop the flag now. Reported-by: kbuild test robot <fengguang.wu@intel.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: imx: support arm power off in cpuidle for i.mx6sxAnson Huang2015-01-051-0/+107
This patch introduces an independent cpuidle driver for i.MX6SX, and supports arm power off in idle, totally 3 levels of cpuidle are supported as below: 1. ARM WFI; 2. SOC in WAIT mode; 3. SOC in WAIT mode + ARM power off. ARM power off can save at least 5mW power. This patch also replaces imx6q_enable_rbc with imx6_enable_rbc. Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>