summaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-kirkwood
Commit message (Collapse)AuthorAgeFilesLines
...
| * [ARM] Kirkwood: allow configuring mbus window for on-chip sramLennert Buytenhek2008-09-252-4/+9
| | | | | | | | Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
| * [ARM] Kirkwood: remove uart1 init calls for boards that don't expose uart1Ronen Shitrit2008-09-252-2/+0Star
| | | | | | | | | | | | | | | | Remove uart1 init calls for boards that use the physical pins onto which the UART1 signals are multiplexed for different purposes. Signed-off-by: Ronen Shitrit <rshitrit@marvell.com> Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
| * [ARM] Kirkwood: add support for newer SoC modelsRonen Shitrit2008-09-254-9/+56
| | | | | | | | | | | | | | | | | | | | | | | | Add support to the Kirkwood port for newer device models and silicon revisions. Instead of looking at the DEVICE_ID register, the device version is now determined by looking at the PCI-Express device ID and revision registers, as it is done for orion5x, and this information is used to determine the TCLK frequency, again, as it is done for orion5x. Signed-off-by: Ronen Shitrit <rshitrit@marvell.com> Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
| * [ARM] Kirkwood: prepare for runtime-determined timer tick rateRonen Shitrit2008-09-252-7/+16
| | | | | | | | | | | | | | | | | | | | Currently, kirkwood uses a hardcoded timer tick rate of 166 MHz, but the actual timer tick rate varies between different members of the SoC family. This patch prepares for runtime determination of the timer tick rate. Signed-off-by: Ronen Shitrit <rshitrit@marvell.com>
| * [ARM] Kirkwood: wire up ethernet error interruptLennert Buytenhek2008-09-252-1/+7
| | | | | | | | | | | | | | | | Wire up the ethernet port's error interrupt so that the mv643xx_eth driver can sleep for SMI event completion instead of having to busy-wait for it. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
* | mv643xx_eth: remove force_phy_addr fieldLennert Buytenhek2008-09-053-3/+3
|/ | | | | | | | | | | | | | | Currently, there are two different fields in the mv643xx_eth_platform_data struct that together describe the PHY address -- one field (phy_addr) has the address of the PHY, but if that address is zero, a second field (force_phy_addr) needs to be set to distinguish the actual address zero from a zero due to not having filled in the PHY address explicitly (which should mean 'use the default PHY address'). If we are a bit smarter about the encoding of the phy_addr field, we can avoid the need for a second field -- this patch does that. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
* [ARM] Kirkwood: instantiate the orion_spi driver in the platform codeLennert Buytenhek2008-08-093-0/+54
| | | | Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
* [ARM] Kirkwood: Instantiate mv_xor driverSaeed Bishara2008-08-094-0/+220
| | | | | Signed-off-by: Saeed Bishara <saeed@marvell.com> Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
* [ARM] Move include/asm-arm/plat-orion to arch/arm/plat-orion/include/platLennert Buytenhek2008-08-094-7/+7
| | | | | | | This patch performs the equivalent include directory shuffle for plat-orion, and fixes up all users. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
* [ARM] Move include/asm-arm/arch-* to arch/arm/*/include/machRussell King2008-08-0717-5/+390
| | | | | | This just leaves include/asm-arm/plat-* to deal with. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* Merge git://git.kernel.org/pub/scm/linux/kernel/git/sam/kbuild-fixesRussell King2008-08-071-0/+3
|\
| * mv643xx_eth: use auto phy polling for configuring (R)(G)MII interfaceLennert Buytenhek2008-07-241-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The mv643xx_eth hardware has a provision for polling the PHY's MII management registers to obtain the (R)(G)MII interface speed (10/100/1000) and duplex (half/full) and pause (off/symmetric) settings to use to talk to the PHY. The driver currently does not make use of this feature. Instead, whenever there is a link status change event, it reads the current link parameters from the PHY, and programs those parameters into the mv643xx_eth MAC by hand. This patch switches the mv643xx_eth driver to letting the MAC auto-determine the (R)(G)MII link parameters by PHY polling, if there is a PHY present. For PHYless ports (when e.g. the (R)(G)MII interface is connected to a hardware switch), we keep hardcoding the MII interface parameters. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
* | [ARM] Remove asm/hardware.h, use asm/arch/hardware.h insteadRussell King2008-08-071-1/+1
|/ | | | | | | | | Remove includes of asm/hardware.h in addition to asm/arch/hardware.h. Then, since asm/hardware.h only exists to include asm/arch/hardware.h, update everything to directly include asm/arch/hardware.h and remove asm/hardware.h. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] Kirkwood: use chip_delaySaeed Bishara2008-06-301-0/+1
| | | | | Signed-off-by: Saeed Bishara <saeed@marvell.com> Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
* [ARM] Kirkwood: support L2 writeback modeSaeed Bishara2008-06-301-1/+6
| | | | | | | | | | This patch allows booting Kirkwood with the L2 in writeback mode, by reading the WT override bit from the L2 config register and passing that into the Feroceon L2 init routine, instead of assuming that the WT override bit will always be set Signed-off-by: Saeed Bishara <saeed@marvell.com> Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
* [ARM] add Marvell Kirkwood (88F6000) SoC supportSaeed Bishara2008-06-2211-0/+991
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface, a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS interface, and IDMA/XOR engines, and depending on the model, also features one or two Gigabit Ethernet interfaces, two SATA II interfaces, one or two TWSI interfaces, one or two UARTs, a TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and an SDIO interface. This patch adds supports for the Marvell DB-88F6281-BP Development Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs, enabling support for the PCIe interface, the USB interface, the ethernet interfaces, the SATA interfaces, the TWSI interfaces, the UARTs, and the NAND controller. Signed-off-by: Saeed Bishara <saeed@marvell.com> Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>