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* [ARM] Kirkwood: platform device registration for the crypto engineNicolas Pitre2009-06-082-0/+40
| | | | Signed-off-by: Nicolas Pitre <nico@marvell.com>
* [ARM] Kirkwood: create a mapping for the Security Accelerator SRAMNicolas Pitre2009-06-083-8/+11
| | | | | | | | Always creating the physical mapping should do no harm, so let's remove the interface that was provided for its optional creation and make the mapping static. Signed-off-by: Nicolas Pitre <nico@marvell.com>
* [ARM] Kirkwood: let's use real size for resourcesNicolas Pitre2009-06-081-3/+1Star
| | | | | | | We don't have to define resources to the minimal physical window size as setup_cpu_win() will cope with smaller sizes already. Signed-off-by: Nicolas Pitre <nico@marvell.com>
* [ARM] Orion/Kirkwood: rename orion5x_wdt to orion_wdtNicolas Pitre2009-06-081-3/+3
| | | | | | | | | The Orion watchdog driver is also used on Kirkwood. Convention is to use orion5x for stuff specific to 88F5xxx Orion chips and simply "orion" for shared stuff across SoCs including Kirkwood. Signed-off-by: Nicolas Pitre <nico@marvell.com>
* [ARM] Kirkwood: Add the watchdog timer as a platform device.Thomas Reitmayr2009-06-082-0/+28
| | | | | | | | | | The Kirkwood architecture uses the same watchdog device as the Orion architecture. This patch adds orion5x_wdt as a platform device for Kirkwood. Signed-off-by: Thomas Reitmayr <treitmayr@devbase.at> Tested-by: Martin Michlmayr <tbm@cyrius.com> Signed-off-by: Nicolas Pitre <nico@marvell.com>
* [ARM] Kirkwood: clock gating for unused peripheralsRabeeh Khoury2009-06-084-0/+88
| | | | | | | | | | | To save power: 1. Enabling clock gating of unused peripherals 2. PLL and PHY of the units are also disabled (when possible. Signed-off-by: Rabeeh Khoury <rabeeh@marvell.com> Signed-off-by: Nicolas Pitre <nico@marvell.com>
* [ARM] Kirkwood: rationalize NAND setup a bitNicolas Pitre2009-06-086-91/+43Star
| | | | | | | | Common resource and platform device structures are moved to common.c and only the partition table and chip delay remains a per board parameter. Signed-off-by: Nicolas Pitre <nico@marvell.com>
* [ARM] orion: convert gpio to use gpiolibErik Benada2009-06-081-0/+3
| | | | | | | | Signed-off-by: Erik Benada <erikbenada@yahoo.ca> [ nico: fix locking, additional cleanups ] Signed-off-by: Nicolas Pitre <nico@marvell.com>
* [ARM] Kirkwood: comment type fixNicolas Pitre2009-06-081-1/+1
| | | | Signed-off-by: Nicolas Pitre <nico@marvell.com>
* [ARM] Kirkwood: only map peripheral register space onceNicolas Pitre2009-06-081-0/+25
| | | | | | | | | Just like commit 1419468ab548, let's save some TLB entries by making ioremap() return pointers into the boot-time Kirkwood peripheral iotable mapping whenever someone tries to ioremap any part of the Kirkwood peripheral register space. Signed-off-by: Nicolas Pitre <nico@marvell.com>
* [ARM] Kirkwood: enable gpio leds/buttons for the mv88f6281gtw_ge boardSiddarth Gore2009-06-081-0/+74
| | | | | Signed-off-by: Siddarth Gore <gores@marvell.com> Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
* [ARM] Kirkwood: add Marvell 88F6281 GTW GE board supportLennert Buytenhek2009-06-083-0/+106
| | | | Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
* [ARM] Kirkwood: CPU idle driverRabeeh Khoury2009-06-083-0/+99
| | | | | | | | | | The patch adds support for Kirkwood cpu idle. Two idle states are defined: 1. Wait-for-interrupt (replacing default kirkwood wfi) 2. Wait-for-interrupt and DDR self refresh Signed-off-by: Rabeeh Khoury <rabeeh@marvell.com> Signed-off-by: Nicolas Pitre <nico@marvell.com>
* [ARM] add coherent DMA mask for mv643xx_ethNicolas Pitre2009-05-221-0/+6
| | | | | | | | Since commit eb0519b5a1cf, mv643xx_eth is non functional on ARM because the platform device declaration does not include any coherent DMA mask and coherent memory allocations fail. Signed-off-by: Nicolas Pitre <nico@marvell.com>
* [ARM] Orion: Remove explicit name for platform device resourcesMartin Michlmayr2009-05-211-2/+0Star
| | | | | | | | | | Remove explicit names from platform device resources since they will automatically be named after the platform device they're associated with. Signed-off-by: Martin Michlmayr <tbm@cyrius.com> Acked-by: Russell King <linux@arm.linux.org.uk> Signed-off-by: Nicolas Pitre <nico@marvell.com>
* [ARM] Kirkwood: Correct MPP for SATA activity/presence LEDs of QNAP ↵Thomas Reitmayr2009-05-211-4/+2Star
| | | | | | | | | | | | TS-119/TS-219. For the QNAP TS-119 and TS-219 the wrong MPPs were used for the SATA activity/presence LEDs. The new settings make these LEDs work as expected. Signed-off-by: Thomas Reitmayr <treitmayr@devbase.at> Tested-by: Martin Michlmayr <tbm@cyrius.com> Signed-off-by: Nicolas Pitre <nico@marvell.com>
* [ARM] 5460/1: Orion: reduce namespace pollutionNicolas Pitre2009-04-247-42/+62
| | | | | | | | | | | | | | | | | Symbols like SOFT_RESET are way too generic to be exported at large. To avoid this, let's move the mbus bridge register defines into a separate file and include it where needed. This affects mach-kirkwood, mach-loki, mach-mv78xx0 and mach-orion5x simultaneously as they all share code in plat-orion which relies on those defines. Some other defines have been moved to narrower scopes, or simply deleted when they had no user. This fixes compilation problem with mpt2sas on the above listed platforms. Signed-off-by: Nicolas Pitre <nico@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* dma-mapping: replace all DMA_32BIT_MASK macro with DMA_BIT_MASK(32)Yang Hongyang2009-04-071-1/+1
| | | | | | | | Replace all DMA_32BIT_MASK macro with DMA_BIT_MASK(32) Signed-off-by: Yang Hongyang<yanghy@cn.fujitsu.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* dma-mapping: replace all DMA_64BIT_MASK macro with DMA_BIT_MASK(64)Yang Hongyang2009-04-071-4/+4
| | | | | | | | Replace all DMA_64BIT_MASK macro with DMA_BIT_MASK(64) Signed-off-by: Yang Hongyang<yanghy@cn.fujitsu.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* Merge branch 'origin' into develRussell King2009-03-282-5/+13
|\ | | | | | | | | Conflicts: sound/soc/pxa/pxa2xx-i2s.c
| * dsa: add switch chip cascading supportLennert Buytenhek2009-03-222-5/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The initial version of the DSA driver only supported a single switch chip per network interface, while DSA-capable switch chips can be interconnected to form a tree of switch chips. This patch adds support for multiple switch chips on a network interface. An example topology for a 16-port device with an embedded CPU is as follows: +-----+ +--------+ +--------+ | |eth0 10| switch |9 10| switch | | CPU +----------+ +-------+ | | | | chip 0 | | chip 1 | +-----+ +---++---+ +---++---+ || || || || ||1000baseT ||1000baseT ||ports 1-8 ||ports 9-16 This requires a couple of interdependent changes in the DSA layer: - The dsa platform driver data needs to be extended: there is still only one netdevice per DSA driver instance (eth0 in the example above), but each of the switch chips in the tree needs its own mii_bus device pointer, MII management bus address, and port name array. (include/net/dsa.h) The existing in-tree dsa users need some small changes to deal with this. (arch/arm) - The DSA and Ethertype DSA tagging modules need to be extended to use the DSA device ID field on receive and demultiplex the packet accordingly, and fill in the DSA device ID field on transmit according to which switch chip the packet is heading to. (net/dsa/tag_{dsa,edsa}.c) - The concept of "CPU port", which is the switch chip port that the CPU is connected to (port 10 on switch chip 0 in the example), needs to be extended with the concept of "upstream port", which is the port on the switch chip that will bring us one hop closer to the CPU (port 10 for both switch chips in the example above). - The dsa platform data needs to specify which ports on which switch chips are links to other switch chips, so that we can enable DSA tagging mode on them. (For inter-switch links, we always use non-EtherType DSA tagging, since it has lower overhead. The CPU link uses dsa or edsa tagging depending on what the 'root' switch chip supports.) This is done by specifying "dsa" for the given port in the port array. - The dsa platform data needs to be extended with information on via which port to reach any given switch chip from any given switch chip. This info is specified via the per-switch chip data struct ->rtable[] array, which gives the nexthop ports for each of the other switches in the tree. For the example topology above, the dsa platform data would look something like this: static struct dsa_chip_data sw[2] = { { .mii_bus = &foo, .sw_addr = 1, .port_names[0] = "p1", .port_names[1] = "p2", .port_names[2] = "p3", .port_names[3] = "p4", .port_names[4] = "p5", .port_names[5] = "p6", .port_names[6] = "p7", .port_names[7] = "p8", .port_names[9] = "dsa", .port_names[10] = "cpu", .rtable = (s8 []){ -1, 9, }, }, { .mii_bus = &foo, .sw_addr = 2, .port_names[0] = "p9", .port_names[1] = "p10", .port_names[2] = "p11", .port_names[3] = "p12", .port_names[4] = "p13", .port_names[5] = "p14", .port_names[6] = "p15", .port_names[7] = "p16", .port_names[10] = "dsa", .rtable = (s8 []){ 10, -1, }, }, }, static struct dsa_platform_data pd = { .netdev = &foo, .nr_switches = 2, .sw = sw, }; Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Tested-by: Gary Thomas <gary@mlbassoc.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | Merge git://git.marvell.com/orion into develRussell King2009-03-257-2/+272
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| * | [ARM] Kirkwood: Add support for QNAP TS-119/TS-219 Turbo NASMartin Michlmayr2009-03-234-0/+228
| | | | | | | | | | | | | | | | | | | | | Add support for the QNAP TS-119 and TS-219 Turbo NAS devices. Signed-off-by: Martin Michlmayr <tbm@cyrius.com> Signed-off-by: Nicolas Pitre <nico@marvell.com>
| * | [ARM] Kirkwood: More consistency regarding MPP namingMartin Michlmayr2009-03-231-2/+2
| | | | | | | | | | | | | | | | | | | | | With the exception of UART0, all MPP names are uppercase. Signed-off-by: Martin Michlmayr <tbm@cyrius.com> Signed-off-by: Nicolas Pitre <nico@marvell.com>
| * | [ARM] Kirkwood: Hook up I2CMartin Michlmayr2009-03-233-0/+42
| | | | | | | | | | | | | | | | | | | | | | | | Hook up I2C on Marvell Kirkwood. Tested on a QNAP TS-219 which has RTC connected through I2C. Signed-off-by: Martin Michlmayr <tbm@cyrius.com> Signed-off-by: Nicolas Pitre <nico@marvell.com>
* | | Merge branch 'master' of git://git.marvell.com/orion into develRussell King2009-03-2011-26/+677
|\| | | | | | | | | | | | | | | | | Conflicts: arch/arm/mach-mx1/devices.c
| * | [ARM] Kirkwood: SheevaPlug LED supportNicolas Pitre2009-03-161-0/+25
| | | | | | | | | | | | Signed-off-by: Nicolas Pitre <nico@marvell.com>
| * | [ARM] Kirkwood: SheevaPlug USB Power Enable setupNicolas Pitre2009-03-161-0/+13
| | | | | | | | | | | | | | | | | | | | | Ideally, the default should be set to 0 and let the EHCI driver turn it on as needed. This makes USB usable in the mean time. Signed-off-by: Nicolas Pitre <nico@marvell.com>
| * | [ARM] Kirkwood: Marvell SheevaPlug supportShadi Ammouri2009-03-163-0/+105
| | | | | | | | | | | | Signed-off-by: Nicolas Pitre <nico@marvell.com>
| * | [ARM] Kirkwood: register internal devices in a common placeNicolas Pitre2009-02-275-13/+8Star
| | | | | | | | | | | | | | | | | | | | | The RTC and the two XOR engines are internal to the chip, and therefore always available since they don't depend on a particular board layout. Signed-off-by: Nicolas Pitre <nico@marvell.com>
| * | [ARM] Kirkwood: remove unneeded includes from board setup filesNicolas Pitre2009-02-273-13/+2Star
| | | | | | | | | | | | Signed-off-by: Nicolas Pitre <nico@marvell.com>
| * | [ARM] Kirkwood: add NAND support to the DB88F6281 boardNicolas Pitre2009-02-271-1/+46
| | | | | | | | | | | | Signed-off-by: Nicolas Pitre <nico@marvell.com>
| * | [ARM] Kirkwood: SDIO driver registration for DB6281 and RD6281Nicolas Pitre2009-02-275-0/+77
| | | | | | | | | | | | Signed-off-by: Nicolas Pitre <nico@marvell.com>
| * | [ARM] Kirkwood: enable both XOR engines on the 6281 RD boardLennert Buytenhek2009-02-201-0/+2
| | | | | | | | | | | | Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
| * | [ARM] Kirkwood: MPP initialization codeNicolas Pitre2009-02-203-1/+401
| |/ | | | | | | | | | | | | | | This allows for board support code to set up their MPP config if the bootloader didn't do it all or did it wrong. This also allows to register usable GPIOs. Signed-off-by: Nicolas Pitre <nico@marvell.com>
* / [ARM] pass reboot command line to arch_reset()Russell King2009-03-191-1/+1
|/ | | | | | | | | | | | | | | OMAP wishes to pass state to the boot loader upon reboot in order to instruct it whether to wait for USB-based reflashing or not. There is already a facility to do this via the reboot() syscall, except we ignore the string passed to machine_restart(). This patch fixes things to pass this string to arch_reset(). This means that we keep the reboot mode limited to telling the kernel _how_ to perform the reboot which should be independent of what we request the boot loader to do. Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 5401/1: Orion: fix edge triggered GPIO interrupt supportNicolas Pitre2009-02-171-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The GPIO interrupts can be configured as either level triggered or edge triggered, with a default of level triggered. When an edge triggered interrupt is requested, the gpio_irq_set_type method is called which currently switches the given IRQ descriptor between two struct irq_chip instances: orion_gpio_irq_level_chip and orion_gpio_irq_edge_chip. This happens via __setup_irq() which also calls irq_chip_set_defaults() to assign default methods to uninitialized ones. The problem is that irq_chip_set_defaults() is called before the irq_chip reference is switched, leaving the new irq_chip (orion_gpio_irq_edge_chip in this case) with uninitialized methods such as chip->startup() causing a kernel oops. Many solutions are possible, such as making irq_chip_set_defaults() global and calling it from gpio_irq_set_type(), or calling __irq_set_trigger() before irq_chip_set_defaults() in __setup_irq(). But those require modifications to the generic IRQ code which might have adverse effect on other architectures, and that would still be a fragile arrangement. Manually copying the missing methods from within gpio_irq_set_type() would be really ugly and it would break again the day new methods with automatic defaults are added. A better solution is to have a single irq_chip instance which can deal with both edge and level triggered interrupts. It is also a good idea to switch the IRQ handler instead, as the edge IRQ handler allows for one edge IRQ event to be queued as the IRQ is actually masked only when that second IRQ is received, at which point the hardware can queue an additional IRQ event, making edge triggered interrupts a bit more reliable. Tested-by: Martin Michlmayr <tbm@cyrius.com> Signed-off-by: Nicolas Pitre <nico@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 5357/1: Kirkwood: add missing ge01 tclk initializationNicolas Pitre2009-01-081-0/+1
| | | | | | | Otherwise the mv643xx_eth driver will assume 133 MHz which is incorrect. Signed-off-by: Nicolas Pitre <nico@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 5359/1: Kirkwood: fix compilation errorNicolas Pitre2009-01-081-0/+1
| | | | | | | Commit ba84be2338d3 broke the build. Signed-off-by: Nicolas Pitre <nico@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] Kirkwood: implement GPIO and GPIO interrupt supportLennert Buytenhek2008-12-204-6/+74
| | | | | Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Signed-off-by: Nicolas Pitre <nico@marvell.com>
* Merge git://git.marvell.com/orion into develRussell King2008-12-134-1/+76
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| * [ARM] Kirkwood: properly handle the WAN port on newer RD88F6281 boardsRonen Shitrit2008-12-111-1/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | On newer versions of the RD88F6281 board, the WAN port is connected to its own ethernet port on the CPU, via a separate PHY, whereas on older versions of the board, it is connected to one of the PHYs in the ethernet switch. In the RD8F6281 setup code, detect which version of the board we are running on, and instantiate the ethernet ports and switch driver accordingly. Signed-off-by: Ronen Shitrit <rshitrit@marvell.com> Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Signed-off-by: Nicolas Pitre <nico@marvell.com>
| * [ARM] Kirkwood: allow instantiating the second ethernet portRonen Shitrit2008-12-113-0/+60
| | | | | | | | | | | | | | | | | | | | The 88f6192 and 88f6281 Kirkwood SoCs support two ethernet ports. Add the platform glue that will allow board support files to instantiate the second ethernet port. Signed-off-by: Ronen Shitrit <rshitrit@marvell.com> Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Signed-off-by: Nicolas Pitre <nico@marvell.com>
| * [ARM] Orion: add the option to support different ehci phy initializationRonen Shitrit2008-12-041-0/+1
| | | | | | | | | | | | | | | | | | The Orion ehci driver serves the Orion, kirkwood and DD Soc families. Since each of those integrate a different USB phy we should have the ability to use few initialization sequences or to leave the boot loader phy settings as is. Signed-off-by: Ronen Shitrit <rshitrit@marvell.com>
* | [ARM] Hide ISA DMA API when ISA_DMA_API is unsetRussell King2008-11-291-1/+0Star
| | | | | | | | | | | | | | | | | | | | | | | | | | When ISA_DMA_API is unset, we're not implementing the ISA DMA API, so there's no point in publishing the prototypes via asm/dma.h, nor including the machine dependent parts of that API. This allows us to remove a lot of mach/dma.h files which don't contain any useful code. Unfortunately though, some platforms put their own private non-ISA definitions into mach/dma.h, so we leave these behind and fix the appropriate #include statments. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | [ARM] remove a common set of __virt_to_bus definitionsNicolas Pitre2008-11-281-4/+0Star
|/ | | | | | | | | | | | | | | | Let's provide an overridable default instead of having every machine class define __virt_to_bus and __bus_to_virt to the same thing. What most platforms are using is bus_addr == phys_addr so such is the default. One exception is ebsa110 which has no DMA what so ever, so the actual definition is not important except only for proper compilation. Also added a comment about the special footbridge bus translation. Let's also remove comments alluding to set_dma_addr which is not (and should not) be commonly used. Signed-off-by: Nicolas Pitre <nico@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 5321/1: Kirkwood: fix typo in MakefileNicolas Pitre2008-10-231-1/+1
| | | | | Signed-off-by: Nicolas Pitre <nico@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] Orion: instantiate the dsa switch driverLennert Buytenhek2008-10-193-0/+48
| | | | | | | | | | | | | This adds DSA switch instantiation hooks to the orion5x and the kirkwood ARM SoC platform code, and instantiates the DSA switch driver on the 88F5181L FXO RD, the 88F5181L GE RD, the 6183 AP GE RD, the Linksys WRT350n v2, and the 88F6281 RD boards. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Tested-by: Nicolas Pitre <nico@marvell.com> Tested-by: Peter van Valderen <linux@ddcrew.com> Tested-by: Dirk Teurlings <dirk@upexia.nl> Signed-off-by: Nicolas Pitre <nico@marvell.com>
* Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2008-10-119-26/+97
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (236 commits) [ARM] 5300/1: fixup spitz reset during boot [ARM] 5295/1: make ZONE_DMA optional [ARM] 5239/1: Palm Zire 72 power management support [ARM] 5298/1: Drop desc_handle_irq() [ARM] 5297/1: [KS8695] Fix two compile-time warnings [ARM] 5296/1: [KS8695] Replace macro's with trailing underscores. [ARM] pxa: allow multi-machine PCMCIA builds [ARM] pxa: add preliminary CPUFREQ support for PXA3xx [ARM] pxa: add missing ACCR bit definitions to pxa3xx-regs.h [ARM] pxa: rename cpu-pxa.c to cpufreq-pxa2xx.c [ARM] pxa/zylonite: add support for USB OHCI [ARM] ohci-pxa27x: use ioremap() and offset for register access [ARM] ohci-pxa27x: introduce pxa27x_clear_otgph() [ARM] ohci-pxa27x: use platform_get_{irq,resource} for the resource [ARM] ohci-pxa27x: move OHCI controller specific registers into the driver [ARM] ohci-pxa27x: introduce flags to avoid direct access to OHCI registers [ARM] pxa: move I2S register and bit definitions into pxa2xx-i2s.c [ARM] pxa: simplify DMA register definitions [ARM] pxa: make additional DCSR bits valid for PXA3xx [ARM] pxa: move i2c register and bit definitions into i2c-pxa.c ... Fixed up conflicts in arch/arm/mach-versatile/core.c sound/soc/pxa/pxa2xx-ac97.c sound/soc/pxa/pxa2xx-i2s.c manually.
| * [ARM] Kirkwood: add support for L2 cache WB/WT selectionRonen Shitrit2008-09-251-3/+9
| | | | | | | | | | | | | | | | Feroceon L2 cache can work in eighther write through or write back mode on Kirkwood. Add the option to configure this mode according to Kconfig. Signed-off-by: Ronen Shitrit <rshitrit@marvell.com> Signed-off-by: Nicolas Pitre <nico@marvell.com>
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