openslx/kernel-qcow2-linux.git - In-kernel qcow2 (Kernel part)

	Commit message (Collapse)	Author	Age	Files	Lines
*	ARM: Orion: mbus_dram_info consolidation	Andrew Lunn	2011-12-14	1	-4/+0
\| \| \| \| \| \| \| \| \| \|	Move the *_mbus_dram_info structure into the orion platform and call it orion_mbus_dram_info everywhere. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Michael Walle <michael@walle.cc> Acked-by: Nicolas Pitre <nico@linaro.org> Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
*	ARM: Orion: Consolidate the address map setup	Andrew Lunn	2011-12-14	1	-81/+21
\| \| \| \| \| \| \| \| \|	Compile tested on Dove, orion5x, mv78xx0. Boot tested on Kirkwood. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Michael Walle <michael@walle.cc> Acked-by: Nicolas Pitre <nico@linaro.org> Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
*	[ARM] Convert asm/io.h to linux/io.h	Russell King	2008-09-06	1	-1/+1
\| \| \| \|	Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
*	[ARM] add Marvell 78xx0 ARM SoC support	Stanislav Samsonov	2008-06-22	1	-0/+156
	The Marvell Discovery Duo (MV78xx0) is a family of ARM SoCs featuring (depending on the model) one or two Feroceon CPU cores with 512K of L2 cache and VFP coprocessors running at (depending on the model) between 800 MHz and 1.2 GHz, and features a DDR2 controller, two PCIe interfaces that can each run either in x4 or quad x1 mode, three USB 2.0 interfaces, two 3Gb/s SATA II interfaces, a SPI interface, two TWSI interfaces, a crypto accelerator, IDMA/XOR engines, a SPI interface, four UARTs, and depending on the model, two or four gigabit ethernet interfaces. This patch adds basic support for the platform, and allows booting on the MV78x00 development board, with functional UARTs, SATA, PCIe, GigE and USB ports. Signed-off-by: Stanislav Samsonov <samsonov@marvell.com> Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>