summaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-omap2/id.c
Commit message (Collapse)AuthorAgeFilesLines
* ARM: OMAP: TI814X: Add cpu type macros and detection supportHemant Pedanekar2011-12-131-0/+21
| | | | | | | | This patch adds cpu type, macros for identification of TI814X device. Signed-off-by: Hemant Pedanekar <hemantp@ti.com> [tony@atomide.com: left out CK_TI814X for now] Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: OMAP: TI81XX: Prepare for addition of TI814X supportHemant Pedanekar2011-12-131-4/+4
| | | | | | | | | | | | | | | | | This patch updates existing macros, functions used for TI816X, to enable addition of other SoCs belonging to TI81XX family (e.g., TI814X). The approach taken is to use TI81XX/ti81xx for code/data going to be common across all TI81XX devices. cpu_is_ti81xx() is introduced to handle code common across TI81XX devices. In addition, ti8168_evm_map_io() is now replaced with ti81xx_map_io() and moved in mach-omap2/common.c as same will be used for TI814X and is not board specific. Signed-off-by: Hemant Pedanekar <hemantp@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: OMAP: ID: Chip detection for OMAP4470Leonid Iziumtsev2011-12-131-1/+9
| | | | | | | | | | Add support for detection of the next chip in the OMAP4 family: OMAP4470 ES1.0 For more details on OMAP4470, visit: http://focus.ti.com/general/docs/wtbu/wtbuproductcontent.tsp?templateId=6123&navigationId=12869&contentId=123362 Signed-off-by: Leonid Iziumtsev <x0153368@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: OMAP: id: add chip id recognition for omap4430 es2.3David Anders2011-12-131-2/+5
| | | | | | | | | | | | | | | allow for the omap4430 es2.3 revision to be recognized in the omap4_check_revision() function. most aspects of all omap4430 es2.x versions are identical, however a number of small variations such as default pullup or pulldown resistor configurations vary between revisions. detailed information on silicon errata for omap4430 revisions can be found at http://focus.ti.com/pdfs/wtbu/swpz009D.pdf Signed-off-by: David Anders <x0132446@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: OMAP: am33xx: Update common OMAP machine specific sourcesAfzal Mohammed2011-12-131-0/+6
| | | | | | | | | | | | | This patch updates the common machine specific source files for support for AM33XX/AM335x with cpu type, macros for identification of AM33XX/AM335X device. Signed-off-by: Afzal Mohammed <afzal@ti.com> Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Tested-by: Kevin Hilman <khilman@ti.com> [tony@atomide.com: updated for map_io and common.h changes, dropped CK_AM33XX] Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: 7159/1: OMAP: Introduce local common.h filesTony Lindgren2011-11-171-1/+1
| | | | | | | | | | | As suggested by Russell King - ARM Linux <linux@arm.linux.org.uk>, there's no need to keep local prototypes in non-local headers. Add mach-omap1/common.h and mach-omap2/common.h and move the local prototypes there from plat/common.h and mach/omap4-common.h. Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* Merge branch 'for_3.2/pm-cleanup-2' of ↵Tony Lindgren2011-11-051-1/+4
|\ | | | | | | git://github.com/khilman/linux-omap-pm into fixes
| * ARM: OMAP3: PM: fix I/O wakeup and I/O chain clock control detectionPaul Walmsley2011-10-071-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The way that we detect which OMAP3 chips support I/O wakeup and software I/O chain clock control is broken. Currently, I/O wakeup is marked as present for all OMAP3 SoCs other than the AM3505/3517. The TI81xx family of SoCs are at present considered to be OMAP3 SoCs, but don't support I/O wakeup. To resolve this, convert the existing blacklist approach to an explicit, whitelist support, in which only SoCs which are known to support I/O wakeup are listed. (At present, this only includes OMAP34xx, OMAP3503, OMAP3515, OMAP3525, OMAP3530, and OMAP36xx.) Also, the current code incorrectly detects the presence of a software-controllable I/O chain clock on several chips that don't support it. This results in writes to reserved bitfields, unnecessary delays, and console messages on kernels running on those chips: http://www.spinics.net/lists/linux-omap/msg58735.html Convert this test to a feature test with a chip-by-chip whitelist. Thanks to Dave Hylands <dhylands@gmail.com> for reporting this problem and doing some testing to help isolate the cause. Thanks to Steve Sakoman <sakoman@gmail.com> for catching a bug in the first version of this patch. Thanks to Russell King <linux@arm.linux.org.uk> for comments. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Dave Hylands <dhylands@gmail.com> Cc: Steve Sakoman <sakoman@gmail.com> Tested-by: Steve Sakoman <sakoman@gmail.com> Cc: Russell King - ARM Linux <linux@arm.linux.org.uk> Signed-off-by: Kevin Hilman <khilman@ti.com>
* | OMAP: id: remove OMAP_CHIP declarations, codePaul Walmsley2011-09-151-55/+0Star
| | | | | | | | | | | | | | | | | | | | Now that all of the users of the OMAP_CHIP bitfield code have been converted to use lists, the OMAP_CHIP code, data, and declarations can be removed. Signed-off-by: Paul Walmsley <paul@pwsan.com>
* | OMAP3: id: remove duplicate code for testing SoC ES levelPaul Walmsley2011-09-141-57/+23Star
| | | | | | | | | | | | | | | | | | | | | | | | omap3_cpuinfo() contains essentially duplicated code from omap3_check_revision(), just for the purpose of determining the chip ES level. Set the cpu_rev char array pointer in omap3_check_revision() instead, and drop the now-useless code from omap3_cpuinfo(). Signed-off-by: Paul Walmsley <paul@pwsan.com> Tested-by: Igor Grinberg <grinberg@compulab.co.il> Tested-by: Abhilash Koyamangalath <abhilash.kv@ti.com>
* | OMAP3: id: add fallthrough warning; fix some CodingStyle issuesPaul Walmsley2011-09-141-5/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Emit a warning to the console in omap3_check_revision() if that code cannot determine what type of SoC the system is currently running on. Remove some extra whitespace, remove some duplicate code, and add an appropriate comment to a fallthrough case. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Hemant Pedanekar <hemantp@ti.com> Tested-by: Igor Grinberg <grinberg@compulab.co.il> Tested-by: Abhilash Koyamangalath <abhilash.kv@ti.com>
* | OMAP3: id: use explicit omap_revision codes for 3505/3517 ES levelsPaul Walmsley2011-09-141-1/+9
| | | | | | | | | | | | | | | | | | | | | | Use explicit revision codes for OMAP/AM 3505/3517 ES levels, as the rest of the OMAP2+ SoCs do in mach-omap2/cpu.c. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Sanjeev Premi <premi@ti.com> Tested-by: Igor Grinberg <grinberg@compulab.co.il> Tested-by: Abhilash Koyamangalath <abhilash.kv@ti.com>
* | OMAP3: id: remove useless strcpy()sPaul Walmsley2011-09-141-26/+22Star
| | | | | | | | | | | | | | | | | | omap3_cpuinfo() is filled with useless strcpy() calls; remove them. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Sanjeev Premi <premi@ti.com> Tested-by: Igor Grinberg <grinberg@compulab.co.il> Tested-by: Abhilash Koyamangalath <abhilash.kv@ti.com>
* | OMAP3: id: remove identification codes that only correspond to marketing namesPaul Walmsley2011-09-141-12/+7Star
|/ | | | | | | | | | | | | | | | | | | | | | | | | The OMAP3505/AM3505 appears to be based on the same silicon as the OMAP3517/AM3517, with some features disabled via eFuse bits. Follow the same practice as OMAP3430 and identify these devices internally as part of the OMAP3517/AM3517 family. The OMAP3503/3515/3525/3530 chips appear to be based on the same silicon as the OMAP3430, with some features disabled via eFuse bits. Identify these devices internally as part of the OMAP3430 family. Remove the old OMAP35XX_CLASS, which actually covered two very different chip families. The OMAP3503/3515/3525/3530 chips will now be covered by OMAP343X_CLASS, since the silicon appears to be identical. For the OMAP3517/AM3517 family, create a new class, OMAP3517_CLASS. Thanks to Tony Lindgren <tony@atomide.com> for some help with the second revision of this patch. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Sanjeev Premi <premi@ti.com> Cc: Tony Lindgren <tony@atomide.com> Tested-by: Igor Grinberg <grinberg@compulab.co.il> Tested-by: Abhilash Koyamangalath <abhilash.kv@ti.com>
* OMAP4: ID: add omap_has_feature for max freq supportedAneesh V2011-07-081-7/+33
| | | | | | | | | | | | | | Macros for identifying the max frequency supported by various OMAP4 variants - Expanding along the lines of OMAP3's feature handling. [nm@ti.com: minor fixes for checks that should only for 443x|446x] Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Rajendra Nayak <rnayak@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Reviewed-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* OMAP: ID: introduce chip detection for OMAP4460Aneesh V2011-07-081-2/+11
| | | | | | | | | | | | | | | | | | | | | | | Add support for detecting the latest in the OMAP4 family: OMAP4460 Among other changes, the new chip also can support 1.5GHz A9s, 1080p stereoscopic 3D and 12 MP stereo (dual camera). In addition, we have changes to OPPs supported, clock tree etc, hence having a chip detection is required. For more details on OMAP4460, see Highlights: http://focus.ti.com/general/docs/wtbu/wtbuproductcontent.tsp?contentId=53243&navigationId=12843&templateId=6123 Public TRM is available here as usual: http://focus.ti.com/general/docs/wtbu/wtbudocumentcenter.tsp?templateId=6123&navigationId=12667 [nm@ti.com: cleanups and introduction of ramp system] Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Rajendra Nayak <rnayak@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Reviewed-by: Paul Walmsley <paul@pwsan.com> [tony@atomide.com: updated to not use CHIP_IS_OMAP44XX] Signed-off-by: Tony Lindgren <tony@atomide.com>
* OMAP2+: Common CPU DIE ID reading code reads wrong registers for OMAP4430Andy Green2011-03-141-0/+13
| | | | | | | | | This adapts the register offsets used to read the CPU DIE ID registers when run on 44XX so they match what is in the OMAP4430 Reference Manual page 269 Signed-off-by: Andy Green <andy.green@linaro.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
* omap: Add chip id recognition for OMAP4 ES2.1 and ES2.2Nishant Kamat2011-02-181-11/+20
| | | | | | | | | | | | | | | | | | | | | | | Allow OMAP4 ES2.1 and ES2.2 revisions to be recognized in the omap4_check_revision() function. Mainly, ES2.1 has fixes that allow LPDDR to be used at 100% OPP (400MHz). ES2.2 additionally has a couple of power management fixes (to reduce leakage), an I2C1 SDA line state fix, and a floating point write corruption fix (cortex erratum). Even though the current mainline support doesn't need to distinguish between ES2.X versions, it's still useful to know the correct silicon rev when issues are reported. Moreover, these id checks can be used by power management code that selects suitable OPPs considering the memory speed limitation on ES2.0. For details about the silicon errata on OMAP4430, refer http://focus.ti.com/pdfs/wtbu/SWPZ009A_OMAP4430_Errata_Public_vA.pdf Signed-off-by: Nishant Kamat <nskamat@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* TI816X: Update common OMAP machine specific sourcesHemant Pedanekar2011-02-161-2/+31
| | | | | | | | | This patch updates the common machine specific source files with support for TI816X. Signed-off-by: Hemant Pedanekar <hemantp@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* OMAP: control: move plat-omap/control.h to mach-omap2/control.hPaul Walmsley2010-10-081-1/+2
| | | | | | | | | | | | | | | | | Only OMAP2+ platforms have the System Control Module (SCM) IP block. In the past, we've kept the SCM header file in plat-omap. This has led to abuse - device drivers including it; includes being added that create implicit dependencies on OMAP2+ builds; etc. In response, move the SCM headers into mach-omap2/. As part of this, remove the direct SCM access from the OMAP UDC driver. It was clearly broken. The UDC code needs an indepth review for use on OMAP2+ chips. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Cory Maccarrone <darkstar6262@gmail.com> Cc: Kyungmin Park <kyungmin.park@samsung.com>
* omap2/3: Update revision identificationSanjeev Premi2010-10-021-24/+48
| | | | | | | | | | | | The existing definitions for cpu revision used upper nibble in the bits[15:08]. With OMAP3630, definitions use lower nibble. This patch unifies the definitions to start at lower nibble. Signed-off-by: Sanjeev Premi <premi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* Merge branch 'omap4_and_sdrc_2.6.27' of git://git.pwsan.com/linux-2.6 into ↵Tony Lindgren2010-09-271-1/+1
|\ | | | | | | omap-for-linus
| * omap4: control: Fix the control module register accessesSantosh Shilimkar2010-09-271-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch has multiple fixes together. To ensure that git bisect work across commits, all changes are clubbed together 1. Move the common control base address to control core 2. Remove the manually coeded defines and use the ones from headers. 3. Fix the the status register define in id.c for OMAP4 4. Fix all the register define in hsmmc.c 5. Use the control pad accessor API for omap4 hsmmc register accesses Signed-off-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
* | omap4: Update id.c and cpu.h for es2.0Santosh Shilimkar2010-09-241-7/+31
|/ | | | | | | | | This patch updates the id.c and cpu.h files to support omap4 ES2.0 silicon detection. Few initial omap4 es2 samples IDCODE is same as es1. So the patch uses ARM cpuid register to detect the ES version for such samples Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
* omap3: id: fix 3630 rev detectionNishanth Menon2010-08-161-1/+1
| | | | | | | | | | | | | | | | Wrong placement of break causes all revisions of 3630 to be detected as 3630 es1.2, we need to break main loop if we have an identified chip, default falls through as in the rest of the switches in this function. Cc: Paul Walmsley <paul@pwsan.com> Cc: Sanjeev Premi <premi@ti.com> Cc: Kevin Hilman <khilman@deeprootsystems.com> Cc: Manjunath K <manjugk@ti.com> Cc: Anand Gadiyar <gadiyar@ti.com> Cc: Felipe Balbi <felipe.balbi@nokia.com> Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* OMAP3630: Add ES1.1 and ES1.2 detectionAnand Gadiyar2010-08-041-3/+25
| | | | | | | | | | | | | | | | | | Add revision detection for ES1.1 and ES1.2. Set default revision as ES1.2. Add CHIP_GE_OMAP3630ES1_1 to detect revisions 1.1 and later. This is needed for at least one feature that is broken in 3630ES1.0 but exists on older (3430 ES3.1) and newer revisions. Additionally, update some of the CHIP_GE_* macros to use other macros for ease of maintenance. Signed-off-by: Anand Gadiyar <gadiyar@ti.com> Cc: Nishanth Menon <nm@ti.com> Cc: Manjunatha GK <manjugk@ti.com> [tony@atomide.com: update to remove fallthrough handling] Signed-off-by: Tony Lindgren <tony@atomide.com>
* omap: Use omap_get_die_id() to get the DIE idsKan-Ru Chen2010-08-021-8/+6Star
| | | | | Signed-off-by: Kan-Ru Chen <kanru@0xlab.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
* omap: Add new interface omap_get_die_idKan-Ru Chen2010-08-021-0/+10
| | | | | | | Allow DIE id to be get and used by others. Signed-off-by: Kan-Ru Chen <kanru@0xlab.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
* OMAP3: AM3505/3517 do not have IO wakeup capabilitystanley.miao2010-08-021-0/+2
| | | | | | | | | | | | AM3505/3517 doesn't have IO wakeup capability, so we do not need to set the bit OMAP3430_EN_IO and the bit OMAP3430_EN_IO_CHAIN in the register PM_WKEN_WKUP when the system enters suspend state. Tested on AM3517EVM and OMAP3530EVM. Signed-off-by: Stanley.Miao <stanley.miao@windriver.com> Acked-by: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* omap2/3: id: fix sparse warningNishanth Menon2010-08-021-5/+5
| | | | | | | | | | | | | | | | | | | | | omap24xx_check_revision, omap3_check_features, omap3_check_revision, omap4_check_revision, omap3_cpuinfo are not used elsewhere, it should be static Also fixes the following sparse warnings: arch/arm/mach-omap2/id.c:105:13: warning: symbol 'omap24xx_check_revision' was not declared. Should it be static? arch/arm/mach-omap2/id.c:167:13: warning: symbol 'omap3_check_features' was not declared. Should it be static? arch/arm/mach-omap2/id.c:189:13: warning: symbol 'omap3_check_revision' was not declared. Should it be static? arch/arm/mach-omap2/id.c:270:13: warning: symbol 'omap4_check_revision' was not declared. Should it be static? arch/arm/mach-omap2/id.c:300:13: warning: symbol 'omap3_cpuinfo' was not declared. Should it be static? Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* Merge branch 'for_2.6.34_b' of git://git.pwsan.com/linux-2.6 into omap-for-linusTony Lindgren2010-02-251-0/+3
|\
| * OMAP3 clock: add support for 192Mhz DPLL4M2 outputVishwanath BS2010-02-241-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In 3630, DPLL4M2 output can be 96MHz or 192MHz (for SGX to run at 192). This patch has changes to support this feature. 96MHz clock is generated by dividing 192Mhz clock by 2 using CM_CLKSEL_CORE register. SGX can select Core Clock, 192MHz clock or CM_96M_FCLK as it's functional clock. In summary changes done are: 1. Added a feature called omap3_has_192mhz_clk and enabled for 3630 2. Added a new clock node called omap_192m_alwon_ck 3. Made omap_96m_alwon_fck to derive its clock from omap_192m_alwon_ck Signed-off-by: Vishwanath BS <Vishwanath.bs@ti.com> [paul@pwsan.com: fixed whitespace] Signed-off-by: Paul Walmsley <paul@pwsan.com>
* | omap4: Fix omap_type() for omap4Santosh Shilimkar2010-02-231-0/+2
|/ | | | | | | | | | This patch fixes the omap_type function to detect whether the device is GP or HS Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@deeprootsystems.com> Reviewed-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: OMAP4: PM: OMAP4 essential basic initialisations.Abhijit Pagare2010-01-271-0/+1
| | | | | | | | | | | | | Some of the OMAP4 specific chip level initialisations are taken care of. Signed-off-by: Abhijit Pagare <abhijitpagare@ti.com> Cc: Benoit Cousson <b-cousson@ti.com> Cc: Rajendra Nayak <rnayak@ti.com> Cc: Tony Lindgren <tony@atomide.com> [paul@pwsan.com: updated to use '4430ES1' rather than simply '4430'; updated to apply after the intervening cpu.h/id.c patch; thanks also to Tony for catching a bug in my rewrite] Signed-off-by: Paul Walmsley <paul@pwsan.com>
* omap3: Fix cpu detectionTony Lindgren2010-01-201-18/+23
| | | | | | | | | | | | | | | | We need to set the omap_chip.oc carefully for the clocks to work. To fix this, set the omap_chip.oc in omap3_check_features() based on the CONTROL_IDCODE and silicon revision registers. Also add handling for 34xx es3.1.2 as es3.1 for now. Fixes booting on at least overo board. Based on an earlier patch by Paul Walmsley <paul@pwsan.com>. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* omap3: id code detection 3525 vs 3515Sergey Lapin2009-12-121-2/+2
| | | | | | | | | The runtime detection of OMAP3515 and OMAP3525 was reversed. Signed-off-by: Sergey Lapin <slapin@ossfans.org> Signed-off-by: Sanjeev Premi <premi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* OMAP4: Fix cpu detectionSantosh Shilimkar2009-12-121-1/+26
| | | | | | | | | | | | | This patch fixes the OMAP4430 cpu detection. The IC rev detection is done with hawkeye and rev. Note that rev does not map directly to defined processor revision numbers as ES1.0 uses value 0.It also fixes the SCM base address to read the correct ID_CODE register. Also the cpu_is_omap44xx() and cpu_is_omap443x() correctly populated instead of always being true Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* omap: Cleanup the coding style in id.cFelipe Balbi2009-11-221-40/+21Star
| | | | | | | | Cleanup the coding style in id.c while avoiding unneeded switch() statements. Signed-off-by: Felipe Balbi <felipe.balbi@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* omap3: keep SoC features on the same lineKevin Hilman2009-11-221-6/+5Star
| | | | | | | | | | | | | | | | | | | When listing the various SoC features, print them on the same line. So, instead of this OMAP3430/3530 ES3.1 - l2cache : Y - iva : Y - sgx : Y - neon : Y - isp : Y you get this: OMAP3430/3530 ES3.1 (l2cache iva sgx neon isp ) Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* omap3: move check_revision above check_featuresNishanth Menon2009-11-221-1/+1
| | | | | | | | | | omap3_check_revision() does not depend on omap3_check_features() move this above so that we can add logic based on revision detected in check_features. Signed-off-by: Nishanth Menon <nm@ti.com> Acked-by: Mika Westerberg <mika.westerberg@iki.fi> Signed-off-by: Tony Lindgren <tony@atomide.com>
* omap3: AM35xx: Initialize omap_chip bitsRanjith Lohithakshan2009-11-221-0/+2
| | | | | | | | | AM35xx is functionally similar to OMAP3430 ES3.1 from a powerdomain/clockdomain perspective. This patch initializes the omap_chip bits on AM35xx for use by powerdomain and clockdomain code. Signed-off-by: Ranjith Lohithakshan <ranjithl@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* omap3: AM35xx: Runtime detection of the deviceSanjeev Premi2009-11-221-6/+30
| | | | | | | | Add support to detect AM3505/AM3517 devices at runtime. Also updates the CPU names printed during boot. Signed-off-by: Sanjeev Premi <premi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* omap3: 3630: update is_chip variablevikram pandita2009-11-221-0/+2
| | | | | | | | | | | | | | | | | | | | | | | 3630 is getting treated like next rev of 3430 omap_chip.oc variable has to be updated for 3630 version Otherwise the Core power domain is not getting registered. This gets used in the registration of power domains in: "arch/arm/mach-omap2/powerdomains34xx.h" core_34xx_es3_1_pwrdm OMAP_CHIP_INIT(CHIP_GE_OMAP3430ES3_1) Core power doman will get registered for 3630 only when .oc is populated correctly. Tested on Zoom3(3630) board Signed-off-by: Vikram Pandita <vikram.pandita@ti.com> Acked-by: Alexander Shishkin <virtuoso@slind.org> Acked-by: Ari Kauppi <kauppi@papupata.org> Acked-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* omap3: Introduce OMAP3630Nishanth Menon2009-11-221-3/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | OMAP3630 is the latest in the family of OMAP3 devices and among the changes it introduces are: New OPP levels for new voltage and frequency levels. a bunch of Bug fixes to various modules feature additions, notably with ISP, sDMA etc. Details about the chip is available here: http://focus.ti.com/general/docs/wtbu/wtbuproductcontent.tsp?templateId=6123&navigationId=12836&contentId=52606 Strategy used: Strategy to introduce this device into Linux was discussed here: Ref: http://marc.info/?t=125343303400003&r=1&w=2 Two approaches were available: a) Consider 3630 generation of devices as a new family of silicon b) Consider 3630 as an offshoot of 3430 family of devices As a common consensus, (b) seems to be more valid for 3630 as: * There are changes which are easily handled by using "FEATURES" infrastructure. For details how to do this, see thread: http://marc.info/?t=125050998500001&r=1&w=2 * Most of existing 34xx infrastructure can be reused(almost 90%+) - so no ugly if (cpu_is_omap34xx() || cpu_is_omap36xx()) all over the place - lesser chance of bugs due to reuse of proven code flow - 36xx specific handling can still be done where required within the existing infrastructure NOTE: * If additional 34xx series are added, OMAP3430_REV_ESXXXX can be added on top of the existing 3630 ones are renumbered This patch was tested on SDP3430, boot tested on 3630 platform using 3430sdp defconfig Signed-off-by: Madhusudhan Chikkature Rajashekar <madhu.cr@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Vikram Pandita <vikram.pandita@ti.com> Cc: Allen Pais <allen.pais@ti.com> Cc: Anand Gadiyar <gadiyar@ti.com> Cc: Benoit Cousson <b-cousson@ti.com> Cc: Felipe Balbi <felipe.balbi@nokia.com> Cc: Kevin Hilman <khilman@deeprootsystems.com> Cc: Sanjeev Premi <premi@ti.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Sergio Alberto Aguirre Rodriguez <saaguirre@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* omap3: Runtime detection of OMAP35x devicesSanjeev Premi2009-11-221-11/+54
| | | | | | | | | | | | Add runtime check for these OMAP35x variations based on the detected Si features: OMAP3503, OMAP3515, OMAP3525 and OMA3530. Also, delayed the call to pr_info() into actual variant is detected in omap3_cpuinfo() Signed-off-by: Sanjeev Premi <premi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* omap3: Runtime detection of Si featuresSanjeev Premi2009-11-221-3/+49
| | | | | | | | | | | | The OMAP35x family has multiple variants differing in the HW features. This patch detects these features at runtime and prints information during the boot. Since most of the code seemed repetitive, macros have been used for readability. Signed-off-by: Sanjeev Premi <premi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* omap: headers: Move remaining headers from include/mach to include/platTony Lindgren2009-10-201-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move the remaining headers under plat-omap/include/mach to plat-omap/include/plat. Also search and replace the files using these headers to include using the right path. This was done with: #!/bin/bash mach_dir_old="arch/arm/plat-omap/include/mach" plat_dir_new="arch/arm/plat-omap/include/plat" headers=$(cd $mach_dir_old && ls *.h) omap_dirs="arch/arm/*omap*/ \ drivers/video/omap \ sound/soc/omap" other_files="drivers/leds/leds-ams-delta.c \ drivers/mfd/menelaus.c \ drivers/mfd/twl4030-core.c \ drivers/mtd/nand/ams-delta.c" for header in $headers; do old="#include <mach\/$header" new="#include <plat\/$header" for dir in $omap_dirs; do find $dir -type f -name \*.[chS] | \ xargs sed -i "s/$old/$new/" done find drivers/ -type f -name \*omap*.[chS] | \ xargs sed -i "s/$old/$new/" for file in $other_files; do sed -i "s/$old/$new/" $file done done for header in $(ls $mach_dir_old/*.h); do git mv $header $plat_dir_new/ done Signed-off-by: Tony Lindgren <tony@atomide.com>
* OMAP2/3: Add omap_type() for determining GP/EMU/HSKevin Hilman2009-06-231-0/+22
| | | | | | | | | | | | | | | The omap_type() function is added and returns the DEVICETYPE field of the CONTROL_STATUS register. The result can be used for conditional code based on whether device is GP (general purpose), EMU or HS (high security). Also move the type defines so omap1 code compile does not require ifdefs for sections using these defines. This code is needed for the following fix to set the SRAM size correctly for HS omaps. Also at least PM and watchdog code will need this function. Signed-off-by: Kevin Hilman <khilman@ti.deeprootsystems.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: OMAP4: Add minimal support for omap4Santosh Shilimkar2009-05-281-1/+7
| | | | | | | | | | | | This patch adds the support for OMAP4. The platform and machine specific headers and sources updated for OMAP4430 SDP platform. OMAP4430 is Texas Instrument's SOC based on ARM Cortex-A9 SMP architecture. It's a dual core SOC with GIC used for interrupt handling and SCU for cache coherency. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* [ARM] OMAP3: update ES level flags to discriminate between post-ES2 revisionsPaul Walmsley2009-02-231-1/+6
| | | | | | | | | | | | | | | Some OMAP3 chip behaviors change in ES levels after ES2. Modify the existing omap_chip flags to add options for ES3.0 and ES3.1. Add a new macro, CHIP_GE_OMAP3430ES2, to cover ES levels from ES2 onwards - a common pattern for OMAP3 features. Update all current users of the omap_chip macros to use this new macro. Also add CHIP_GE_OMAP3430ES3_1 to cover the USBTLL SAR errata case (described and fixed in the following patch) Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>