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* ARM: OMAP2PLUS: DSS: Ensure DSS works correctly if display is enabled in ↵Archit Taneja2011-11-081-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | bootloader Resetting DISPC when a DISPC output is enabled causes the DSS to go into an inconsistent state. Thus if the bootloader has enabled a display, the hwmod code cannot reset the DISPC module just like that, but the outputs need to be disabled first. Add function dispc_disable_outputs() which disables all active overlay manager and ensure all frame transfers are completed. Modify omap_dss_reset() to call this function and clear DSS_CONTROL, DSS_SDI_CONTROL and DSS_PLL_CONTROL so that DSS is in a clean state when the DSS2 driver starts. This resolves the hang issue(caused by a L3 error during boot) seen on the beagle board C3, which has a factory bootloader that enables display. The issue is resolved with this patch. Thanks to Tomi and Sricharan for some additional testing. Acked-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Tested-by: R, Sricharan <r.sricharan@ti.com> Signed-off-by: Archit Taneja <archit@ti.com> [paul@pwsan.com: restructured code, removed omap_{read,write}l(), removed cpu_is_omap*() calls and converted to dev_attr] Signed-off-by: Paul Walmsley <paul@pwsan.com>
* ARM: OMAP2xxx: HWMOD: fix DSS clock dataTomi Valkeinen2011-11-081-2/+8
| | | | | | | | | | | | | | | | | | The OMAP2xxx HWMOD data currently contains two errors with DSS clocks: - dss_rfbi is missing ick opt-clock, which is needed for RFBI to calculate timings - dss_venc's interface and main clocks are wrong, causing VENC to fail to start These problems were temporarily fixed with a DSS patch 9ede365aa6f74428a1f69c21ca1cf21213167576 ("HACK: OMAP: DSS2: clk hack for OMAP2/3"), which can be reverted after this patch (and the similar patches for other OMAPs). Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
* ARM: OMAP2xxx: HWMOD: Fix DSS resetTomi Valkeinen2011-11-081-1/+5
| | | | | | | | | | | | | | | | | | DSS needs all DSS clocks to be enabled to be able to finish reset properly. Before v3.1-rc1 the omapdss driver was managing clocks and resets correctly. However, when omapdss started using runtime PM at v3.1-rc1, the responsibility for the reset moved to HWMOD framework. HWMOD framework does not currently enable all the DSS clocks when resetting the DSS hardware. This hasn't caused any problems so far, but we may just have been lucky. This patch sets HWMOD_CONTROL_OPT_CLKS_IN_RESET for dss_core in OMAP2xxx HWMOD data, fixing the issue. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> [paul@pwsan.com: merged duplicate .flags fields] Signed-off-by: Paul Walmsley <paul@pwsan.com>
* ARM: OMAP2+: dmtimer: convert to platform devicesTarun Kanti DebBarma2011-09-221-0/+22
| | | | | | | | | | | | | | Add routines to converts dmtimers to platform devices. The device data is obtained from hwmod database of respective platform and is registered to device model after successful binding to driver. In addition, capability attribute of each of the timers is added in hwmod database. Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Signed-off-by: Thara Gopinath <thara@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Cousson, Benoit <b-cousson@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* OMAP2+: hwmod: remove OMAP_CHIP*Paul Walmsley2011-09-151-45/+0Star
| | | | | | | | | | | | At Tony's request, remove the OMAP_CHIP* flags from the hwmod data, and replace it instead with chip family, variant, and ES level-specific lists of hwmods to register. Thanks to Gražvydas Ignotas <notasas@gmail.com> for finding a bug in the AM3517/3505 support, and for other review comments. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Gražvydas Ignotas <notasas@gmail.com>
* OMAP2430: hwmod: musb: add missing terminator to omap2430_usbhsotg_addrs[]Paul Walmsley2011-09-051-0/+1
| | | | | | | | | | | | | | | | | | Add a missing array terminator to omap2430_usbhsotg_addrs[]. Without this terminator, the omap_hwmod resource building code runs off the end of the array, resulting in at least this error -- if not worse behavior: [ 0.578002] musb-omap2430: failed to claim resource 4 [ 0.583465] omap_device: musb-omap2430: build failed (-16) [ 0.589294] Could not build omap_device for musb-omap2430 usb_otg_hs This should have been part of commit 78183f3fdf76f422431a81852468be01b36db325 ("omap_hwmod: use a null structure record to terminate omap_hwmod_addr_space arrays") but was evidently missed. Signed-off-by: Paul Walmsley <paul@pwsan.com>
* OMAP: hwmod: fix the i2c-reset timeout during bootupAvinash.H.M2011-07-101-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | The sequence of _ocp_softreset doesn't work for i2c. The i2c module has a special sequence to reset the module. The sequence is - Disable the I2C. - Write to SOFTRESET bit. - Enable the I2C. - Poll on the RESETDONE bit. The sequence is implemented as a function and the i2c_class is updated with the correct 'reset' pointer. omap_hwmod_softreset function is implemented which triggers the softreset by writing into sysconfig register. On following this sequence, i2c module resets properly and timeouts are not seen. Cc: Rajendra Nayak <rnayak@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Benoit Cousson <b-cousson@ti.com> Cc: Kevin Hilman <khilman@ti.com> Signed-off-by: Avinash.H.M <avinashhm@ti.com> [paul@pwsan.com: combined this patch with a patch to remove HWMOD_INIT_NO_RESET from the 44xx hwmod flags; change register offset conditional code to use the IP block revision; minor code cleanup] Signed-off-by: Paul Walmsley <paul@pwsan.com>
* I2C: OMAP2+: add correct functionality flags to all omap2plus i2c dev_attrAndy Green2011-07-101-0/+3
| | | | | | | | | | | | | This adds the new functionality flags for omap i2c unit to all OMAP2 hwmod definitions Cc: patches@linaro.org Cc: Ben Dooks <ben-linux@fluff.org> Reported-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andy Green <andy.green@linaro.org> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
* I2C: OMAP2+: Tag all OMAP2+ hwmod defintions with I2C IP revisionAndy Green2011-07-101-0/+1
| | | | | | | | | | | | | | | | | Since we cannot trust (or even reliably find) the OMAP I2C peripheral unit's own revision register, we must inform the OMAP i2c driver of which IP version it is running on. We do this by tagging the omap_hwmod_class for i2c on all the OMAP2+ platform / cpu specific hwmod init and passing it up to the driver (next patches). Cc: patches@linaro.org Cc: Ben Dooks <ben-linux@fluff.org> Reported-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andy Green <andy.green@linaro.org> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
* I2C: OMAP2+: Set hwmod flags to only allow 16-bit accesses to i2cAndy Green2011-07-101-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Peter Maydell noticed when running under QEMU he was getting errors reporting 32-bit access to I2C peripheral unit registers that are documented to be 8 or 16-bit only[1][2] The I2C driver is blameless as it wraps its accesses in a function using __raw_writew and __raw_readw, it turned out it is the hwmod stuff. However the hwmod code already has a flag to force a perhipheral unit to only be accessed using 16-bit operations. This patch applies the 16-bit only flag to the 2430, OMAP3xxx and OMAP44xx hwmod structs. 2420 was already correctly marked up as 16-bit. The 2430 change will need testing by TI as arranged in the comments to the previous patch version. When the 16-bit flag is or-ed with other flags, it is placed first as requested in comments. [1] OMAP4430 Technical reference manual section 23.1.6.2 [2] OMAP3530 Techincal reference manual section 18.6 Cc: patches@linaro.org Cc: Ben Dooks <ben-linux@fluff.org> Reported-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andy Green <andy.green@linaro.org> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
* omap_hwmod: share identical omap_hwmod_class, omap_hwmod_class_sysconfig arraysPaul Walmsley2011-07-101-240/+33Star
| | | | | | | | To reduce kernel source file data duplication, share struct omap_hwmod_class and omap_hwmod_class_sysconfig arrays across OMAP2xxx and 3xxx hwmod data files. Signed-off-by: Paul Walmsley <paul@pwsan.com>
* omap_hwmod: share identical omap_hwmod_dma_info arraysPaul Walmsley2011-07-101-84/+11Star
| | | | | | | To reduce kernel source file data duplication, share struct omap_hwmod_dma_info arrays across OMAP2xxx and 3xxx hwmod data files. Signed-off-by: Paul Walmsley <paul@pwsan.com>
* omap_hwmod: use a terminator record with omap_hwmod_dma_info arraysPaul Walmsley2011-07-101-16/+16
| | | | | | | | | | | | | | | | | Previously, struct omap_hwmod_dma_info arrays were unterminated; and users of these arrays used the ARRAY_SIZE() macro to determine the length of the array. However, ARRAY_SIZE() only works when the array is in the same scope as the macro user. So far this hasn't been a problem. However, to reduce duplicated data, a subsequent patch will move common data to a separate, shared file. When this is done, ARRAY_SIZE() will no longer be usable. This patch removes ARRAY_SIZE() usage for struct omap_hwmod_dma_info arrays and uses a sentinel value (irq == -1) as the array terminator instead. Signed-off-by: Paul Walmsley <paul@pwsan.com>
* omap_hwmod: share identical omap_hwmod_mpu_irqs arraysPaul Walmsley2011-07-101-141/+25Star
| | | | | | | To reduce kernel source file data duplication, share struct omap_hwmod_mpu_irqs arrays across OMAP2xxx and 3xxx hwmod data files. Signed-off-by: Paul Walmsley <paul@pwsan.com>
* omap_hwmod: use a terminator record with omap_hwmod_mpu_irqs arraysPaul Walmsley2011-07-101-36/+36
| | | | | | | | | | | | | | | | | Previously, struct omap_hwmod_mpu_irqs arrays were unterminated; and users of these arrays used the ARRAY_SIZE() macro to determine the length of the array. However, ARRAY_SIZE() only works when the array is in the same scope as the macro user. So far this hasn't been a problem. However, to reduce duplicated data, a subsequent patch will move common data to a separate, shared file. When this is done, ARRAY_SIZE() will no longer be usable. This patch removes ARRAY_SIZE() usage for struct omap_hwmod_mpu_irqs arrays and uses a sentinel value (irq == -1) as the array terminator instead. Signed-off-by: Paul Walmsley <paul@pwsan.com>
* omap_hwmod: share identical omap_hwmod_addr_space arraysPaul Walmsley2011-07-101-293/+26Star
| | | | | | | | To reduce kernel source file data duplication, share struct omap_hwmod_addr_space arrays across OMAP2xxx and 3xxx hwmod data files. Signed-off-by: Paul Walmsley <paul@pwsan.com>
* omap_hwmod: use a null structure record to terminate omap_hwmod_addr_space ↵Paul Walmsley2011-07-101-42/+41Star
| | | | | | | | | | | | | | | | | | | | | | | | arrays Previously, struct omap_hwmod_addr_space arrays were unterminated; and users of these arrays used the ARRAY_SIZE() macro to determine the length of the array. However, ARRAY_SIZE() only works when the array is in the same scope as the macro user. So far this hasn't been a problem. However, to reduce duplicated data, a subsequent patch will move common data to a separate, shared file. When this is done, ARRAY_SIZE() will no longer be usable. This patch removes ARRAY_SIZE() usage for struct omap_hwmod_addr_space arrays and uses a null structure member as the array terminator instead. Signed-off-by: Paul Walmsley <paul@pwsan.com>
* OMAP2/3: hwmod: fix gpio-reset timeouts seen during bootup.Avinash.H.M2011-04-201-0/+5
| | | | | | | | | | | | | GPIO module expects the debounce clocks to be enabled during reset. It doesn't reset properly and timeouts are seen, if this clock isn't enabled during reset. Add the HWMOD_CONTROL_OPT_CLKS_IN_RESET flags to the GPIO HWMODs, with which the debounce clocks are enabled during reset. Cc: Rajendra Nayak <rnayak@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Benoit Cousson <b-cousson@ti.com> Cc: Kevin Hilman <khilman@ti.com> Signed-off-by: Avinash.H.M <avinashhm@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
* OMAP2+: hwmod data: Fix wrong dma_system end addressBenoit Cousson2011-04-191-1/+1
| | | | | | | | | | | | | | OMAP2420, 2430 and 3xxx were using the OMAP4 end address that unfortunately is not located at the same base address. Moreover the OMAP4 size was set to 256 instead of 4096. Change all .pa_end to set them to .pa_start + 0xfff Cc: "G, Manjunath Kondaiah" <manjugk@ti.com> Cc: Benoit Cousson <b-cousson@ti.com> Reported-by: Michael Fillinger <m-fillinger@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
* Fix common misspellingsLucas De Marchi2011-03-311-1/+1
| | | | | | Fixes generated by 'codespell' and manually reviewed. Signed-off-by: Lucas De Marchi <lucas.demarchi@profusion.mobi>
* Merge branch 'for-paul' of git://gitorious.org/linux-omap-dss2/linuxPaul Mundt2011-03-221-6/+6
|\ | | | | | | | | | | | | Conflicts: arch/arm/mach-omap2/board-overo.c Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * OMAP: DSS2: Have separate irq handlers for DISPC and DSIarchit taneja2011-03-111-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, the core DSS platform device requests for an irq line for OMAP2 and OMAP3. Make DISPC and DSI platform devices request for a shared IRQ line. On OMAP3, the logical OR of DSI and DISPC interrupt lines goes to the MPU. There is a register DSS_IRQSTATUS which tells if the interrupt came from DISPC or DSI. On OMAP2, there is no DSI, only DISPC interrupts goto the MPU. There is no DSS_IRQSTATUS register. Hence, it makes more sense to have separate irq handlers corresponding to the DSS sub modules instead of having a common handler. Since on OMAP3 the logical OR of the lines goes to MPU, the irq line is shared among the IRQ handlers. The hwmod irq info has been removed for DSS to DISPC and DSI for OMAP2 and OMAP3 hwmod databases. The Probes of DISPC and DSI now request for irq handlers. Signed-off-by: Archit Taneja <archit@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* | Merge remote branch 'remotes/origin/hwmod_a_2.6.39' into ↵Paul Walmsley2011-03-111-5/+7
|\ \ | |/ |/| | | | | | | | | | | | | tmp-integration-2.6.39-20110310-024 Conflicts: arch/arm/mach-omap2/omap_hwmod_2430_data.c arch/arm/mach-omap2/omap_hwmod_3xxx_data.c arch/arm/plat-omap/include/plat/omap_hwmod.h
| * omap: hwmod: add syss reset done flags to omap2, omap3 hwmodsAvinash.H.M2011-03-101-5/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some of the omap2, omap3 peripherals support software reset. This can be done through the softreset bit in sysconfig register. The reset status can be checked through resetdone bit of sysstatus register. syss_has_reset_status is added to the hwmod database of peripherals which have resetdone bit in sysstatus register. Cc: Rajendra Nayak <rnayak@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Benoit Cousson <b-cousson@ti.com> Cc: Kevin Hilman <khilman@ti.com> Reviewed-by: Govindraj.R <govindraj.raja@ti.com> Signed-off-by: Avinash.H.M <avinashhm@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
* | OMAP2/3: VENC hwmod: add OCPIF_SWSUP_IDLE flag to interfacePaul Walmsley2011-03-091-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to the hwmod interface data, the DSS submodule "VENC" uses a clock, "dss_54m_fck"/"dss_tv_fck", which the PRCM cannot autoidle. By default, the hwmod code assumes that interface clocks can be autoidled by the PRCM. When the interface clock can't be autoidled by the PRCM, those interfaces must be marked with the OCPIF_SWSUP_IDLE flag. Otherwise, the "interface clock" will always have a non-zero use count, and the device won't enter idle. This problem was observed on N8x0. Fix the immediate problem by marking the VENC interface with the OCPIF_SWSUP_IDLE flag. But it's not clear that "dss_54m_fck"/"dss_tv_fck" is really the correct interface clock for VENC. It may be that the VENC interface should use a hardware-autoidling interface clock. This is the situation on OMAP4, which uses "l3_div_ck" as the VENC interface clock, which can be autoidled by the PRCM. Clarification from TI is needed. Problem found and patch tested on N8x0 by Tony Lindgren <tony@atomide.com>. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Senthilvadivu Guruswamy <svadivu@ti.com> Cc: Sumit Semwal <sumit.semwal@ti.com> Cc: Kevin Hilman <khilman@ti.com> Cc: Benoît Cousson <b-cousson@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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*-----. \ Merge branches 'devel-iommu-mailbox', 'devel-mcbsp', 'devel-board' and ↵Tony Lindgren2011-03-031-0/+546
|\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'devel-hsmmc' into omap-for-linus Conflicts: arch/arm/mach-omap2/omap_hwmod_44xx_data.c
| | | | * | OMAP: hwmod data: Add dev_attr and use in the host driverKishore Kadiyala2011-03-011-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a device attribute to hwmod data of omap2430, omap3, omap4. Currently the device attribute holds information regarding dual volt MMC card support by the controller which will be later passed to the host driver via platform data. Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Kishore Kadiyala <kishore.kadiyala@ti.com> Acked-by: Benoit Cousson<b-cousson@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | | | * | OMAP2430: hwmod data: Add HSMMCPaul Walmsley2011-03-011-0/+148
| |_|_|/ / |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update the omap2430 hwmod data with the HSMMC info. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Rajendra Nayak <rnayak@ti.com Signed-off-by: Kishore Kadiyala <kishore.kadiyala@ti.com> Cc: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * | | OMAP2430: hwmod data: Add McBSPCharulatha V2011-02-241-0/+320
| |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add McBSP hwmod data for OMAP2430. Added a revision member inorder to facilitate the driver to differentiate between mcbsp in different omap. Signed-off-by: Charulatha V <charu@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Shubhrajyoti D <shubhrajyoti@ti.com> Cc: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * / / OMAP2: hwmod data: add mailbox dataOmar Ramirez Luna2011-02-241-0/+72
| |/ / | | | | | | | | | | | | | | | | | | Mailbox hwmod data for omap2430 and 2420. Signed-off-by: Omar Ramirez Luna <omar.ramirez@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* | | OMAP2+: hwmod: rename some init functionsPaul Walmsley2011-02-281-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rename omap_hwmod_init() to omap_hwmod_register(). Rename omap_hwmod_late_init() to omap_hwmod_setup_all(). Also change all of the callers to reflect the new names. While here, update some copyrights. Suggested by Tony Lindgren <tony@atomide.com>. N.B. The comment in mach-omap2/serial.c may no longer be correct, given recent changes in init order. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Benoît Cousson <b-cousson@ti.com> Cc: Kevin Hilman <khilman@ti.com> Cc: Tony Lindgren <tony@atomide.com>
* | | OMAP2430: hwmod data: add dmtimerThara Gopinath2011-02-281-0/+633
|/ / | | | | | | | | | | | | | | Add dmtimer data. Signed-off-by: Thara Gopinath <thara@ti.com> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Acked-by: Benoit Cousson <b-cousson@ti.com>
* | OMAP2430: hwmod data: add DSS DISPC RFBI VENCSenthilvadivu Guruswamy2011-02-231-0/+284
| | | | | | | | | | | | | | | | | | | | | | | | | | Hwmod needs database of all IPs in a system. This patch generates the hwmod database for OMAP2430 Display Sub System. Since DSS is also considered as an IP as DISPC, RFBI, name it as dss_core. Acked-by: Benoit Cousson <b-cousson@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Tested-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Sumit Semwal <sumit.semwal@ti.com> Signed-off-by: Senthilvadivu Guruswamy <svadivu@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* | Merge branch 'for-tony' of git://gitorious.org/usb/usb into omap-for-linusTony Lindgren2011-02-221-0/+101
|\ \ | | | | | | | | | | | | | | | Conflicts: arch/arm/mach-omap2/omap_hwmod_2430_data.c arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
| * | OMAP2430: hwmod data: Add USBOTGHema HK2011-02-171-0/+98
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | OMAP2430 hwmod data structures are populated with base address, L3 and L4 interface clocks, IRQs and sysconfig register details. As per OMAP USBOTG specification, need to configure the USBOTG to smart idle/standby or no idle/standby during data transfer and force idle/standby when not in use to support retention and off-mode. By setting HWMOD_SWSUP_SIDLE and HWMOD_SWSUP_MSTANDBY flags, framework will take care of configuring to no idle/standby when module is enabled and force idle/standby when suspended. Signed-off-by: Hema HK <hemahk@ti.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Kevin Hilman <khilman@deeprootsystems.com> Cc: Cousson, Benoit <b-cousson@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
* / OMAP2430: hwmod data: Add McSPICharulatha V2011-02-171-0/+219
|/ | | | | | | | | | Update the 2430 hwmod data file with McSPI info. Signed-off-by: Charulatha V <charu@ti.com> Signed-off-by: Govindraj.R <govindraj.raja@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* OMAP2430: hwmod data: Use common dev_attr for i2c1 and i2c2Benoit Cousson2010-12-221-9/+5Star
| | | | | | | | | | | | | | Since i2c1 and i2c2 are using the same data, remove the two previous instances and use a common i2c_dev_attr one. Moreover, that will fix the following warning: arch/arm/mach-omap2/omap_hwmod_2430_data.c:485: warning: 'i2c_dev_attr' defined but not used Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Charulatha V <charu@ti.com>
* OMAP2+: wd_timer: disable on boot via hwmod postsetup mechanismPaul Walmsley2010-12-221-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The OMAP watchdog timer IP blocks require a specific set of register writes to occur before they will be disabled[1], even if the device clocks appear to be disabled in the CM_*CLKEN registers. In the MPU watchdog case, failure to execute this reset sequence will eventually cause the watchdog to reset the OMAP unexpectedly. Previously, the code to disable this watchdog was manually called from mach-omap2/devices.c during device initialization. This causes the watchdog to be unconditionally disabled for a portion of kernel initialization. This should be controllable by the board-*.c files, since some system integrators will want full watchdog coverage of kernel initialization. Also, the watchdog disable code was not connected to the hwmod shutdown code. This means that calling omap_hwmod_shutdown() will not, in fact, disable the watchdog, and the goal of omap_hwmod_shutdown() is to be able to shutdown any on-chip OMAP device. To resolve the latter problem, populate the pre_shutdown pointer in the watchdog timer hwmod classes with a function that executes the watchdog shutdown sequence. This allows the hwmod code to fully disable the watchdog. Then, to allow some board files to support watchdog coverage throughout kernel initialization, add common code to mach-omap2/io.c to cause the MPU watchdog to be disabled on boot unless a board file specifically requests it to remain enabled. Board files can do this by changing the watchdog timer hwmod's postsetup state between the omap2_init_common_infrastructure() and omap2_init_common_devices() function calls. 1. OMAP34xx Multimedia Device Silicon Revision 3.1.x Rev. ZH [SWPU222H], Section 16.4.3.6, "Start/Stop Sequence for WDTs (Using WDTi.WSPR Register)" Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Benoît Cousson <b-cousson@ti.com> Cc: Kevin Hilman <khilman@deeprootsystems.com> Cc: Charulatha Varadarajan <charu@ti.com>
* Merge branch 'devel-dma' into omap-for-linusTony Lindgren2010-12-221-0/+86
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| * OMAP2430: hwmod data: add system DMAG, Manjunath Kondaiah2010-12-211-0/+86
| | | | | | | | | | | | | | | | | | Add OMAP2430 DMA hwmod data and also add required DMA device attributes. Signed-off-by: G, Manjunath Kondaiah <manjugk@ti.com> Acked-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* | omap2430: hwmod: remove stray declarationAnand Gadiyar2010-12-211-2/+0Star
|/ | | | | | | | | | | | Patch "OMAP2xxx: hwmod: add I2C hwmods for OMAP2420, 2430" in linux-next as of 20101203 introduced the following build warning - fix this by removing the stray i2c_dev_attr. arch/arm/mach-omap2/omap_hwmod_2430_data.c:483: warning: 'i2c_dev_attr' defined but not used Signed-off-by: Anand Gadiyar <gadiyar@ti.com> Cc: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* OMAP2430: hwmod data: Add GPIOVaradarajan, Charulatha2010-12-081-1/+279
| | | | | | | | | | | | Add GPIO hwmod data for OMAP2430 Also remove "omap24xx.h" header file as it is not required anymore. Signed-off-by: Charulatha V <charu@ti.com> Acked-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* OMAP2xxx: hwmod: add I2C hwmods for OMAP2420, 2430Paul Walmsley2010-11-091-2/+153
| | | | | | | | | | | | | Add hwmod structures for I2C controllers on OMAP2420/2430. NOTE: I2C module on OMAP2420 has 16bit registers and causes imprecise aborts if 32bits are read/written to it. Use the HWMOD_16BIT_REG flag to notify the hmwod framework of this hard requirement so that __raw_writew/readw is used to read /write the mdoule registers. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* manual merge for pm-hwmod-uart due to conflictsKevin Hilman2010-10-011-0/+193
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| * OMAP2/3: UART: add omap_hwmod data for UARTs 1-4Kevin Hilman2010-09-291-0/+193
| | | | | | | | | | | | | | | | | | | | This patch adds omap_hwmod data for UARTs on OMAP2 and OMAP3 platforms. UART4 support for 3630 and OMAP2 hwmod data added by Govindraj R. Signed-off-by: Govindraj.R <govindraj.raja@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* | OMAP2430: hwmod data: Add watchdog timerVaradarajan, Charulatha2010-09-291-0/+64
|/ | | | | | | | Add watchdog timer hwmod data for OMAP2430 chip Signed-off-by: Charulatha V <charu@ti.com> Acked-by: Cousson, Benoit <b-cousson@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* OMAP2: hwmod data: add IVA1 (2420), IVA2 (2430) hwmodsPaul Walmsley2010-07-271-2/+30
| | | | | | | | | Add IVA1 hwmod data for OMAP2420 and IVA2 hwmod data for 2430. The data is based on Benoît Cousson's hwmod data for the OMAP3 IVA blocks. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Benoît Cousson <b-cousson@ti.com> Cc: Kevin Hilman <khilman@deeprootsystems.com>
* OMAP2&3: hwmod: Replace l3 -> l3_mainKevin Hilman2010-07-271-17/+17
| | | | | | | | | Replace all the struct that contain l3 with l3_main in order to be consistent with the OMAP4 naming convention. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
* OMAP2&3: hwmod: Remove _hwmod prefix in name stringBenoit Cousson2010-07-271-3/+3
| | | | | | | | | | | | In the lastest OMAP4 hwmod data file, the _hwmod was removed in order to save some memory space and because it does not bring a lot. Align OMAP2420, 2430 and 3430 data files with the same convention. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Rajendra Nayak <rnayak@ti.com> Acked-by: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
* OMAP2/3: hwmod: L3 and L4 CORE/PER/WKUP hwmods don't have IDLESTKevin Hilman2010-07-271-3/+6
| | | | | | | | Since these hwmods do not have IDLEST, set the HWMOD_NO_IDLEST flag, otherwise _enable() will fail due to failing _wait_target_ready(). Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
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