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* Merge tag 'omap-for-v3.7-rc1/fixes-hwmod-clock-signed-v3' of ↵Olof Johansson2012-10-101-1/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes From Paul Walmsley <paul@pwsan.com> via Tony Lindgren: Some OMAP fixes for the 3.7 merge window, fixing mismerges, branch integration issues, and bugs after the arm-soc merges. * tag 'omap-for-v3.7-rc1/fixes-hwmod-clock-signed-v3' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: OMAP4/AM335x: hwmod: fix disable_module regression in hardreset handling ARM: OMAP3: fix workaround for EMU clockdomain ARM: OMAP: omap3evm: fix new sparse warning ARM: OMAP2+: hwmod data: Fix PMU interrupt definitions ARM: am33xx: clk: Update clkdev table to add mcasp alias
| * ARM: OMAP2+: hwmod data: Fix PMU interrupt definitionsJon Hunter2012-10-071-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 7d7e1eb (ARM: OMAP2+: Prepare for irqs.h removal) and commit ec2c082 (ARM: OMAP2+: Remove hardcoded IRQs and enable SPARSE_IRQ) updated the way interrupts for OMAP2/3 devices are defined in the HWMOD data structures to being an index plus a fixed offset (defined by OMAP_INTC_START). The definition of the PMU interrupts on OMAP2/3 devices is missing the OMAP_INTC_START offset and so this is causing the allocation of PMU interrupts to fail on OMAP2/3 devices. So add the offset to fix this. This is patch is based upon Tony's master branch for OMAP. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
* | arch/arm/mach-omap2: Remove unecessary semicolonPeter Senna Tschudin2012-10-091-3/+3
| | | | | | | | | | | | | | Found by http://coccinelle.lip6.fr/ Signed-off-by: Peter Senna Tschudin <peter.senna@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* | AM35xx: Add missing hwmod entry for the HDQ/1-Wire present in AM3505/3517 CPUs.Raphael Assenat2012-10-091-0/+1
|/ | | | | | | | | | | | | This patch adds a missing hwmod entry for the HDQ/1-Wire module present in the AM3505/17 CPUs. This restores 1-Wire support to our AM3505 boards. We think it probably stopped working with commit 96b1b29d37b0ca3ecd424a1fe301406cf525fc04 ARM: OMAP2+: HDQ1W: use omap_device Signed-off-by: Raphael Assenat <raph@8d.com> Acked-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* Merge branch 'late/kirkwood' into late/socOlof Johansson2012-10-051-5/+5
|\ | | | | | | | | | | | | | | | | | | | | | | Merge in the late Kirkwood branch with the OMAP late branch for upstream submission. Final contents described in shared tag. Fixup remove/change conflicts in arch/arm/mach-omap2/devices.c and drivers/spi/spi-omap2-mcspi.c. Signed-off-by: Olof Johansson <olof@lixom.net>
| * Merge tag 'omap-cleanup-local-headers-for-v3.7' of ↵Olof Johansson2012-09-211-3/+3
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/cleanup From Tony Lindgren: This branch contains mostly scripted changes to make omap header files local where possible to get us closer to supporting the ARM single zImage. After these changes mach includes are pretty much out of the way for omap2+, but still lots of manual work remains to sort through the remaining plat includes. * tag 'omap-cleanup-local-headers-for-v3.7' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (26 commits) ARM: OMAP2+: Make omap4-keypad.h local ARM: OMAP2+: Make l4_3xxx.h local ARM: OMAP2+: Make l4_2xxx.h local ARM: OMAP2+: Make l3_3xxx.h local ARM: OMAP2+: Make l3_2xxx.h local ARM: OMAP1: Move irda.h from plat to mach ARM: OMAP2+: Make hdq1w.h local ARM: OMAP2+: Make gpmc-smsc911x.h local ARM: OMAP2+: Make gpmc-smc91x.h local ARM: OMAP1: Move flash.h from plat to mach ARM: OMAP2+: Make debug-devices.h local ARM: OMAP1: Move board-voiceblue.h from plat to mach ARM: OMAP1: Move board-sx1.h from plat to mach ARM: OMAP2+: Make omap-wakeupgen.h local ARM: OMAP2+: Make omap-secure.h local ARM: OMAP2+: Make ctrl_module_wkup_44xx.h local ARM: OMAP2+: Make ctrl_module_pad_wkup_44xx.h local ARM: OMAP2+: Make ctrl_module_pad_core_44xx.h local ARM: OMAP2+: Make ctrl_module_core_44xx.h local ARM: OMAP2+: Make board-rx51.h local ...
| | * ARM: OMAP2+: Make l4_3xxx.h localTony Lindgren2012-09-211-1/+1
| | | | | | | | | | | | | | | | | | This can be local to mach-omap2. Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * ARM: OMAP2+: Make l3_3xxx.h localTony Lindgren2012-09-211-1/+1
| | | | | | | | | | | | | | | | | | This can be local to mach-omap2. Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * ARM: OMAP2+: Make am35xx.h localTony Lindgren2012-09-211-1/+1
| | | | | | | | | | | | | | | | | | This can be local to mach-omap2. Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | Merge tag 'tegra-for-3.7-dmaengine' of ↵Olof Johansson2012-09-211-3/+12
| |\ \ | | |/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/cleanup ARM: tegra: switch to dmaengine The Tegra code-base has contained both a legacy DMA and a dmaengine driver since v3.6-rcX. This series flips Tegra's defconfig to enable dmaengine rather than the legacy driver, and removes the legacy driver and all client code. * tag 'tegra-for-3.7-dmaengine' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra: ASoC: tegra: remove support of legacy DMA driver based access spi: tegra: remove support of legacy DMA driver based access ARM: tegra: apbio: remove support of legacy DMA driver based access ARM: tegra: dma: remove legacy APB DMA driver ARM: tegra: config: enable dmaengine based APB DMA driver + sync to 3.6-rc6
| * | ARM: omap: move platform_data definitionsArnd Bergmann2012-09-191-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Platform data for device drivers should be defined in include/linux/platform_data/*.h, not in the architecture and platform specific directories. This moves such data out of the omap include directories Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Acked-by: Nicolas Pitre <nico@linaro.org> Acked-by: Tony Lindgren <tony@atomide.com> Cc: Kevin Hilman <khilman@ti.com> Cc: "Benoît Cousson" <b-cousson@ti.com> Cc: Dmitry Torokhov <dmitry.torokhov@gmail.com> Cc: David Woodhouse <dwmw2@infradead.org> Cc: Kyungmin Park <kyungmin.park@samsung.com> Cc: Ohad Ben-Cohen <ohad@wizery.com> Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Omar Ramirez Luna <omar.ramirez@ti.com> Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Cc: Florian Tobias Schandinat <FlorianSchandinat@gmx.de> Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Cc: Jarkko Nikula <jarkko.nikula@bitmer.com> Cc: Liam Girdwood <lrg@ti.com> Cc: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Cc: Jean Pihet <j-pihet@ti.com> Cc: J Keerthy <j-keerthy@ti.com> Cc: linux-omap@vger.kernel.org
* | | ARM: OMAP4460/4470: PMU: Enable PMU for OMAP4460/70Jon Hunter2012-09-241-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | OMAP4460 and OMAP4470 devices have dedicated PMU interrupts and so add these interrupts to the MPU HWMOD so we can use these for PMU events on these devices. The PMU interrupts need to be the first interrupts in the array of interrupts as the ARM PMU driver assumes this. By using these dedicated interrupts we only need to enable the MPU and DEBUG sub-systems for PMU to work. This is different to OMAP4430 that did not have dedicated interrupts and required other power domains in addition to the DEBUG sub-system to be enabled so we could route the PMU events to the CTI interrupts. Hence, OMAP4460 and OMAP4470 devices can use the same list of HWMODs to create the PMU device that is using by OMAP3. Cc: Ming Lei <ming.lei@canonical.com> Cc: Will Deacon <will.deacon@arm.com> Cc: Benoit Cousson <b-cousson@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@ti.com> Signed-off-by: Jon Hunter <jon-hunter@ti.com> [paul@pwsan.com: updated to apply] Signed-off-by: Paul Walmsley <paul@pwsan.com>
* | | ARM: OMAP2+: PMU: Convert OMAP2/3 devices to use HWMODJon Hunter2012-09-241-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert OMAP2/3 devices to use HWMOD for creating a PMU device. To support PMU on OMAP2 devices we only need to use MPU sub-system and so we can simply use the MPU HWMOD to create the PMU device. To support PMU on OMAP3 devices, we need to use the MPU and DEBUG sub-systems and so use these HWMODs to create the PMU device for OMAP3. The MPU HWMOD for OMAP2/3 devices is currently missing the PMU interrupt and so add the PMU interrupt to the MPU HWMOD for these devices. This change also moves the PMU code out of the mach-omap2/devices.c files into its own pmu.c file as suggested by Kevin Hilman to de-clutter devices.c. Cc: Ming Lei <ming.lei@canonical.com> Cc: Will Deacon <will.deacon@arm.com> Cc: Benoit Cousson <b-cousson@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@ti.com> Signed-off-by: Jon Hunter <jon-hunter@ti.com> [paul@pwsan.com: fixed checkpatch messages; updated to apply; dropped old-style initial filename line in header comments] Signed-off-by: Paul Walmsley <paul@pwsan.com>
* | | ARM: OMAP3: hwmod data: Add debugss HWMOD dataJon Hunter2012-09-241-0/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To enable PMU with runtime PM support on OMAP3 devices we need to be able to dynamically enable and disable the debug sub-system at runtime. By adding HWMOD data for the debug sub-system for OMAP3, we can build the PMU device using the debug sub-system HWMOD and control this power domain using runtime PM. Reviewed-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Jon Hunter <jon-hunter@ti.com> [paul@pwsan.com: updated to apply; added L4-EMU address space] Signed-off-by: Paul Walmsley <paul@pwsan.com>
* | | ARM: OMAP: Add a timer attribute for timers that can interrupt the DSPJon Hunter2012-09-241-1/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some instances of the DMTIMER peripheral on OMAP devices have the ability to interrupt the on-chip DSP in addition to the ARM CPU. Add a DMTIMER attribute to indicate which timers can interrupt the DSP. By using the omap_dm_timer_request_by_cap() API, driver will now be able to allocate a DMTIMER that can interrupt the DSP based upon this attribute and not require the driver to know which instance has this capability. DMTIMERs that have the ability to interrupt the DSP on OMAP devices are as follows ... - OMAP1 (OMAP5912/16xx/17xx) devices - All 8 DMTIMERs - OMAP2/3/4 devices - DMTIMERs 5-8 Please note that for OMAP3+, timer8 has the ability to interrupt the DSP and generate a PWM output. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
* | | ARM: OMAP2/3: hwmod data: add gpmcAfzal Mohammed2012-09-241-0/+61
| | | | | | | | | | | | | | | | | | | | | | | | Add gpmc hwmod and associated interconnect data Signed-off-by: Afzal Mohammed <afzal@ti.com> [paul@pwsan.com: added comments to the use of HWMOD_INIT_NO_RESET] Signed-off-by: Paul Walmsley <paul@pwsan.com>
* | | ARM: OMAP3: hwmod data: add mmu data for iva and ispPaul Walmsley2012-09-241-0/+125
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add mmu hwmod data for iva and isp. Due to compatibility an ifdef CONFIG_OMAP_IOMMU_IVA2 needs to be propagated (previously on iommu resource info) to hwmod data in OMAP3, so users of iommu and tidspbridge can avoid issues of two modules managing mmu data/irqs/resets; this until tidspbridge can be migrated to iommu framework. Cc: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Omar Ramirez Luna <omar.luna@linaro.org> [paul@pwsan.com: fixed some kerneldoc and whitespace; ISP MMUs not present on AM35xx so restricted these hwmods to 34xx/36xx] Signed-off-by: Paul Walmsley <paul@pwsan.com>
* | | ARM: OMAP3: hwmod data: add sad2d hwmodTero Kristo2012-09-241-0/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SAD2D stands for the die to die interface, and is used for communicating with the optional stacked modem. This hwmod is added in preparation for the d2d_idle move from pm34xx.c to hwmod data. Signed-off-by: Tero Kristo <t-kristo@ti.com> [paul@pwsan.com: SAD2D presumably doesn't exist on non-OMAP34xx/OMAP36xx, so only add it to the OMAP34xx/OMAP36xx lists] Signed-off-by: Paul Walmsley <paul@pwsan.com>
* | | Merge tag 'cleanup-fixes-for-v3.7' into test_v3.6-rc6_ocb3.7_cff3.7_odaf3.7Paul Walmsley2012-09-241-76/+76
|\| | | |/ |/| | | | | | | | | | | These fixes are needed to fix non-omap build breakage for twl-core driver and to fix omap1_defconfig compile when led driver changes and omap sparse IRQ changes are merged together. Also fix warnings for omaps not using pinctrl framework yet.
| * ARM: OMAP: Split plat/hardware.h, use local soc.h for omap2+Tony Lindgren2012-09-131-2/+1Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As the plat and mach includes need to disappear for single zImage work, we need to remove plat/hardware.h. Do this by splitting plat/hardware.h into omap1 and omap2+ specific files. The old plat/hardware.h already has omap1 only defines, so it gets moved to mach/hardware.h for omap1. For omap2+, we use the local soc.h that for now just includes the related SoC headers to keep this patch more readable. Note that the local soc.h still includes plat/cpu.h that can be dealt with in later patches. Let's also include plat/serial.h from common.h for all the board-*.c files. This allows making the include files local later on without patching these files again. Note that only minimal changes are done in this patch for the drivers/watchdog/omap_wdt.c driver to keep things compiling. Further patches are needed to eventually remove cpu_is_omap usage in the drivers. Also only minimal changes are done to sound/soc/omap/* to remove the unneeded includes and to define OMAP44XX_MCPDM_L3_BASE locally so there's no need to include omap44xx.h. While at it, also sort some of the includes in the standard way. Cc: linux-watchdog@vger.kernel.org Cc: alsa-devel@alsa-project.org Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Cc: Jarkko Nikula <jarkko.nikula@bitmer.com> Cc: Liam Girdwood <lrg@ti.com> Acked-by: Wim Van Sebroeck <wim@iguana.be> Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * ARM: OMAP2+: Prepare for irqs.h removalTony Lindgren2012-09-131-74/+75
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As the interrupts should only be defined in the platform_data, and eventually coming from device tree, there's no need to define them in header files. Let's remove the hardcoded references to irqs.h and fix up the includes so we don't rely on headers included in irqs.h. Note that we're defining OMAP_INTC_START as 0 to the interrupts. This will be needed when we enable SPARSE_IRQ. For some drivers we need to add #include <plat/cpu.h> for now until these drivers are fixed to remove cpu_is_omapxxxx() usage. While at it, sort som of the includes the standard way, and add the trailing commas where they are missing in the related data structures. Note that for drivers/staging/tidspbridge we just define things locally. Cc: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * ARM: OMAP: Move gpio.h to include/linux/platform_dataTony Lindgren2012-09-131-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This way we can remove includes of plat/gpio.h which won't work with the single zImage support. Note that we also remove the cpu_class_is_omap2() check in gpio-omap.c as the drivers should not call it as we need to make it local to arch/arm/mach-omap2 for single zImage support. While at it, arrange the related includes in the standard way. Cc: Grant Likely <grant.likely@secretlab.ca> Cc: linux-mtd@lists.infradead.org Cc: alsa-devel@alsa-project.org Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
* | ARM: OMAP3: hwmod data: fix iva2 reset infoTero Kristo2012-09-031-3/+12
|/ | | | | | | | | IVA2 hwmod resets were missing the status bit offsets. Also, as the hwmod itself didn't have prcm info at all, resetting iva hwmod was accessing some bogus memory addresses. Added both infos to fix this. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
* Merge tag 'pm' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-socLinus Torvalds2012-07-241-6/+6
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull arm-soc power management changes from Arnd Bergmann: "These are various power management related changes, mainly concerning cpuidle on i.MX and OMAP, as well as a the move of the omap smartreflex driver to live in the power subsystem." Fix up conflicts in arch/arm/mach-{imx/mach-imx6q.c,omap2/prm2xxx_3xxx.h} * tag 'pm' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (37 commits) ARM: OMAP2+: PM: fix IRQ_NOAUTOEN removal by mis-merge ARM: OMAP2+: do not allow SmartReflex to be built as a module ARM: OMAP2: Use hwmod to initialize mmc for 2420 ARM: OMAP3: PM: cpuidle: optimize the clkdm idle latency in C1 state ARM: OMAP3: PM: cpuidle: optimize the PER latency in C1 state ARM: OMAP3: PM: cpuidle: default to C1 in next_valid_state ARM: OMAP3: PM: cleanup cam_pwrdm leftovers ARM: OMAP3: PM: call pre/post transition per powerdomain ARM: OMAP2+: powerdomain: allow pre/post transtion to be per pwrdm ARM: OMAP3: PM: Remove IO Daisychain control from cpuidle ARM: OMAP3PLUS: hwmod: reconfigure IO Daisychain during hwmod mux ARM: OMAP3+: PRM: Enable IO wake up ARM: OMAP4: PRM: Add IO Daisychain support ARM: OMAP3: PM: Move IO Daisychain function to omap3 prm file ARM: OMAP3: PM: correct enable/disable of daisy io chain ARM: OMAP2+: PRM: fix compile for OMAP4-only build W1: OMAP HDQ1W: use runtime PM ARM: OMAP2+: HDQ1W: use omap_device W1: OMAP HDQ1W: use 32-bit register accesses W1: OMAP HDQ1W: allow driver to be built on all OMAP2+ ...
| * Merge branch 'for_3.6/pm/sr-move' of ↵Tony Lindgren2012-06-261-6/+6
| |\ | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap-pm into devel-driver
| | * ARM: OMAP3: hwmod: rename the smartreflex entriesJean Pihet2012-06-011-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Change the name field value to better reflect the smartreflex integration in the system. Signed-off-by: Jean Pihet <j-pihet@ti.com> Signed-off-by: J Keerthy <j-keerthy@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| | * ARM: OMAP2+: SmartReflex: move the smartreflex header to include/linux/powerJean Pihet2012-06-011-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move the smartreflex header file (arch/arm/mach-omap2/smartreflex.h) in a new header file include/linux/power/smartreflex.h. This change makes the SmartReflex implementation ready for the move to drivers/. Signed-off-by: Jean Pihet <j-pihet@ti.com> Signed-off-by: J Keerthy <j-keerthy@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* | | Merge tag 'timer' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-socLinus Torvalds2012-07-241-9/+1Star
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull arm-soc timer updates from Arnd Bergmann: "This contains two branches dealing with timers, one for the picoxcell platform that is now using DT with the platform-independent dw_apb_timer driver. The other change is for the omap-specific dmtimer driver." * tag 'timer' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: clocksource: dw_apb_timer: Add common DTS glue for dw_apb_timer ARM: OMAP2+: Simplify dmtimer clock aliases ARM: OMAP2+: Move dmtimer clock set function to dmtimer driver ARM: OMAP1: Fix dmtimer support ARM: OMAP: Add flag to indicate if a timer needs a manual reset ARM: OMAP: Remove timer function pointer for context loss counter ARM: OMAP: Remove loses_context variable from timer platform data ARM: OMAP2+: Fix external clock support for dmtimers ARM: OMAP2+: HWMOD: Correct timer device attributes ARM: OMAP: Add DMTIMER capability variable to represent timer features ARM: OMAP2+: Add dmtimer platform function to reserve systimers ARM: OMAP2+: Remove unused max number of timers definition ARM: OMAP: Remove unnecessary clk structure
| * | | ARM: OMAP2+: Fix external clock support for dmtimersJon Hunter2012-06-141-2/+0Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, the dmtimer determines whether an timer can support an external clock source (sys_altclk) for driving the timer by the IP version. Only OMAP24xx devices can support an external clock source, but the IP version between OMAP24xx and OMAP3xxx is common and so this incorrectly indicates that OMAP3 devices can use an external clock source. Rather than use the IP version, just let the clock framework handle this. If the "alt_ck" does not exist for a timer then the clock framework will fail to find the clock and hence will return an error. By doing this we can eliminate the "timer_ip_version" variable passed as part of the platform data and simplify the code. We can also remove the timer IP version from the HWMOD data because the dmtimer driver uses the TIDR register to determine the IP version. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | | ARM: OMAP2+: HWMOD: Correct timer device attributesJon Hunter2012-06-141-7/+1Star
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix the following issues with the timer device attributes for OMAP2+ devices: 1. For OMAP24xx devices, timers 2-8 have the ALWAYS-ON attribute indicating that these timers are in an ALWAYS-ON power domain. This is not the case only timer1 is in an ALWAYS-ON power domain. 2. For OMAP3xxx devices, timers 2-7 have the ALWAYS-ON attribute indicating that these timers are in an ALWAYS-ON power domain. This is not the case only timer1 and timer12 are in an ALWAYS-ON power domain. 3. For OMAP3xxx devices, timer12 does not have the ALWAYS-ON attribute but is in an always-on power domain. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* | | Merge tag 'cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-socLinus Torvalds2012-07-241-0/+23
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull general arm-soc cleanups from Arnd Bergmann: "These are all boring changes, moving stuff around or renaming things mostly, and also getting rid of stuff that is duplicate or should not be there to start with. Platform-wise this is all over the place, mainly omap, samsung, at91, imx and tegra." Resolve trivial conflict in arch/arm/mach-omap2/clockdomains3xxx_data.c * tag 'cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (67 commits) ARM: clps711x: Remove the setting of the time ARM: clps711x: Removed superfluous transform virt_to_bus and related functions ARM: clps711x/p720t: Replace __initcall by .init_early call ARM: S3C24XX: Remove unused GPIO definitions for Openmoko GTA02 board ARM: S3C24XX: Remove unused GPIO definitions for port J ARM: S3C24XX: Remove unused GPA, GPE, GPH bank GPIO aliases ARM: S3C24XX: Convert the touchscreen setup code to common GPIO API ARM: S3C24XX: Convert the PM code to gpiolib API ARM: S3C24XX: Convert QT2410 board file to the gpiolib API ARM: S3C24XX: Convert SMDK board file to the gpiolib API ARM: S3C24XX: Free the backlight gpio requested in Mini2440 board code ARM: imx: remove unused pdata from device macros ARM: imx: Kconfig: Remove IMX_HAVE_PLATFORM_IMX_SSI from MACH_MX25_3DS ARM: at91: fix new build errors ARM: at91: add AIC5 support ARM: at91: remove mach/irqs.h ARM: at91: sparse irq support ARM: at91: at91 based machines specify their own irq handler at run time ARM: at91: remove static irq priorities for sam9x5 ARM: at91: add of irq priorities support ...
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| *-. \ \ Merge branches 'clock_cleanup_misc_3.6', ↵Paul Walmsley2012-06-211-0/+23
| |\ \ \ \ | | |_|/ / | |/| | | | | | | | | | | | | | | | | | | | | | | 'control_clean_dspbridge_writes_cleanup_3.6', 'hwmod_soc_conditional_cleanup_3.6', 'mcbsp_clock_aliases_cleanup_3.6' and 'remove_clkdm_requirement_from_hwmod_3.6' into omap_cleanup_a_3.6 Conflicts: arch/arm/mach-omap2/omap_hwmod.c
| | | * | ARM: OMAP3: Move McBSP fck clock alias to hwmod dataPeter Ujfalusi2012-06-191-0/+21
| | |/ / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | Remove the existing alias for pad_fck, prcm_fck from the clock data and add them as opt_clks to the hwmod data. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
| | * | ARM: OMAP2+: hwmod: use init-time function ptrs for enable/disable moduleKevin Hilman2012-06-181-0/+2
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The enable/disable module functions are specific to SoCs with OMAP4-class PRCM. Rather than use cpu_is* checks at runtime inside the enable/disable module functions, use cpu_is at init time to initialize function pointers only for SoCs that need them. NOTE: the cpu_is* check for _enable_module was different than the one for _disable_module, and this patch uses cpu_is_omap44xx() for both. Signed-off-by: Kevin Hilman <khilman@ti.com> [paul@pwsan.com: moved soc_ops function pointers to be per-kernel rather than per-hwmod since they do not vary by hwmod; added kerneldoc] Signed-off-by: Paul Walmsley <paul@pwsan.com>
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*-. | | Merge branches 'am35xx_hwmod_data_fixes_a_3.6', 'am35xx_emac_mdio_devel_3.6' ↵Paul Walmsley2012-06-281-0/+105
|\ \| | | | | | | | | | | | | | and 'am35xx_prcm_data_devel_3.6' into am35xx_devel_3.6
| * | | ARM: OMAP AM35x: EMAC/MDIO integration: Add Davinci EMAC/MDIO hwmod supportMark A. Greer2012-06-271-0/+105
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add hwmod support for the EMAC (and MDIO) ethernet controller that's on the am35x family of SoC's. Signed-off-by: Mark A. Greer <mgreer@animalcreek.com> [paul@pwsan.com: updated subject line; updated to apply on v3.5-rc4; added comments to hwmod data regarding IPSS] Signed-off-by: Paul Walmsley <paul@pwsan.com>
* | | ARM: OMAP: AM35xx: fix UART4 softresetPaul Walmsley2012-06-271-0/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | During kernel init, the AM3505/AM3517 UART4 cannot complete its softreset: omap_hwmod: uart4: softreset failed (waited 10000 usec) This also results in another warning later in the boot process: omap_hwmod: uart4: enabled state can only be entered from initialized, idle, or disabled state From empirical observation, the AM35xx UART4 IP block requires either uart1_fck or uart2_fck to be enabled while UART4 resets. Otherwise the reset will never complete. So this patch adds uart1_fck as an optional clock for UART4 and adds the appropriate hwmod flag to cause uart1_fck to be enabled during the reset process. (The choice of uart1_fck over uart2_fck was arbitrary.) Unfortunately this observation raises many questions. Is it necessary for uart1_fck or uart2_fck to be controlled with uart4_fck for the UART4 to work correctly? What exactly do the AM35xx UART4 clock tree and the related PRCM idle management FSMs look like? If anyone has the ability to answer these questions through empirical functional testing, or hardware information from the AM35xx designers, it would be greatly appreciated. Cc: Benoît Cousson <b-cousson@ti.com> Cc: Kyle Manna <kyle.manna@fuel7.com> Cc: Mark A. Greer <mgreer@animalcreek.com> Cc: Ranjith Lohithakshan <ranjithl@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com> Tested-by: Mark A. Greer <mgreer@animalcreek.com>
* | | ARM: OMAP AM35xx: clock and hwmod data: fix UART4 dataPaul Walmsley2012-06-271-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add missing terminators to the arrays of IRQ, DMA, and address space structure records in the AM35xx UART4 hwmod data. Without these terminators, the following warnings appear on boot: omap_uart.3: failed to claim resource 58 omap_device: omap_uart: build failed (-16) WARNING: at /home/paul/linux/arch/arm/mach-omap2/serial.c:375 omap_serial_init_port+0x198/0x284() Could not build omap_device for omap_uart: uart4. Also, AM35xx uart4_fck has an incorrect parent clock pointer. Fix it and clean up a whitespace issue. Fix some incorrectly-named macros related to AM35xx UART4. Cc: Kyle Manna <kyle.manna@fuel7.com> Cc: Mark A. Greer <mgreer@animalcreek.com> Cc: Ranjith Lohithakshan <ranjithl@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com> Tested-by: Mark A. Greer <mgreer@animalcreek.com>
* | | ARM: OMAP AM35xx: clock and hwmod data: fix AM35xx HSOTGUSB hwmodPaul Walmsley2012-06-271-9/+5Star
|/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Partially fix the hwmod data for the AM35xx USB OTG hwmod. This should resolve the following boot warning on AM35xx platforms: omap_hwmod: am35x_otg_hs: cannot be enabled for reset (3) While here, also fix the clkdev records, to avoid warnings about duplicate clock aliases. The hwmod is also connected to the wrong interconnect. It should be connected to the IPSS, not the L4 CORE. But that is left for a future fix, since it probably has a dependency on some hwmod core changes. Cc: Felipe Balbi <balbi@ti.com> Cc: Hema HK <hemahk@ti.com> Cc: Mark A. Greer <mgreer@animalcreek.com> Signed-off-by: Paul Walmsley <paul@pwsan.com> Tested-by: Mark A. Greer <mgreer@animalcreek.com>
* | Merge tag 'omap-cleanup-devices-for-v3.5' of ↵Olof Johansson2012-05-111-6/+88
|\| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/cleanup2 Changes to split plat-omap/devices.c into mach-omap1 and mach-omap2 except for the RNG driver that will be done later on. As this depends on omap-devel-hwmod-data-for-v3.5 and causes merge conflict with omap-fixes-non-critical-for-v3.5, this branch is based on merge of the two. By Tony Lindgren (7) and others via Tony Lindgren (4) and Paul Walmsley (1) * tag 'omap-cleanup-devices-for-v3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (27 commits) ARM: OMAP1: Pass dma request lines in platform data to MMC driver ARM: OMAP: Move omap_mmc_add() to mach-omap1 ARM: OMAP2: Use hwmod to initialize mmc for 2420 ARM: OMAP2+: Move omap_dsp_reserve_sdram_memblock() to mach-omap2 ARM: OMAP1: Move omap_init_uwire to mach-omap1 ARM: OMAP1: Move omap_init_audio() to keep the devices in alphabetical order ARM: OMAP2+: WDTIMER integration: fix !PM boot crash, disarm timer after hwmod reset ARM: OMAP2/3: hwmod data: Add 32k-sync timer data to hwmod database ARM: OMAP4: hwmod_data: Name the common irq for McBSP ports ARM: OMAP4: hwmod data: I2C: add flag for context restore ARM: OMAP3: hwmod_data: Rename the common irq for McBSP ports ARM: OMAP2xxx: hwmod data: add HDQ/1-wire hwmod ARM: OMAP3: hwmod data: add HDQ/1-wire hwmod ARM: OMAP2+: hwmod data: add HDQ/1-wire hwmod shared data ARM: OMAP2+: HDQ1W: add custom reset function ARM: OMAP2420: hwmod data: Add MMC hwmod data for 2420 arm: omap3: clockdomain data: Remove superfluous commas from gfx_sgx_3xxx_wkdeps[] ARM: OMAP2+: powerdomain: Get rid off duplicate pwrdm_clkdm_state_switch() API ARM: OMAP3: clock data: add clockdomain for HDQ functional clock ARM: OMAP3+: dpll: Configure autoidle mode only if it's supported ...
| * ARM: OMAP2+: WDTIMER integration: fix !PM boot crash, disarm timer after ↵Kevin Hilman2012-05-091-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | hwmod reset Without runtime PM enabled, hwmod needs to leave all IP blocks in an enabled state by default so any driver access to the HW will succeed. This is accomplished by seting the postsetup_state to enabled for all hwmods during init when runtime PM is disabled. Currently, we have a special case for WDT in that its postsetup_state is always set to disabled. This is done so that the WDT is disabled and the timer is disarmed at boot in case there is no WDT driver. This also means that when runtime PM is disabled, if a WDT driver *is* built in the kernel, the kernel will crash on the first access to the WDT hardware. We can't simply leave the WDT module enabled, because the timer is armed by default after reset. That means that if there is no WDT driver initialzed or loaded before the timer expires, the kernel will reboot. To fix this, a custom reset method is added to the watchdog class of omap_hwmod. This method will *always* disarm the timer after hwmod reset. The WDT timer then will only be rearmed when/if the driver is loaded for the WDT. With the timer disarmed by default, we no longer need a special-case for the postsetup_state of WDT during init, so it is removed. Any platforms wishing to ensure the watchdog remains armed across the entire boot boot can simply disable the reset-on-init feature of the watchdog hwmod using omap_hwmod_no_setup_reset(). Tested on 3530/Overo, 4430/Panda. NOTE: on 4430, the hwmod OCP reset does not seem to rearm the timer as documented in the TRM (and what happens on OMAP3.) I noticed this because testing the HWMOD_INIT_NO_RESET feature with no driver loaded, I expected a reboot part way through the boot, but did not see a reboot. Adding some debug to read the counter, I verified that right after OCP softreset, the counter is not firing. After writing the magic start sequence, the timer starts counting. This means that the timer disarm sequence added here does not seem to be needed for 4430, but is technically the correct way to ensure the timer is disarmed, so it is left in for OMAP4. Special thanks to Paul Walmsley for helping brainstorm ideas to fix this problem. Cc: Paul Walmsley <paul@pwsan.com> Signed-off-by: Kevin Hilman <khilman@ti.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> [paul@pwsan.com: updated the omap2_wd_timer_reset() function in the wake of commit 3c55c1baffa5f719eb2ae9729088bc867f972f53 ("ARM: OMAP2+: hwmod: Revert "ARM: OMAP2+: hwmod: Make omap_hwmod_softreset wait for reset status""); added kerneldoc; rolled in warning fix from Kevin] Signed-off-by: Paul Walmsley <paul@pwsan.com>
| * ARM: OMAP2/3: hwmod data: Add 32k-sync timer data to hwmod databaseVaibhav Hiremath2012-05-091-0/+53
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add 32k-sync timer hwmod-data and add ocp_if details to omap2 & 3 hwmod table. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Felipe Balbi <balbi@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Benoit Cousson <b-cousson@ti.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
| * ARM: OMAP3: hwmod_data: Rename the common irq for McBSP portsPeter Ujfalusi2012-05-091-5/+5
| | | | | | | | | | | | | | | | | | Use 'common' as name for the common irq number in hwmod data for the McBSP ports. The same name already in use for OMAP2430, and the OMAP4 hwmod data will be using the same name. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
| * ARM: OMAP3: hwmod data: add HDQ/1-wire hwmodPaul Walmsley2012-05-091-0/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the HDQ1W hwmod for OMAP34xx, OMAP36xx, and AM3505/3517 devices. According to the respective TRMs, it doesn't appear to be available for the 816x/814x or the AM335x. The OCPIF_SWSUP_IDLE flag is added to work around an apparent hardware bug: the hardware is not taking the CM_FCLKEN*_CORE.EN_HDQ bit into account when considering whether to go idle: http://www.spinics.net/lists/linux-omap/msg63576.html This causes HDQ transfers to fail or become corrupt. Thanks to NeilBrown for his help diagnosing and testing fixes for this problem. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: NeilBrown <neilb@suse.de> Tested-by: NeilBrown <neilb@suse.de>
* | ARM: OMAP: AM35xx: convert 3517 detection/flags to AM35xxKevin Hilman2012-05-101-1/+1
|/ | | | | | | | | | | | | | | | | | Currently cpu_is_omap3517() actually detects any device in the AM35x family (3517 and no-SGX version 3505.) To make it more clear what is being detected, convert the names from 3517 to AM35xx. This adds a new soc_is_am35xx() which duplicates the cpu_is_omap3517(). In order to avoid cross-tree dependencies with clock-tree changes, cpu_is_omap3517() is left until the clock changes are merged, at which point cpu_is_omap3517() will be completely removed. Acked-by: Vaibhav Hiremath <hvaibhav@ti.com> Tested-by: Vaibhav Hiremath <hvaibhav@ti.com> Tested-by: Mark A. Greer <mgreer@animalcreek.com> Signed-off-by: Kevin Hilman <khilman@ti.com> [tony@atomide.com: change to use soc_is_omap instead] Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: OMAP3: hwmod data: add IVA hard reset lines, main clock, clockdomainPaul Walmsley2012-04-191-0/+10
| | | | | | | | | | | | The IVA hwmod data is missing some fields that cause the following warning on boot: [ 0.118011] omap_hwmod: iva: cannot be enabled for reset (3) Fix by encoding the IP block's main functional clock, reset lines, and clockdomain. Signed-off-by: Paul Walmsley <paul@pwsan.com>
* ARM: OMAP3: hwmod data: fix IVA interface clockPaul Walmsley2012-04-191-1/+1
| | | | | | | | | | | | | | | The OMAP3 hwmod data listed iva2_ck as an interface clock between the IVA and L3. This is incorrect. iva2_ck is not an interface clock. Since it cannot auto-idle, specifying it here prevents the IVA and at least one of the CORE clockdomains from going idle, which causes PM problems such as these upon system suspend: [ 70.626129] Powerdomain (iva2_pwrdm) didn't enter target state 1 [ 70.626190] Powerdomain (core_pwrdm) didn't enter target state 1 Fix by specifying the actual interface clock in the hwmod data. Signed-off-by: Paul Walmsley <paul@pwsan.com>
* ARM: OMAP2+: hwmod data: remove forward declarations, reorganizePaul Walmsley2012-04-191-1187/+1101Star
| | | | | | | | | | | | | Reorganize the hwmod data to declare the IP blocks first and the interconnects second. This allows us to remove the forward declarations, which this patch also does. Saves some lines of source data. While here, take the opportunity to synchronize the order of the OMAP44xx hwmod data with the autogenerator output -- it's slightly different due to past mismerges -- and fix a few minor typos and whitespace problems in the files. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Benoît Cousson <b-cousson@ti.com>
* ARM: OMAP2+: hwmod data: convert to link registrationPaul Walmsley2012-04-191-618/+156Star
| | | | | | | | | | | | | | | | Register interconnect links between IP blocks, rather than the IP blocks themselves. (The IP blocks will be registered as a side-effect of registering the links.) The objective is to reduce the number of lines of static data and facilitate the sharing of IP block data between different SoCs. These objectives come at the penalty of increased boot time due to increased computation. While here, fix a few whitespace problems and inaccurate variable names. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Benoît Cousson <b-cousson@ti.com>
* ARM: OMAP3: hwmod data: GPTIMER12 is attached to a separate interconnectPaul Walmsley2012-04-191-3/+25
| | | | | | | GPTIMER12 is attached to the L4 SEC interconnect, not directly to L4 WKUP. Add the L4 SEC interconnect and attach GPTIMER12 to it. Signed-off-by: Paul Walmsley <paul@pwsan.com>
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