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* ARM: SAMSUNG: Add lookup of sdhci-s3c clocks using generic namesRajeshwari Shinde2011-12-231-31/+37
| | | | | | | | | Add support for lookup of sdhci-s3c controller clocks using generic names for s3c2416, s3c64xx, s5pc100, s5pv210 and exynos4 SoC's. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> [kgene.kim@samsung.com: fixed trailing whitespace] Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
* ARM: S3C24XX: use clk_get_rate to init fclk in common_setup_clocksHeiko Stuebner2011-10-141-9/+2Star
| | | | | | | | | | | | | Previously the fclk rate was calculated by dividing the pll through the divider value of the armdiv. With a real armdiv clk in place it's possible to simply read its value, which does essentially the same. This change makes the whole fdiv_fn function pointers supplied to s3c2443_common_init_clocks and s3c2443_common_setup_clocks obsolete, so remove it too. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
* ARM: S3C2416: Add comment describing the armdiv/armclkHeiko St?bner2011-10-141-0/+8
| | | | | Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
* ARM: S3C24XX: Add infrastructure to transmit armdiv to common codeHeiko Stuebner2011-10-141-1/+3
| | | | | | | | This is needed for making the armdiv clock common to S3C2443 and S3C2416/2450. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
* ARM: S3C2416: Add armdiv_mask constantHeiko Stuebner2011-10-141-1/+1
| | | | | | | | The S3C2416/2450 has only 3 bits for the armdiv setting instead of the 4 bits of the S3C2443. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
* Merge branch 'next-samsung-cleanup-2' into next-samsung-devel-2Kukjin Kim2011-10-041-1/+0Star
|\ | | | | | | | | Conflicts: arch/arm/plat-s5p/include/plat/pll.h
| * ARM: SAMSUNG: Consolidate plat/pll.hKukjin Kim2011-10-041-1/+0Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Removed - arch/arm/plat-s3c24xx/include/plat/pll.h - arch/arm/mach-s3c64xx/include/mach/pll.h - arch/arm/plat-s5p/include/plat/pll.h - arch/arm/plat-samsung/include/plat/pll6553x.h And created - arch/arm/plat-samsung/include/plat/pll.h Cc: Ben Dooks <ben-linux@fluff.org> [kgene.kim@samsung.com: changed title] [kgene.kim@samsung.com: fixed conflicts in plat-s5p/include/pll.h] Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
* | ARM: S3C2416: Add HSSPI clock sourced from EPLLHeiko Stuebner2011-10-041-0/+28
|/ | | | | | | This clock is special to the S3C2416/2450 SoCs. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
* ARM: S3C24XX: Add clkdev supportThomas Abraham2011-07-201-5/+5
| | | | | Signed-off-by: Thomas Abraham <thomas.ab@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
* ARM: S3C24XX: Add address map and clock definitions for HSMMC0Yauhen Kharuzhy2011-01-061-5/+13
| | | | | | | | | | | | | | Define maps for HSMMC devices. S3C2443 has one HSMMC device with base address 0x4A800000. S3C2416 has HSMMC0 at 0x4AC00000 and HSMMC1 at 0x4A800000. So suppose that S3C2443 has only HSMMC1. Define clock for hsmmc0 device and register it. Signed-off-by: Yauhen Kharuzhy <jekhor@gmail.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
* ARM: S3C2416: Add basic clock supportBen Dooks2010-05-101-0/+135
Add basic clock support for the PLLs, HSMMC channels and PWM clocks. This is enough to get a basic system up and running. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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