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* [ARM] S3C64XX: add AHB_CON and SPCON register address definitionsBen Dooks2009-03-101-0/+4
| | | | | | | Add the address definitions for S3C64XX_AHB_CONx and SPCON registers for use in the PM code. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* [ARM] S3C64XX: Add definitions for the GPIO memory port configurationsBen Dooks2009-03-101-0/+25
| | | | | | | Add defines for the registers that control the GPIO pins that are run the memory interface. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* [ARM] S3C64XX: SYSCON power and sleep control register definesBen Dooks2009-03-101-0/+116
| | | | | | | Add the register defines for the sleep and power control functions in the S3C64XX SYSCON register block. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* [ARM] S3C64XX: Add S3C64XX_SPCON register bit definitionsBen Dooks2009-03-101-0/+81
| | | | | | | Add the definitions for the SPCON register in the GPIO block. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* [ARM] S3C64XX: Add GPIO SPCONSLP and SLPEN register definitionsBen Dooks2009-03-101-0/+27
| | | | | | | Add GPIO register definitions for SPCONSLP and SLPEN for controlling the state of the pins over sleep. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* [ARM] S3C64XX: Add EINT group regs and move IRQ_EINT to regs-gpio.hBen Dooks2009-03-101-17/+61
| | | | | | | | Add definitions for the EINT group registers and move the EINT IRQ register definitions out of arch/arm/plat-s3c64xx/irq-eint.c so that they are available for re-use with PM and the other code. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* [ARM] S3C64XX: Add modem registers and a virtual mapBen Dooks2009-03-101-0/+31
| | | | | | | | | Add the modem registers and a virtual mapping for the modem block. This is is required as there are registers that control the LCD block that need to be saved over suspend as well as interrupt controls. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* [ARM] S3C64XX: Rename IRQ_UHOST to IRQ_USBHBen Dooks2009-02-271-1/+1
| | | | | | | | The USB OHCI host device expects the IRQ definition to be named IRQ_USBH, so rename the S3C64XX IRQ header to match. Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* [ARM] S3C64XX: Fix EINT group macro definitionMatt Hsu2009-01-081-1/+1
| | | | | | | | | Fix IRQ_EINT_GROUP which has an extra _ in it and an error in the IRQ offset. Signed-off-by: Matt Hsu <matt_hsu@openmoko.org> [ben-linux@fluff.org: rewrite description] Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* Merge branch 'next-s3c64xx-device' into next-mergedBen Dooks2008-12-1816-0/+796
|\ | | | | | | | | | | Conflicts: arch/arm/mach-s3c2440/mach-at2440evb.c
| * [ARM] S3C: Add i2c1 device definitionBen Dooks2008-12-161-0/+5
| | | | | | | | | | | | | | | | Add device definition and support functions for the second i2c device (i2c1). If this is selected, the first i2c bus will become index 0 instead of index -1. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| * [ARM] S3C64XX: GPIO definitions for BANKS N,O,P,QBen Dooks2008-12-164-0/+239
| | | | | | | | | | | | | | GPIO register and configuration definitions for GPIO banks N, O, P and Q. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| * [ARM] S3C64XX: GPIO definitions for BANKS G,H,I,JBen Dooks2008-12-164-0/+192
| | | | | | | | | | | | | | GPIO register and configuration definitions for GPIO banks G, H, I and J. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| * [ARM] S3C64XX: GPIO definitions for BANKS D,E,FBen Dooks2008-12-163-0/+164
| | | | | | | | | | | | | | GPIO register and configuration definitions for GPIO banks D, E and F. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| * [ARM] S3C64XX: GPIO definitions for BANKS A,B,CBen Dooks2008-12-163-0/+161
| | | | | | | | | | | | | | GPIO register and configuration definitions for GPIO banks A, B and C. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| * [ARM] S3C64XX: GPIO library supportBen Dooks2008-12-161-0/+35
| | | | | | | | | | | | | | Add gpiolib registration for the GPIOs available on the S3C64XX platform Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* | [ARM] S3C64XX: Mask the pll values correctlyKyungmin Park2008-12-161-3/+3
| | | | | | | | | | | | | | | | | | Correct the PLL field masks to ensure the PLL functions return the right value. Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> [ben-linux@fluff.org: improve the description text] Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* | [ARM] S3C64XX: Fix MMC0 clock source register maskBen Dooks2008-12-161-2/+2
| | | | | | | | | | | | | | Fix the definition of the MMC0 register shift and mask in the CLKSRC register. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* | [ARM] S3C6XX: Add enable for clk_48Ben Dooks2008-12-161-0/+24
|/ | | | | | Add apropriate enable call for clk_48m. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* [ARM] S3C64XX: Add external interrupt group definitionsBen Dooks2008-12-161-3/+37
| | | | | | | Add definitions for the external interrupt groups which accompany the original IRQ_EINT from the s3c24xx series. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* [ARM] S3C64XX: Add IRQ_EINT supportBen Dooks2008-12-161-1/+2
| | | | | | | | | | | Add the necessary code to support IRQ_EINT(x) on the S3C64XX series of CPUs. Note, since there is no GPIO configuration support in the kernel, the irq set_type method does not configure the relevant pin to interrupt. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* [ARM] S3C64XX: Clock support for S3C6400/S3C6410Ben Dooks2008-12-152-1/+96
| | | | | | | | Add the PLL clock initialisation and clock registration and include the clocks sourced via CLKDIVx for most of the on-chip peripherals. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* [ARM] S3C64XX: Add PLL definitionsBen Dooks2008-12-151-0/+74
| | | | | | | Add definitions for the s3c6400 epll and main pll as well as functions to decode the rate. Add Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* [ARM] S3C64XX: Map timer memory and interruptsBen Dooks2008-12-151-6/+14
| | | | | | | Add the physical to virtual memory mapping and the necessary interrupt demuxing for the PWM timer blocks. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* [ARM] S3C64XX: Add VIC0 and VIC1 sourced interriptsBen Dooks2008-12-152-0/+4
| | | | | | | Add and initialise the two VIC (PL192) found on the S3C64XX series CPUs. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* [ARM] S3C64XX: Basic CPU detection and map initialisationBen Dooks2008-12-152-0/+61
| | | | | | | | | Initialise the basic physical to virtual mappings and then detect the CPU that the system is being run on so that the cpu code code can call the correct initialisation code. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* [ARM] S3C64XX: Add IRQ definitions for VIC0 and VIC1Ben Dooks2008-12-151-0/+79
| | | | | | | Add IRQ definitions for the VIC0 and VIC1 interrupts on the S3C6400 and S3C6410 SoCs. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* [ARM] S3C64XX: Add UARTdevice definitionsBen Dooks2008-12-151-1/+34
| | | | | | | Add resources and information for the UART deviecs on the S3C64XX CPUs. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* [ARM] S3C64XX: Add <plat/regs-clock.h>Ben Dooks2008-12-151-0/+131
| | | | | | Initial clock register defines. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* [ARM] S3C64XX: Initial arch header filesBen Dooks2008-12-151-0/+38
Add the initial header files for the S3C64XX support to satisfy the minimal requirements to build a kernel. Some definitions will therefore be placeholders or empty functions that will ensure that the system can build and have base functionality. These will be filled in at a later date. Signed-off-by: Ben Dooks <ben-linux@fluff.org>