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* Merge tag 'armsoc-dt64' of ↵Linus Torvalds2016-12-161-1/+61
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM 64-bit DT updates from Arnd Bergmann: "A couple of interesting new SoC platforms are now supported, these are the respective DTS sources: - Samsung Exynos5433 mobile phone platform, including an (almost) fully supported phone reference board. - Hisilicon Hip07 server platform and D05 board, the latest iteration of their product line, now with 64 Cortex-A72 cores across two sockets. - Allwinner A64 SoC, the first 64-bit chip from their "sunxi" product line, used in Android tablets and ultra-cheap development boards - NXP LS1046A Communication processor, improving on the earlier LS1043A with faster CPU cores - Qualcomm MSM8992 (Snapdragon 808) and MSM8994 (Snapdragon 810) mobile phone SoCs - Early support for the Nvidia Tegra Tegra186 SoC - Amlogic S905D is a minor variant of their existing Android consumer product line - Rockchip PX5 automotive platform, a close relative of their popular rk3368 Android tablet chips Aside from the respective evaluation platforms for the above chips, there are only a few consumer devices and boards added this time: - Huawei Nexus 6P (Angler) mobile phone - LG Nexus 5x (Bullhead) mobile phone - Nexbox A1 and A95X Android TV boxes - Pine64 development board based on Allwinner A64 - Globalscale Marvell ESPRESSOBin community board based on Armada 3700 - Renesas "R-Car Starter Kit Pro" (M3ULCB) low-cost automotive board For the existing platforms, we get bug fixes and new peripheral support for Juno, Renesas, Uniphier, Amlogic, Samsung, Broadcom, Rockchip, Berlin, and ZTE" * tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (168 commits) arm64: dts: fix build errors from missing dependencies ARM64: dts: meson-gxbb: add SCPI pre-1.0 compatible ARM64: dts: meson-gxl: Add support for Nexbox A95X ARM64: dts: meson-gxm: Add support for the Nexbox A1 ARM: dts: artpec: add pcie support arm64: dts: berlin4ct-dmp: add missing unit name to /memory node arm64: dts: berlin4ct-stb: add missing unit name to /memory node arm64: dts: berlin4ct: add missing unit name to /soc node arm64: dts: qcom: msm8916: Add ddr support to sdhc1 arm64: dts: exynos: Enable HS400 mode for eMMC for TM2 ARM: dts: Add xo to sdhc clock node on qcom platforms ARM64: dts: Add support for Meson GXM dt-bindings: add rockchip RK1108 Evaluation board arm64: dts: NS2: Add PCI PHYs arm64: dts: NS2: enable sdio1 arm64: dts: exynos: Add the mshc_2 node for supporting T-Flash arm64: tegra: Add NVIDIA P2771 board support arm64: tegra: Enable PSCI on P3310 arm64: tegra: Add NVIDIA P3310 processor module support arm64: tegra: Add GPIO controllers on Tegra186 ...
| * arm64: dts: NS2: Add PCI PHYsJon Mason2016-11-211-0/+6
| | | | | | | | | | | | | | | | PCI PHYs are missing from the Northstar2 DT entries for the 2 PCI buses. Add them so that PCI devices can be discovered. Signed-off-by: Jon Mason <jon.mason@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
| * arm64: dts: Add Broadcom Northstar2 device tree entries for PDC driver.Rob Rice2016-11-071-0/+36
| | | | | | | | | | | | | | | | | | Add Broadcom Northstar2 SoC device tree entries for PDC driver. Signed-off-by: Rob Rice <rob.rice@broadcom.com> Reviewed-by: Ray Jui <ray.jui@broadcom.com> Reviewed-by: Scott Branden <scott.branden@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
| * arm64: dts: Update Broadcom NS2 to generic IOMMU bindingRobin Murphy2016-10-191-1/+1
| | | | | | | | | | | | | | | | | | | | | | With the "mmu-masters" property now deprecated and optional, the generic binding offers a more efficient way to specify no masters. CC: Ray Jui <rjui@broadcom.com> CC: Scott Branden <sbranden@broadcom.com> CC: Jon Mason <jonmason@broadcom.com> Signed-off-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
| * ARM64: dts: Add QSPI Device Tree node for NS2Kamal Dasu2016-10-191-0/+18
| | | | | | | | | | | | | | | | | | Adding QSPI node compatible with the new spi-bcm-qspi driver for the Broadcom's Northstar2 SoC. Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com> Signed-off-by: Yendapally Reddy Dhananjaya Reddy <yendapally.reddy@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
* | arm64: dts: NS2: add AMAC ethernet supportJon Mason2016-11-071-0/+12
|/ | | | | | | | Add support for the AMAC ethernet to the Broadcom Northstar2 SoC device tree Signed-off-by: Jon Mason <jon.mason@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* Merge branch 'dt/irq-fix' into next/dt64Arnd Bergmann2016-09-141-4/+4
|\ | | | | | | | | | | | | | | * dt/irq-fix: arm64: dts: Fix broken architected timer interrupt trigger This resolves a non-obvious conflict between a bugfix from v4.8 and a cleanup for the exynos7 platform.
| * arm64: dts: Fix broken architected timer interrupt triggerMarc Zyngier2016-09-141-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ARM architected timer specification mandates that the interrupt associated with each timer is level triggered (which corresponds to the "counter >= comparator" condition). A number of DTs are being remarkably creative, declaring the interrupt to be edge triggered. A quick look at the TRM for the corresponding ARM CPUs clearly shows that this is wrong, and I've corrected those. For non-ARM designs (and in the absence of a publicly available TRM), I've made them active low as well, which can't be completely wrong as the GIC cannot disinguish between level low and level high. The respective maintainers are of course welcome to prove me wrong. While I was at it, I took the liberty to fix a couple of related issue, such as some spurious affinity bits on ThunderX, and their complete absence on ls1043a (both of which seem to be related to copy-pasting from other DTs). Acked-by: Duc Dang <dhdang@apm.com> Acked-by: Carlo Caione <carlo@endlessm.com> Acked-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* | arm64: dts: Add PWM DT node for NS2Yendapally Reddy Dhananjaya Reddy2016-08-081-0/+8
|/ | | | | | | Add device tree entry for PWM support for Broadcom Northstar 2 SoC. Signed-off-by: Yendapally Reddy Dhananjaya Reddy <yendapally.reddy@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
* Merge tag 'armsoc-dt64' of ↵Linus Torvalds2016-08-021-0/+119
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull 64-bit ARM DT updates from Olof Johansson: "Just as the 32-bit contents, the 64-bit device tree branch also contains a number of additions this release cycle. New platforms: - LG LG1313 - Mediatek MT6755 - Renesas r8a7796 - Broadcom 2837 Other platforms with larger updates are: - Nvidia X1 platforms (USB 3.0, regulators, display subsystem) - Mediatek MT8173 (display subsystem added) - Rockchip RK3399 (a lot of new peripherals) - ARM Juno reference implementation (SCPI power domains, coresight, thermal)" * tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (118 commits) arm64: tegra: Enable HDMI on Jetson TX1 arm64: tegra: Add sor1_src clock arm64: tegra: Add XUSB powergates on Tegra210 arm64: tegra: Add DPAUX pinctrl bindings arm64: tegra: Add ACONNECT bus node for Tegra210 arm64: tegra: Add audio powergate node for Tegra210 arm64: tegra: Add regulators for Tegra210 Smaug arm64: tegra: Correct Tegra210 XUSB mailbox interrupt arm64: tegra: Enable XUSB controller on Jetson TX1 arm64: tegra: Enable debug serial on Jetson TX1 arm64: tegra: Add Tegra210 XUSB controller arm64: tegra: Add Tegra210 XUSB pad controller arm64: tegra: Add DSI panel on Jetson TX1 arm64: tegra: p2597: Add SDMMC power supplies arm64: tegra: Add PMIC support on Jetson TX1 Revert "ARM64: DTS: meson-gxbb: switch ethernet to real clock" arm64: dts: hi6220: Add pl031 RTC support arm64: dts: r8a7796/salvator-x: Enable watchdog timer arm64: dts: r8a7796: Add RWDT node arm64: dts: r8a7796: Use SYSC "always-on" PM Domain ...
| * arm64: dts: NS2: Add CCI-400 PMU supportJon Mason2016-05-311-0/+20
| | | | | | | | | | | | | | Add support to the Northstar 2 Device tree file for the ARM CCI-400 PMU. Signed-off-by: Jon Mason <jonmason@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
| * arm64: dts: NS2: Add all of the UARTsJon Mason2016-05-311-0/+30
| | | | | | | | | | | | | | | | | | Add all of the UARTs present on NS2 and enable them in the SVK device tree file. Also, do some magic to make sure that uart3 is discovered as ttyS0 (as that is the console UART). Signed-off-by: Jon Mason <jonmason@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
| * arm64: dts: Enable GPIO for Broadcom NS2 SoCYendapally Reddy Dhananjaya Reddy2016-05-311-0/+19
| | | | | | | | | | | | | | This enables the GPIO support for Broadcom NS2 SoC Signed-off-by: Yendapally Reddy Dhananjaya Reddy <yendapally.reddy@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
| * arm64: dts: enable pinctrl for Broadcom NS2 SoCYendapally Reddy Dhananjaya Reddy2016-05-311-0/+7
| | | | | | | | | | | | | | | | | | This enables the pinctrl support for Broadcom NS2 SoC Signed-off-by: Yendapally Reddy Dhananjaya Reddy <yendapally.reddy@broadcom.com> Reviewed-by: Ray Jui <ray.jui@broadcom.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
| * arm64: dts: Add SATA3 AHCI and SATA3 PHY DT nodes for NS2Anup Patel2016-05-311-0/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | We have one dual-port SATA3 AHCI controller present in NS2 SoC. This patch enables SATA3 AHCI controller and SATA3 PHY for NS2 SoC in NS2 DT. Signed-off-by: Anup Patel <anup.patel@broadcom.com> Reviewed-by: Ray Jui <rjui@broadcom.com> Reviewed-by: Scott Branden <sbranden@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
* | dt: mdio-mux: Add mdio multiplexer driver nodePramod Kumar2016-06-111-0/+39
|/ | | | | | | | | | Add integrated MDIO multiplexer driver node which contains two mux PCIe bus and one ethernet bus along with phys lying on these bus. Signed-off-by: Pramod Kumar <pramod.kumar@broadcom.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
* arm64: dts: NS2 secondary core enablement via PSCILuke Starrett2016-04-221-22/+9Star
| | | | | | | | | | Declare PSCI-1.0 node and enable CPU_ON method via PSCI. Spin-table memreserve has been removed as well as syscon based reset, as PSCI-1.0 expects reset implementation in firmware. Signed-off-by: Luke Starrett <luke.starrett@broadcom.com> Acked-by: Scott Branden <scott.branden@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
* arm64: dts: Add ARM PL022 SPI DT nodes for NS2Anup Patel2016-04-131-0/+22
| | | | | | | | | | | | | | | We have two ARM PL022 SPI instances in NS2 SoC. On NS2 SVK, one of the ARM PL022 SPI host has Silabs si3226x slic connected to chip-select #0 whereas second ARM PL022 SPI host has Atmel AT25 EEPROM connected to chip-select #0. This patch adds ARM PL022, Silabs si3226x, and Atmel AT25 DT nodes in NS2 DT and NS2 SVK DT respectively. Signed-off-by: Anup Patel <anup.patel@broadcom.com> Reviewed-by: Ray Jui <rjui@broadcom.com> Reviewed-by: Scott Branden <sbranden@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
* arm64: dts: Move NS2 clock DT nodes to separate DT fileAnup Patel2016-04-131-78/+3Star
| | | | | | | | | | | | | For more readabilty and consistency with other Broadcom SoCs, we move all NS2 clock DT nodes from main SoC DT file to a separate DT file. We also update the license header in ns2.dtsi as-per new Broadcom convention. Signed-off-by: Anup Patel <anup.patel@broadcom.com> Reviewed-by: Ray Jui <rjui@broadcom.com> Reviewed-by: Scott Branden <sbranden@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
* arm64: dts: Add maintenance interrupt for GIC in NS2 DTAnup Patel2016-04-131-0/+2
| | | | | | | | | | | The KVM ARM64 requires GIC maintenance interrupt for VGIC emulation so this patch adds the missing "interrupts" attribute to GIC node in NS2 DT. Signed-off-by: Anup Patel <anup.patel@broadcom.com> Reviewed-by: Ray Jui <rjui@broadcom.com> Reviewed-by: Scott Branden <sbranden@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
* arm64: dts: Add ARM PL330 DMA DT node for NS2Anup Patel2016-04-131-0/+19
| | | | | | | | | | | We have one ARM PL330 DMA instance with 8 channels in NS2 SoC. Let's enable it for NS2 in NS2 DT. Signed-off-by: Anup Patel <anup.patel@broadcom.com> Reviewed-by: Ray Jui <rjui@broadcom.com> Reviewed-by: Pramod KUMAR <pramodku@broadcom.com> Reviewed-by: Scott Branden <sbranden@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
* arm64: dts: Add PCIe0 and PCIe4 DT nodes for NS2Ray Jui2016-02-131-0/+74
| | | | | | | | | | This patch enables PCIe0 and PCIe4 for NS2 by adding appropriate DT nodes in NS2 DT. Signed-off-by: Ray Jui <rjui@broadcom.com> Signed-off-by: Anup Patel <anup.patel@broadcom.com> Reviewed-by: Scott Branden <sbranden@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
* arm64: dts: Add ARM SP805 watchdog DT node for NS2Anup Patel2016-02-131-0/+8
| | | | | | | | | | | We have one ARM SP805 watchdog instance on NS2 for non-secure software hence this patch adds appropriate watchdog DT node in NS2 DT. Signed-off-by: Anup Patel <anup.patel@broadcom.com> Reviewed-by: Ray Jui <rjui@broadcom.com> Reviewed-by: Pramod KUMAR <pramodku@broadcom.com> Reviewed-by: Scott Branden <sbranden@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
* arm64: dts: Add ARM SP804 timer DT nodes for NS2Anup Patel2016-02-131-0/+40
| | | | | | | | | | | We have four ARM SP804 dual-mode timer instances in NS2 SoC hence this patch adds appropriate DT nodes for NS2. Signed-off-by: Anup Patel <anup.patel@broadcom.com> Reviewed-by: Ray Jui <rjui@broadcom.com> Reviewed-by: Pramod KUMAR <pramodku@broadcom.com> Reviewed-by: Scott Branden <sbranden@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
* arm64: dts: Add SDHCI DT node for NS2Anup Patel2016-02-131-0/+18
| | | | | | | | | | The IPROC SDHCI driver works fine for SDIO 3.0 on NS2 so let's enable it for NS2 SoC in NS2 DT. Signed-off-by: Anup Patel <anup.patel@broadcom.com> Reviewed-by: Vikram Prakash <vikramp@broadcom.com> Reviewed-by: Ray Jui <rjui@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
* ARM64: dts: enable clock support for Broadcom NS2Jon Mason2015-11-201-1/+79
| | | | | | | | Add device tree entries for clock support for Broadcom Northstar 2 SoC Signed-off-by: Jon Mason <jonmason@broadcom.com> Reviewed-by: Ray Jui <rjui@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
* arm64: dts: Add BRCM IPROC NAND DT node for NS2Anup Patel2015-11-161-0/+14
| | | | | | | | | | | | | | The NAND controller on NS2 SoC is compatible with existing BRCM IPROC NAND driver so let's enable it in NS2 DT and NS2 SVK DT. This patch also fixes use of node labels in ns2-svk.dts. Signed-off-by: Anup Patel <anup.patel@broadcom.com> Reviewed-by: Ray Jui <rjui@broadcom.com> Reviewed-by: Scott Branden <sbranden@broadcom.com> Reviewed-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
* arm64: dts: Add I2C nodes for NS2Ray Jui2015-11-161-0/+20
| | | | | | | | | | This patch adds iProc I2C DT nodes for NS2 and enable them for the NS2 SVK board Signed-off-by: Ray Jui <rjui@broadcom.com> Reviewed-by: Vikram Prakash <vikramp@broadcom.com> Reviewed-by: Scott Branden <sbranden@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
* arm64: dts: Add IPROC RNG200 DT node for NS2Anup Patel2015-11-161-0/+5
| | | | | | | | | | | | We have IPROC RNG200 hardware random number generation in NS2 SoC, lets enable it for NS2 in NS2 DT. Signed-off-by: Anup Patel <anup.patel@broadcom.com> Reviewed-by: Ray Jui <rjui@broadcom.com> Reviewed-by: Pramod KUMAR <pramodku@broadcom.com> Reviewed-by: Vikram Prakash <vikramp@broadcom.com> Reviewed-by: Scott Branden <sbranden@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
* arm64: dts: Add ARM PMUv3 DT node in NS2 DTAnup Patel2015-11-161-4/+16
| | | | | | | | | | | The NS2 SoC has Cortex-A57 CPUs which support ARM PMUv3 so, lets enable ARM PMUv3 in NS2 DT. Signed-off-by: Anup Patel <anup.patel@broadcom.com> Reviewed-by: Vikram Prakash <vikramp@broadcom.com> Reviewed-by: Ray Jui <rjui@broadcom.com> Reviewed-by: Scott Branden <sbranden@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
* arm64: dts: Add syscon based reboot in DT for NS2Anup Patel2015-11-161-0/+12
| | | | | | | | | | | | | | | | To reset NS2, we simply have to write '0' to BIT[1] at offset 0x90 of CRMU space. The above can be easily achieved by writing 0xfffffffd at offset 0x90 using syscon-reboot driver. We don't need to have separate driver for rebooting NS2. This patch enables syscon-reboot driver for NS2 using DT. Signed-off-by: Anup Patel <anup.patel@broadcom.com> Reviewed-by: Ray Jui <rjui@broadcom.com> Reviewed-by: Scott Branden <sbranden@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
* arm64: dts: Add SMMU DT node for NS2Anup Patel2015-11-161-0/+41
| | | | | | | | | | | | | The SMMU-500 driver is already available in Linux kernel. Let's enable it for NS2 in DT. This patch keeps mmu-masters attribute empty so that driver patches can later extend this attribute when adding device DT nodes. Signed-off-by: Anup Patel <anup.patel@broadcom.com> Reviewed-by: Ray Jui <rjui@broadcom.com> Reviewed-by: Scott Branden <sbranden@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
* arm64: dts: Add L2-cache DT node for NS2Anup Patel2015-11-161-0/+8
| | | | | | | | | | | Recent kernels requires cache hierrachy to be defined via DT hence this patch updates NS2 DT accordingly. Signed-off-by: Anup Patel <anup.patel@broadcom.com> Reviewed-by: Sandeep Tripathy <tripathy@broadcom.com> Reviewed-by: Ray Jui <rjui@broadcom.com> Reviewed-by: Scott Branden <sbranden@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
* arm64: dts: Add Broadcom North Star 2 supportRay Jui2015-07-291-0/+118
Add Broadcom NS2 device tree binding document. Also add initial device tree dtsi for Broadcom North Star 2 (NS2) SoC and board support for NS2 SVK board Signed-off-by: Jon Mason <jonmason@broadcom.com> Signed-off-by: Ray Jui <rjui@broadcom.com> Reviewed-by: Scott Branden <sbranden@broadcom.com> Signed-off-by: Olof Johansson <olof@lixom.net>