summaryrefslogtreecommitdiffstats
path: root/arch/arm64
Commit message (Collapse)AuthorAgeFilesLines
* Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/netLinus Torvalds2015-11-171-7/+41
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull networking fixes from David Miller: 1) Fix list tests in netfilter ingress support, from Florian Westphal. 2) Fix reversal of input and output interfaces in ingress hook invocation, from Pablo Neira Ayuso. 3) We have a use after free in r8169, caught by Dave Jones, fixed by Francois Romieu. 4) Splice use-after-free fix in AF_UNIX frmo Hannes Frederic Sowa. 5) Three ipv6 route handling bug fixes from Martin KaFai Lau: a) Don't create clone routes not managed by the fib6 tree b) Don't forget to check expiration of DST_NOCACHE routes. c) Handle rt->dst.from == NULL properly. 6) Several AF_PACKET fixes wrt transport header setting and SKB protocol setting, from Daniel Borkmann. 7) Fix thunder driver crash on shutdown, from Pavel Fedin. 8) Several Mellanox driver fixes (max MTU calculations, use of correct DMA unmap in TX path, etc.) from Saeed Mahameed, Tariq Toukan, Doron Tsur, Achiad Shochat, Eran Ben Elisha, and Noa Osherovich. 9) Several mv88e6060 DSA driver fixes (wrong bit definitions for certain registers, etc.) from Neil Armstrong. 10) Make sure to disable preemption while updating per-cpu stats of ip tunnels, from Jason A. Donenfeld. 11) Various ARM64 bpf JIT fixes, from Yang Shi. 12) Flush icache properly in ARM JITs, from Daniel Borkmann. 13) Fix masking of RX and TX interrupts in ravb driver, from Masaru Nagai. 14) Fix netdev feature propagation for devices not implementing ->ndo_set_features(). From Nikolay Aleksandrov. 15) Big endian fix in vmxnet3 driver, from Shrikrishna Khare. 16) RAW socket code increments incorrect SNMP counters, fix from Ben Cartwright-Cox. 17) IPv6 multicast SNMP counters are bumped twice, fix from Neil Horman. 18) Fix handling of VLAN headers on stacked devices when REORDER is disabled. From Vlad Yasevich. 19) Fix SKB leaks and use-after-free in ipvlan and macvlan drivers, from Sabrina Dubroca. * git://git.kernel.org/pub/scm/linux/kernel/git/davem/net: (83 commits) MAINTAINERS: Update Mellanox's Eth NIC driver entries net/core: revert "net: fix __netdev_update_features return.." and add comment af_unix: take receive queue lock while appending new skb rtnetlink: fix frame size warning in rtnl_fill_ifinfo net: use skb_clone to avoid alloc_pages failure. packet: Use PAGE_ALIGNED macro packet: Don't check frames_per_block against negative values net: phy: Use interrupts when available in NOLINK state phy: marvell: Add support for 88E1540 PHY arm64: bpf: make BPF prologue and epilogue align with ARM64 AAPCS macvlan: fix leak in macvlan_handle_frame ipvlan: fix use after free of skb ipvlan: fix leak in ipvlan_rcv_frame vlan: Do not put vlan headers back on bridge and macvlan ports vlan: Fix untag operations of stacked vlans with REORDER_HEADER off via-velocity: unconditionally drop frames with bad l2 length ipg: Remove ipg driver dl2k: Add support for IP1000A-based cards snmp: Remove duplicate OUTMCAST stat increment net: thunder: Check for driver data in nicvf_remove() ...
| * arm64: bpf: make BPF prologue and epilogue align with ARM64 AAPCSYang Shi2015-11-171-5/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Save and restore FP/LR in BPF prog prologue and epilogue, save SP to FP in prologue in order to get the correct stack backtrace. However, ARM64 JIT used FP (x29) as eBPF fp register, FP is subjected to change during function call so it may cause the BPF prog stack base address change too. Use x25 to replace FP as BPF stack base register (fp). Since x25 is callee saved register, so it will keep intact during function call. It is initialized in BPF prog prologue when BPF prog is started to run everytime. Save and restore x25/x26 in BPF prologue and epilogue to keep them intact for the outside of BPF. Actually, x26 is unnecessary, but SP requires 16 bytes alignment. So, the BPF stack layout looks like: high original A64_SP => 0:+-----+ BPF prologue |FP/LR| current A64_FP => -16:+-----+ | ... | callee saved registers +-----+ | | x25/x26 BPF fp register => -80:+-----+ | | | ... | BPF prog stack | | | | current A64_SP => +-----+ | | | ... | Function call stack | | +-----+ low CC: Zi Shen Lim <zlim.lnx@gmail.com> CC: Xi Wang <xi.wang@gmail.com> Signed-off-by: Yang Shi <yang.shi@linaro.org> Acked-by: Zi Shen Lim <zlim.lnx@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
| * bpf, arm64: start flushing icache range from headerDaniel Borkmann2015-11-161-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | While recently going over ARM64's BPF code, I noticed that the icache range we're flushing should start at header already and not at ctx.image. Reason is that after b569c1c622c5 ("net: bpf: arm64: address randomize and write protect JIT code"), we also want to make sure to flush the random-sized trap in front of the start of the actual program (analogous to x86). No operational differences from user side. Signed-off-by: Daniel Borkmann <daniel@iogearbox.net> Acked-by: Zi Shen Lim <zlim.lnx@gmail.com> Cc: Alexei Starovoitov <ast@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
| * arm64: bpf: fix JIT frame pointer setupYang Shi2015-11-161-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | BPF fp should point to the top of the BPF prog stack. The original implementation made it point to the bottom incorrectly. Move A64_SP to fp before reserve BPF prog stack space. CC: Zi Shen Lim <zlim.lnx@gmail.com> CC: Xi Wang <xi.wang@gmail.com> Signed-off-by: Yang Shi <yang.shi@linaro.org> Reviewed-by: Zi Shen Lim <zlim.lnx@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | Merge tag 'arm64-fixes' of ↵Linus Torvalds2015-11-1314-33/+54
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux Pull arm64 fixes and clean-ups from Catalin Marinas: "Here's a second pull request for this merging window with some fixes/clean-ups: - __cmpxchg_double*() return type fix to avoid truncation of a long to int and subsequent logical "not" in cmpxchg_double() misinterpreting the operation success/failure - BPF fixes for mod and div by zero - Fix compilation with STRICT_MM_TYPECHECKS enabled - VDSO build fix without libgcov - Some static and __maybe_unused annotations - Kconfig clean-up (FRAME_POINTER) - defconfig update for CRYPTO_CRC32_ARM64" * tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: arm64: suspend: make hw_breakpoint_restore static arm64: mmu: make split_pud and fixup_executable static arm64: smp: make of_parse_and_init_cpus static arm64: use linux/types.h in kvm.h arm64: build vdso without libgcov arm64: mark cpus_have_hwcap as __maybe_unused arm64: remove redundant FRAME_POINTER kconfig option and force to select it arm64: fix R/O permissions of FDT mapping arm64: fix STRICT_MM_TYPECHECKS issue in PTE_CONT manipulation arm64: bpf: fix mod-by-zero case arm64: bpf: fix div-by-zero case arm64: Enable CRYPTO_CRC32_ARM64 in defconfig arm64: cmpxchg_dbl: fix return value type
| * arm64: suspend: make hw_breakpoint_restore staticJisheng Zhang2015-11-121-1/+1
| | | | | | | | | | | | | | | | hw_breakpoint_restore is only used within suspend.c, so it can be declared static. Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
| * arm64: mmu: make split_pud and fixup_executable staticJisheng Zhang2015-11-121-2/+2
| | | | | | | | | | | | | | | | split_pud and fixup_executable are only called from within mmu.c, so they can be declared static. Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
| * arm64: smp: make of_parse_and_init_cpus staticJisheng Zhang2015-11-121-1/+1
| | | | | | | | | | | | | | | | of_parse_and_init_cpus is only called from within smp.c, so it can be declared static. Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
| * arm64: use linux/types.h in kvm.hArnd Bergmann2015-11-121-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | We should always use linux/types.h instead of asm/types.h for consistency, and Kbuild actually warns about it: ./usr/include/asm/kvm.h:35: include of <linux/types.h> is preferred over <asm/types.h> This patch does as Kbuild asks us. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
| * arm64: build vdso without libgcovArnd Bergmann2015-11-121-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On a cross-toolchain without glibc support, libgcov may not be available, and attempting to build an arm64 kernel with GCOV enabled then results in a build error: /home/arnd/cross-gcc/lib/gcc/aarch64-linux/5.2.1/../../../../aarch64-linux/bin/ld: cannot find -lgcov We don't really want to link libgcov into the vdso anyway, so this patch just disables GCOV in the vdso directory, just as we do for most other architectures. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
| * arm64: mark cpus_have_hwcap as __maybe_unusedArnd Bergmann2015-11-121-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | cpus_have_hwcap() is defined as a 'static' function an only used in one place that is inside of an #ifdef, so we get a warning when the only user is disabled: arch/arm64/kernel/cpufeature.c:699:13: warning: 'cpus_have_hwcap' defined but not used [-Wunused-function] This marks the function as __maybe_unused, so the compiler knows that it can drop the function definition without warning about it. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Fixes: 37b01d53ceef ("arm64/HWCAP: Use system wide safe values") Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
| * arm64: remove redundant FRAME_POINTER kconfig option and force to select itYang Shi2015-11-102-4/+1Star
| | | | | | | | | | | | | | | | | | | | | | | | FRAME_POINTER is defined in lib/Kconfig.debug, it is unnecessary to redefine it in arch/arm64/Kconfig.debug. ARM64 depends on frame pointer to get correct stack trace (also selecting ARCH_WANT_FRAME_POINTERS). However, the lib/Kconfig.debug definition allows such option to be disabled. This patch forces FRAME_POINTER always on on arm64. Signed-off-by: Yang Shi <yang.shi@linaro.org> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
| * arm64: fix R/O permissions of FDT mappingArd Biesheuvel2015-11-092-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The mapping permissions of the FDT are set to 'PAGE_KERNEL | PTE_RDONLY' in an attempt to map the FDT as read-only. However, not only does this break at build time under STRICT_MM_TYPECHECKS (since the two terms are of different types in that case), it also results in both the PTE_WRITE and PTE_RDONLY attributes to be set, which means the region is still writable under ARMv8.1 DBM (and an attempted write will simply clear the PT_RDONLY bit). So instead, define PAGE_KERNEL_RO (which already has an established meaning across architectures) and use that instead. Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
| * arm64: fix STRICT_MM_TYPECHECKS issue in PTE_CONT manipulationArd Biesheuvel2015-11-091-1/+1
| | | | | | | | | | | | | | | | | | The new page table code that manipulates the PTE_CONT flags does so in a way that is inconsistent with STRICT_MM_TYPECHECKS. Fix it by using the correct combination of __pgprot() and pgprot_val(). Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
| * arm64: bpf: fix mod-by-zero caseZi Shen Lim2015-11-061-8/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Turns out in the case of modulo by zero in a BPF program: A = A % X; (X == 0) the expected behavior is to terminate with return value 0. The bug in JIT is exposed by a new test case [1]. [1] https://lkml.org/lkml/2015/11/4/499 Signed-off-by: Zi Shen Lim <zlim.lnx@gmail.com> Reported-by: Yang Shi <yang.shi@linaro.org> Reported-by: Xi Wang <xi.wang@gmail.com> CC: Alexei Starovoitov <ast@plumgrid.com> Fixes: e54bcde3d69d ("arm64: eBPF JIT compiler") Cc: <stable@vger.kernel.org> # 3.18+ Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
| * arm64: bpf: fix div-by-zero caseZi Shen Lim2015-11-062-13/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the case of division by zero in a BPF program: A = A / X; (X == 0) the expected behavior is to terminate with return value 0. This is confirmed by the test case introduced in commit 86bf1721b226 ("test_bpf: add tests checking that JIT/interpreter sets A and X to 0."). Reported-by: Yang Shi <yang.shi@linaro.org> Tested-by: Yang Shi <yang.shi@linaro.org> CC: Xi Wang <xi.wang@gmail.com> CC: Alexei Starovoitov <ast@plumgrid.com> CC: linux-arm-kernel@lists.infradead.org CC: linux-kernel@vger.kernel.org Fixes: e54bcde3d69d ("arm64: eBPF JIT compiler") Cc: <stable@vger.kernel.org> # 3.18+ Signed-off-by: Zi Shen Lim <zlim.lnx@gmail.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
| * arm64: Enable CRYPTO_CRC32_ARM64 in defconfigCatalin Marinas2015-11-061-0/+1
| | | | | | | | | | | | | | | | CONFIG_CRYPTO_CRC32_ARM64 has been around since commit f6f203faa3eb ("crypto: crc32 - Add ARM64 CRC32 hw accelerated module") but defconfig did not automatically enable it. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
| * arm64: cmpxchg_dbl: fix return value typeLorenzo Pieralisi2015-11-052-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current arm64 __cmpxchg_double{_mb} implementations carry out the compare exchange by first comparing the old values passed in to the values read from the pointer provided and by stashing the cumulative bitwise difference in a 64-bit register. By comparing the register content against 0, it is possible to detect if the values read differ from the old values passed in, so that the compare exchange detects whether it has to bail out or carry on completing the operation with the exchange. Given the current implementation, to detect the cmpxchg operation status, the __cmpxchg_double{_mb} functions should return the 64-bit stashed bitwise difference so that the caller can detect cmpxchg failure by comparing the return value content against 0. The current implementation declares the return value as an int, which means that the 64-bit value stashing the bitwise difference is truncated before being returned to the __cmpxchg_double{_mb} callers, which means that any bitwise difference present in the top 32 bits goes undetected, triggering false positives and subsequent kernel failures. This patch fixes the issue by declaring the arm64 __cmpxchg_double{_mb} return values as a long, so that the bitwise difference is properly propagated on failure, restoring the expected behaviour. Fixes: e9a4b795652f ("arm64: cmpxchg_dbl: patch in lse instructions when supported by the CPU") Cc: <stable@vger.kernel.org> # 4.3+ Cc: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
* | Merge tag 'armsoc-defconfig' of ↵Linus Torvalds2015-11-111-0/+10
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC defconfig updates from Olof Johansson: "Defconfig updates are kept separate from other branches mostly to avoid conflicts between the different categories (driver branch enabling something that has context conflict with SoC options, etc). A lot of this again is scattered across the various hardware platforms. multi_v7_defconfig, our "generic" config for most 32-bit platforms has been gone through by Marvell Berlin maintainers and added most options they need to run on their hardware. Broadcom NSP is also added there, and the new Atmel SAMA5D2 (added last release). Rockchip also has display and other devices supported in that config. In addition to that, the usual small churn of new options being added here and there" * tag 'armsoc-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (45 commits) ARM: multi_v7_defconfig: enable UniPhier I2C drivers ARM: multi_v7_defconfig: Enable rtl8152 ethernet driver for Odroid-XU4 ARM: exynos_defconfig: Enable rtl8152 ethernet driver for Odroid-XU4 ARM: exynos_defconfig: Enable WiFi-Ex as a module instead built-in ARM: exynos_defconfig: Disable simplefb support ARM: exynos_defconfig: Enable LEDS for Odroid-XU3/XU4 ARM: multi_v7_defconfig: Enable DWC2 USB driver and USB ethernet gadget ARM: exynos_defconfig: Enable DWC2 USB driver and USB ethernet gadget ARM: exynos_defconfig: Enable USB Video Class support ARM: multi_v7_defconfig: improve multi_v7_defconfig support for Berlin ARM: tegra: Update multi_v7_defconfig ARM: multi_v7_defconfig: Add Atmel SDHCI device ARM: multi_v7_defconfig: Add Atmel Flexcom device ARM: multi_v7_defconfig: Add Atmel SAMA5D2 SoC ARM: at91/defconfig: add sama5d2 and its new devices to sama5 defconfig ARM: at91/defconfig: update at91_dt defconfig ARM: at91/defconfig: update sama5 defconfig ARM: configs: Enable FIXED_PHY in multi_v7 defconfig ARM: configs: update lpc18xx defconfig ARM: socfpga_defconfig: enable fpga manager ...
| * | arm64: defconfig: Enable devices for MSM8916Andy Gross2015-10-091-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | This patch enables a number of devices currently supported by the MSM8916 boards. These include I2C, SPI, DMA, SMEM, SMD, and SMD regulator support. Signed-off-by: Andy Gross <agross@codeaurora.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* | | Merge tag 'armsoc-dt' of ↵Linus Torvalds2015-11-1138-190/+2728
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM DT updates from Olof Johansson: "As usual, this is the massive branch we have for each release. Lots of various updates and additions of hardware descriptions on existing hardware, as well as the usual additions of new boards and SoCs. This is also the first release where we've started mixing 64- and 32-bit DT updates in one branch. (Specific details on what's actually here and new is pretty easy to tell from the diffstat, so there's little point in duplicating listing it here)" * tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (499 commits) ARM: dts: uniphier: add system-bus-controller nodes ARM64: juno: disable NOR flash node by default ARM: dts: uniphier: add outer cache controller nodes arm64: defconfig: Enable PCI generic host bridge by default arm64: Juno: Add support for the PCIe host bridge on Juno R1 Documentation: of: Document the bindings used by Juno R1 PCIe host bridge ARM: dts: uniphier: add I2C aliases for ProXstream2 boards dts/Makefile: Add build support for LS2080a QDS & RDB board DTS dts/ls2080a: Add DTS support for LS2080a QDS & RDB boards dts/ls2080a: Update Simulator DTS to add support of various peripherals dts/ls2080a: Remove text about writing to Free Software Foundation dts/ls2080a: Update DTSI to add support of various peripherals doc: DTS: Update DWC3 binding to provide reference to generic bindings doc/bindings: Update GPIO devicetree binding documentation for LS2080A Documentation/dts: Move FSL board-specific bindings out of /powerpc Documentation: DT: Add entry for FSL LS2080A QDS and RDB boards arm64: Rename FSL LS2085A SoC support code to LS2080A arm64: Use generic Layerscape SoC family naming ARM: dts: uniphier: add ProXstream2 Vodka board support ARM: dts: uniphier: add ProXstream2 Gentil board support ...
| * \ \ Merge branch 'next/arm64' into next/dtOlof Johansson2015-11-1010-19/+224
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Merging in the few patches I had kept separate from main next/dt, since others got merged here directly. * next/arm64: arm64: defconfig: Enable PCI generic host bridge by default arm64: Juno: Add support for the PCIe host bridge on Juno R1 Documentation: of: Document the bindings used by Juno R1 PCIe host bridge arm64: dts: mt8173: Add clocks for SCPSYS unit arm64: dts: mt8173: Add subsystem clock controller device nodes + Linux 4.3-rc5
| | * \ \ Merge branch 'for-upstream/juno-pcie' of git://linux-arm.org/linux-ld into ↵Olof Johansson2015-10-272-0/+21
| | |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | next/arm64 * 'for-upstream/juno-pcie' of git://linux-arm.org/linux-ld: arm64: defconfig: Enable PCI generic host bridge by default arm64: Juno: Add support for the PCIe host bridge on Juno R1 Documentation: of: Document the bindings used by Juno R1 PCIe host bridge Signed-off-by: Olof Johansson <olof@lixom.net>
| | | * | | arm64: defconfig: Enable PCI generic host bridge by defaultLiviu Dudau2015-10-261-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that pci-host-generic can be used under arm64, enable it by default so that SBSA compliant systems can use it. Cc: Will Deacon <will.deacon@arm.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
| | | * | | arm64: Juno: Add support for the PCIe host bridge on Juno R1Liviu Dudau2015-10-261-0/+20
| | | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Juno R1 board sports a functional PCIe host bridge that is compliant with the SBSA standard found [1] here. With the right firmware that initialises the XpressRICH3 controller one can use the generic Host Bridge driver to use the PCIe hardware. Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com> Acked-by: Mark Rutland <mark.rutland@arm.com> [1] http://infocenter.arm.com/help/topic/com.arm.doc.den0029a/
| | * | | Merge tag 'samsung-dt64' of ↵Olof Johansson2015-10-262-0/+110
| | |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/arm64 Samsung arm64 DT update for v4.4 - add BUS1 instance pinctrl support on exynos7 SoC * tag 'samsung-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: arm64: dts: Add BUS1 instance pinctrl support for exynos7 Signed-off-by: Olof Johansson <olof@lixom.net>
| | | * | | arm64: dts: Add BUS1 instance pinctrl support for exynos7Alim Akhtar2015-10-082-0/+110
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds BUS1 instance pinctrl for exynos7 soc. Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Kukjin Kim <kgene@kernel.org>
| | * | | | Merge tag 'v4.3-next-arm64' of https://github.com/mbgg/linux-mediatek into ↵Olof Johansson2015-10-232-5/+75
| | |\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | next/arm64 Correct i2c DTS node names in mt8173.dtsi. Add spi DTS node to the mt8173 and mt8173-evb. Add dts nodes for the subsystem clocks on mt8173. This includes mmsys, imgsys, vdecsys, vencsys, vencltsys. Add clock nodes to the scpsys binding, which are needed to access the registers of venc and venc_lt power domains. * tag 'v4.3-next-arm64' of https://github.com/mbgg/linux-mediatek: arm64: dts: mt8173: Add clocks for SCPSYS unit arm64: dts: mt8173: Add subsystem clock controller device nodes arm64: dts: Add spi bus dts arm64: mt8173.dtsi: correct i2c node names Signed-off-by: Olof Johansson <olof@lixom.net>
| | | * | | | arm64: dts: mt8173: Add clocks for SCPSYS unitJames Liao2015-10-141-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add clocks needed by Mediatek VENC and VENC_LT power domianis. These clocks were needed by accessing subsystem's registers, so they need to be enabled before power on these subsystems. Signed-off-by: James Liao <jamesjj.liao@mediatek.com> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
| | | * | | | arm64: dts: mt8173: Add subsystem clock controller device nodesJames Liao2015-10-141-0/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds device nodes providing subsystem clocks on MT8173, includes mmsys, imgsys, vdecsys, vencsys and vencltsys. Signed-off-by: James Liao <jamesjj.liao@mediatek.com> Reviewed-by: Daniel Kurtz <djkurtz@chromium.org> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
| | | * | | | arm64: dts: Add spi bus dtsLeilk Liu2015-09-272-0/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds MT8173 spi bus controllers into device tree. Signed-off-by: Leilk Liu <leilk.liu@mediatek.com> Reviewed-and-Tested-by: Nicolas Boichat <drinkcat@chromium.org> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
| | | * | | | arm64: mt8173.dtsi: correct i2c node namesYingjoe Chen2015-09-271-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Node name in device tree should describe general class of the device. Correct incorrect i2c node names. Signed-off-by: Yingjoe Chen <yingjoe.chen@mediatek.com> Reviewed-by: Daniel Kurtz <djkurtz@chromium.org> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
| * | | | | | ARM64: juno: disable NOR flash node by defaultLinus Walleij2015-10-311-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After discussing on the mailing list it turns out that accessing the flash memory from the kernel can disrupt CPU sleep states and CPU hotplugging, so let's disable this DT node by default. Setups that want to access the flash can modify this entry to enable the flash again. Quoting Sudeep Holla: "the firmware assumes the flash is always in read mode while Linux leaves NOR flash in "read id" mode after initialization." Reported-by: Sudeep Holla <sudeep.holla@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Sudeep Holla <sudeep.holla@arm.com> Cc: Liviu Dudau <Liviu.Dudau@arm.com> Cc: Lorenzo Pieralisi <Lorenzo.Pieralisi@arm.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Leif Lindholm <leif.lindholm@arm.com> Cc: Ryan Harkin <ryan.harkin@linaro.org> Fixes: 5078f77e1443 "ARM64: juno: add NOR flash to device tree" Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Olof Johansson <olof@lixom.net>
| * | | | | | dts/Makefile: Add build support for LS2080a QDS & RDB board DTSBhupesh Sharma2015-10-231-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds build support for LS2080a QDS & RDB board DTS files in the arm64 DTS Makefile. Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * | | | | | dts/ls2080a: Add DTS support for LS2080a QDS & RDB boardsBhupesh Sharma2015-10-232-0/+370
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the LS2080a DTS files for QDS and RDB boards which support the LS2080a SoC. Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * | | | | | dts/ls2080a: Update Simulator DTS to add support of various peripheralsBhupesh Sharma2015-10-231-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch updates the LS2080a simulator DTS to add support of various peripherals which are supported on the simulator platform and explicitly disables those which are yet not supported on the platform. Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * | | | | | dts/ls2080a: Remove text about writing to Free Software FoundationBhupesh Sharma2015-10-232-10/+0Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Checkpatch complains about the text suggesting writing to Free Software Foundation for GPLv2 license copy. This patch removes the same from the .dtsi and .dts Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * | | | | | dts/ls2080a: Update DTSI to add support of various peripheralsBhupesh Sharma2015-10-231-18/+375
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch updates the LS2080a DTSI (DTS Include) file to add support for the following peripherals: - USB 3.0 Host - PMU - CCN-504 - SATA - SPI - PCIe Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com> Signed-off-by: Jaiprakash Singh <b44839@freescale.com> Signed-off-by: Alison Wang <alison.wang@freescale.com> Signed-off-by: Liu Gang <Gang.Liu@freescale.com> Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com> Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * | | | | | arm64: Rename FSL LS2085A SoC support code to LS2080ABhupesh Sharma2015-10-233-9/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Freescale is renaming the LS2085A SoC to LS2080A. This patch addresses the same. Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * | | | | | arm64: Use generic Layerscape SoC family namingBhupesh Sharma2015-10-233-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Freescale will be a spinning-out a set of ARMv8 based SoCs which will be based on a similar overall SoC architecture. So, this patch converts the existing infrastructure in the arm64/dts, arm64/Kconfig and arm64/configs to use the generic convention ARCH_LAYERSCAPE in place of the more specific FSL_LS2085A, to save code duplication later-on. Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * | | | | | Merge tag 'qcom-arm64-for-4.4' of ↵Arnd Bergmann2015-10-153-2/+150
| |\ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://codeaurora.org/quic/kernel/agross-msm into next/dt Pull "Qualcomm ARM64 Updates for v4.4" from Andy Gross: * Add RNG device tree node * Add MSM8x16 serial UART1 node * Enable eMMC on apq8016-sbc board * Fix I2C pinconf sleep state function * Add MSM8916 I2C nodes * Enable I2C busses on LS and HS on APQ8016-sbc * Enable SPI busses on LS and HS on APQ8016-sbc * tag 'qcom-arm64-for-4.4' of git://codeaurora.org/quic/kernel/agross-msm: arm64: dts: apq8016-sbc: enable spi buses on LS and HS arm64: dts: apq8016-sbc: enable i2c buses on LS and HS arm64: dts: qcom: Add msm8916 I2C nodes. arm64: dts: fix i2c pinconf sleep state function arm64: dts: qcom: Enable eMMC on apq8016-sbc board arm64: dts: qcom: Add 8x16 Serial UART1 node arm64: dts: qcom: Add RNG device tree node
| | * | | | | | arm64: dts: apq8016-sbc: enable spi buses on LS and HSSrinivas Kandagatla2015-10-141-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch enables spi buses on low speed and high speed expansion connectors on DB410C Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Andy Gross <agross@codeaurora.org>
| | * | | | | | arm64: dts: apq8016-sbc: enable i2c buses on LS and HSSrinivas Kandagatla2015-10-141-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch enables i2c buses on low speed and high speed expansion connectors on DB410C. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Andy Gross <agross@codeaurora.org>
| | * | | | | | arm64: dts: qcom: Add msm8916 I2C nodes.Srinivas Kandagatla2015-10-142-0/+78
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds missing support for i2c0 and i2c6, this support is required to connect the i2c slaves on LS expansion on DB410c. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Andy Gross <agross@codeaurora.org>
| | * | | | | | arm64: dts: fix i2c pinconf sleep state functionSrinivas Kandagatla2015-10-141-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes the i2c pinctrl sleep state by changing the pinconf function to be in gpio mode rather than i2c. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Andy Gross <agross@codeaurora.org>
| | * | | | | | arm64: dts: qcom: Enable eMMC on apq8016-sbc boardGeorgi Djakov2015-10-141-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable the eMMC on the APQ8016 SBC board (also known as DragonBoard 410c), so that we can use its internal storage. Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org> Signed-off-by: Andy Gross <agross@codeaurora.org>
| | * | | | | | arm64: dts: qcom: Add 8x16 Serial UART1 nodeAndy Gross2015-10-143-1/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the nodes required to support the UART1 node on the MSM8916 and also fixes the sleep pins function for UART2. Signed-off-by: Andy Gross <agross@codeaurora.org>
| | * | | | | | arm64: dts: qcom: Add RNG device tree nodeStanimir Varbanov2015-10-141-0/+7
| | | |_|/ / / | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adds rng device tree node for msm8916 SoCs. Signed-off-by: Stanimir Varbanov <stanimir.varbanov@linaro.org> Signed-off-by: Andy Gross <agross@codeaurora.org>
| * | | | | | Merge tag 'juno-scpi-for-v4.4' of ↵Arnd Bergmann2015-10-153-0/+123
| |\ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into next/dt Merge "SCPI support on ARM64 Juno Development Platform" from Sudeep Holla: 1. SRAM, MHU mailbox and SCPI support 2. CPU topology using cpu-map 3. Clock support for all the cpus 4. Support for SoC sensors * tag 'juno-scpi-for-v4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux: arm64: dts: Add sensor node to Juno dt arm64: dts: add clock support for all the cpus arm64: dts: add CPU topology on Juno arm64: dts: add SRAM, MHU mailbox and SCPI support on Juno
| | * | | | | | arm64: dts: Add sensor node to Juno dtPunit Agrawal2015-10-091-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The SCP firmware on Juno provides access to SoC sensors via the SCPI. Add the sensor nodes to the device tree to enable this support. Signed-off-by: Punit Agrawal <punit.agrawal@arm.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Acked-by: Sudeep Holla <sudeep.holla@arm.com> Acked-by: Liviu Dudau <liviu.dudau@arm.com>
generated by cgit v1.2.3-55-g7522 (git 2.39.0) at 2024-07-18 07:01:57 +0200