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* Merge tag 'omap-for-v3.12/fixes-dt-signed' of ↵Olof Johansson2013-09-189-261/+383
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes From Tony Lindgren, OMAP DT fixes for 3.12-rc1: OMAP device tree changes that are needed to fix regressions and avoid electrical issues on beaglebone black. Via Benoit Cousson <bcousson@baylibre.com>: Fix BBB LDO voltage to avoid HDMI destruction Fix OMAP5 wrong attribute Fix typo in beagle xM strings Fix missing pinmux and regulator for OMAP4 wifi Fix missing pinmux for igep headset * tag 'omap-for-v3.12/fixes-dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: dts: igep00x0: Add pinmux configuration for MCBSP2 ARM: dts: Fix muxing and regulator for wl12xx on the SDIO bus for blaze ARM: dts: Fix muxing and regulator for wl12xx on the SDIO bus for pandaboard ARM: dts: OMAP5: fix ocp2scp DTS data ARM: dts: OMAP5: fix reg property size ARM: dts: am335x-bone*: add DT for BeagleBone Black ARM: dts: omap3-beagle-xm: fix string error in compatible property Signed-off-by: Olof Johansson <olof@lixom.net>
| * ARM: dts: igep00x0: Add pinmux configuration for MCBSP2Enric Balletbo i Serra2013-09-181-0/+14
| | | | | | | | | | | | | | | | | | Add pinmux configuration for MCBSP2 connected to the TDM interface. With this configuration the Headset modules works as expected. Signed-off-by: Enric Balletbo i Serra <eballetbo@gmail.com> Acked-by: Javier Martinez Canillas <javier@dowhile0.org> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
| * ARM: dts: Fix muxing and regulator for wl12xx on the SDIO bus for blazeTony Lindgren2013-09-181-1/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 76787b3b (ARM: OMAP2+: Remove board-4430sdp.c) removed legacy booting in favor of device tree based booting for 4430sdp. That caused the WLAN to stop working as the related .dts entries fell through the cracks. I don't have the "1283 PG 2.21 connectivity device" on my 4430sdp, but the earlier version of this patch was tested by Luciano Coelho. This version has left out the input logic for MMC CLK line compared to the earlier version as that is not bidirectional, and should be safe to do. Cc: Rajendra Nayak <rnayak@ti.com> Cc: Luciano Coelho <luca@coelho.fi> Cc: Ruslan Bilovol <ruslan.bilovol@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
| * ARM: dts: Fix muxing and regulator for wl12xx on the SDIO bus for pandaboardTony Lindgren2013-09-181-1/+45
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit b42b9181 (ARM: OMAP2+: Remove board-omap4panda.c) removed legacy booting in favor of device tree based booting for pandaboard. That caused the WLAN to stop working as the related .dts entries fell through the cracks. The legacy muxing was setting pulls for GPIO 48 and 49, so let's keep that behaviour for now to avoid further regressions for BT and FM. Also input logic was enabled for MMC CLK line, but I've verified that the input logic we don't need enabled for CLK line as it's not bidirectional. Also, we want to use non-removable instead of ti,non-removable as the ti,non-removable also sets no_regulator_off_init which is really not what we want as then wl12xx won't get powered up and down which is needed for resetting it. Note that looks like the WLAN interface fails to come up after a warm reset, but that most likely was also happening with the legacy booting and needs a separate fix. Cc: Paolo Pisati <p.pisati@gmail.com> Cc: Rajendra Nayak <rnayak@ti.com> Cc: Luciano Coelho <luca@coelho.fi> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
| * ARM: dts: OMAP5: fix ocp2scp DTS dataFelipe Balbi2013-09-171-1/+2
| | | | | | | | | | | | | | | | | | Fix the DTS data for ocp2scp node by adding the missing reg property. Signed-off-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
| * ARM: dts: OMAP5: fix reg property sizeFelipe Balbi2013-09-171-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | USB3 block has a 64KiB space, another 64KiB is used for the wrapper. Without this change, resource_size() will get confused and driver won't probe because size will be negative. Signed-off-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
| * ARM: dts: am335x-bone*: add DT for BeagleBone BlackKoen Kooi2013-09-174-255/+281
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The BeagleBone Black is basically a regular BeagleBone with eMMC and HDMI added, so create a common dtsi both can use. IMPORTANT: booting the existing am335x-bone.dts will blow up the HDMI transceiver after a dozen boots with an uSD card inserted because LDO will be at 3.3V instead of 1.8. MMC support for AM335x still isn't in, so only the LDO change has been added. Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> Tested-by: Tom Rini <trini@ti.com> Tested-by: Matt Porter <matt.porter@linaro.org> Acked-by: Kevin Hilman <khilman@linaro.org> Tested-by: Kevin Hilman <khilman@linaro.org> Tested-by: Joel Fernandes <joelf@ti.com> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
| * ARM: dts: omap3-beagle-xm: fix string error in compatible propertyRobert Nelson2013-09-171-1/+1
| | | | | | | | | | | | | | | | The beagle and beagle-xm entries were inside the same double quote. Split them to have two distinct entries. Signed-off-by: Robert Nelson <robertcnelson@gmail.com> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
* | Merge tag 'omap-for-v3.12/fixes-signed' of ↵Olof Johansson2013-09-186-7/+7
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes From Tony Lindgren, fixes for 3.12-rc1: OMAP fixes for build warnings and cpuidle, and a few trivial typo fixes. * tag 'omap-for-v3.12/fixes-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: OMAP2+: mux: fix trivial typo in name ARM: OMAP4 SMP: Corrected a typo fucntions to functions ARM: OMAP4: cpuidle: fix: call cpu_cluster_pm_exit conditionally mailbox: remove unnecessary platform_set_drvdata() ARM: mach-omap2: gpmc: Fix warning when CONFIG_ARM_LPAE=y ARM: OMAP: fix return value check in omap_device_build_from_dt() ARM: OMAP4: Fix clock_get error for GPMC during boot Signed-off-by: Olof Johansson <olof@lixom.net>
| * | ARM: OMAP2+: mux: fix trivial typo in namePhil Carmody2013-09-181-1/+1
| | | | | | | | | | | | | | | | | | | | | Fix trivial typo in name. Signed-off-by: Phil Carmody <phil.carmody@partner.samsung.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | ARM: OMAP4 SMP: Corrected a typo fucntions to functionsAnoop Thomas Mathew2013-09-181-1/+1
| | | | | | | | | | | | | | | | | | | | | Corrected the functions spelling mistake in the OMAP4 SMP source file. Signed-off-by: Anoop Thomas Mathew <atm@profoundis.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | ARM: OMAP4: cpuidle: fix: call cpu_cluster_pm_exit conditionallyVladimir Murzin2013-09-181-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We call cpu_cluster_pm_enter for dev->cpu == 0 only, but cpu_cluster_pm_exit called without that check. Because of that unhandled page fault may happen: [ 3.803405] Unable to handle kernel paging request at virtual address 00002500 [ 3.810974] pgd = c0004000 [ 3.813812] [00002500] *pgd=00000000 [ 3.817596] Internal error: Oops: 5 [#1] SMP ARM [ 3.822418] Modules linked in: [ 3.825653] CPU: 1 PID: 0 Comm: swapper/1 Not tainted 3.11.0-rc6+ #21 [ 3.832397] task: ed86ef40 ti: ed896000 task.ti: ed896000 [ 3.838073] PC is at irq_notifier+0x234/0x25c [ 3.842651] LR is at irq_notifier+0x218/0x25c [ 3.847229] pc : [<c0029ed8>] lr : [<c0029ebc>] psr: 80000193 [ 3.847229] sp : ed897ee8 ip : 00000005 fp : 00000001 [ 3.859283] r10: c0b395f0 r9 : c0b30594 r8 : c0b8c2ac [ 3.864776] r7 : ffffffff r6 : 00000000 r5 : 00000005 r4 : 00000000 [ 3.871643] r3 : 00002500 r2 : 00000000 r1 : 00000005 r0 : 44302244 [ 3.878479] Flags: Nzcv IRQs off FIQs on Mode SVC_32 ISA ARM Segment kernel [ 3.886260] Control: 10c5387d Table: 8000404a DAC: 00000015 [ 3.892272] Process swapper/1 (pid: 0, stack limit = 0xed896240) [ 3.898590] Stack: (0xed897ee8 to 0xed898000) [ 3.903167] 7ee0: c0979c3a 00000001 ed897ef8 ed896000 c0014f7c 00000000 [ 3.911743] 7f00: 00000005 00000000 ffffffff c0b8c2ac c0b395f0 c077c04c c0c94b48 c0b3953c [ 3.920318] 7f20: c0bcd928 00000002 c0b39524 c00cfad8 00000000 ffffffff 00000000 c00cfb10 [ 3.928924] 7f40: c14e62c0 c002c1c8 c002c0ac c14e62c0 00000002 e251c37d 00000000 c0b39548 [ 3.937499] 7f60: c0b395f0 c05a1bc4 e251c37d 00000000 00000005 c05a3870 edc90380 edc90380 [ 3.946105] 7f80: edc90394 c14e62c0 c0b39548 00000002 c0784064 c05a3c78 c0b395e0 c14e62c0 [ 3.954681] 7fa0: 00000002 c0b39548 c0bc9db8 00000000 00000001 c05a1dc0 ed896000 00000015 [ 3.963287] 7fc0: c0bc9db8 ed896000 8000406a c0b30594 c0784064 c000e504 00000746 c007a528 [ 3.971862] 7fe0: 00000001 0000001d 600001d3 c0bcc004 00000000 800086c4 ee0aa6a7 d2aabaa9 [ 3.980499] [<c0029ed8>] (irq_notifier+0x234/0x25c) from [<c077c04c>] (notifier_call_chain+0x38/0x68) [ 3.990173] [<c077c04c>] (notifier_call_chain+0x38/0x68) from [<c00cfad8>] (cpu_pm_notify+0x20/0x38) [ 3.999786] [<c00cfad8>] (cpu_pm_notify+0x20/0x38) from [<c00cfb10>] (cpu_cluster_pm_exit+0x20/0x50) [ 4.009399] [<c00cfb10>] (cpu_cluster_pm_exit+0x20/0x50) from [<c002c1c8>] (omap_enter_idle_coupled+0x11c/0x14c) [ 4.020111] [<c002c1c8>] (omap_enter_idle_coupled+0x11c/0x14c) from [<c05a1bc4>] (cpuidle_enter_state+0x40/0xec) [ 4.030822] [<c05a1bc4>] (cpuidle_enter_state+0x40/0xec) from [<c05a3c78>] (cpuidle_enter_state_coupled+0x1f4/0x240) [ 4.041870] [<c05a3c78>] (cpuidle_enter_state_coupled+0x1f4/0x240) from [<c05a1dc0>] (cpuidle_idle_call+0x150/0x228) [ 4.052947] [<c05a1dc0>] (cpuidle_idle_call+0x150/0x228) from [<c000e504>] (arch_cpu_idle+0x8/0x38) [ 4.062499] [<c000e504>] (arch_cpu_idle+0x8/0x38) from [<c007a528>] (cpu_startup_entry+0x178/0x1e4) [ 4.071990] [<c007a528>] (cpu_startup_entry+0x178/0x1e4) from [<800086c4>] (0x800086c4) [ 4.080383] Code: e5922288 03a03b0a 13a03c25 e0823003 (e5932000) [ 4.086791] ---[ end trace d83954a84a6fa69e ]--- It is supposed that sar_base is initialized in irq_save_context, which is called on CPU_CLUSTER_PM_ENTER notification. If this notification has been missed and CPU_CLUSTER_PM_EXIT is received sar_base is NULL. Fix it by calling CPU_CLUSTER_PM_{ENTER,EXIT} under the same condition. Signed-off-by: Vladimir Murzin <murzin.v@gmail.com> Acked-by: Kevin Hilman <khilman@linaro.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | ARM: mach-omap2: gpmc: Fix warning when CONFIG_ARM_LPAE=yFabio Estevam2013-09-181-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When CONFIG_ARM_LPAE=y the following build warning is generated: arch/arm/mach-omap2/gpmc.c:1495:4: warning: format '%x' expects argument of type 'unsigned int', but argument 4 has type 'resource_size_t' [-Wformat] According to Documentation/printk-formats.txt '%pa' can be used to properly print 'resource_size_t'. Reported-by: Kevin Hilman <khilman@linaro.org> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Kevin Hilman <khilman@linaro.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | ARM: OMAP: fix return value check in omap_device_build_from_dt()Wei Yongjun2013-09-181-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In case of error, the function omap_device_alloc() returns ERR_PTR() and never returns NULL. The NULL test in the return value check should be replaced with IS_ERR(). Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Acked-by: Kevin Hilman <khilman@linaro.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | ARM: OMAP4: Fix clock_get error for GPMC during bootTony Lindgren2013-09-181-1/+1
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | Looks like we still have the legacy clock alias name for omap4 GPMC (General Purpose Memory Controller), so let's fix it for the device tree naming. There's no need to keep the legacy naming as omap4 is DT only nowadays. Without this fix we get the following error while booting: [ 0.440399] omap-gpmc 50000000.gpmc: error: clk_get Reported-by: Olof Johansson <olof@lixom.net> Cc: stable@vger.kernel.org # v3.11 Signed-off-by: Tony Lindgren <tony@atomide.com>
* | ARM: multi_v7: add HREFv60 to multi_v7 defconfigLinus Walleij2013-09-181-0/+1
| | | | | | | | | | | | | | | | This is just a standard board for the Ux500, include it in the v7 multiplatform defconfig. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Olof Johansson <olof@lixom.net>
* | ARM: sa1100: collie.c: fall back to jedec_probe flash detectionAndrea Adami2013-09-181-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Zaurus collie contains 2 LH28F640BFHE-PTTL90 (64M 4Mx16) and at the moment cfi will not detect the collie NOR. In the meanwhile we can revert to the jedec-probe map which has been fixed with following commit: mtd: jedec_probe: fix LH28F640BF definition fe2f4c8e0bf2756b670ee78fa9772613a2ea8495 Somehow this is unsatisfactory because the flash is mounted READ ONLY (as from factory, with a RO cramfs) Signed-off-by: Andrea Adami <andrea.adami@gmail.com> Signed-off-by: Olof Johansson <olof@lixom.net>
* | ARM: u300: hide submenusLinus Walleij2013-09-181-5/+5
| | | | | | | | | | | | | | | | | | | | Right now the U300 submenus are showcased for everyone even if we're not on v5 multiplatforms. Hide this in the multiplatform configuration properly. Cc: arm@kernel.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Olof Johansson <olof@lixom.net>
* | Merge tag 'imx-fixes-3.12' of git://git.linaro.org/people/shawnguo/linux-2.6 ↵Olof Johansson2013-09-176-7/+19
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into fixes From Shawn Guo, imx fixes for 3.12: * A couple of clock driver and device tree fixes * A bug fix for clk-fixup-mux to get imx6sl back to boot * A L2 cache setting fix for imx6q * One pinctrl macro fix for UART2 DTE entries * tag 'imx-fixes-3.12' of git://git.linaro.org/people/shawnguo/linux-2.6: ARM: dts: imx6q: fix the wrong offset of the Pad Mux register ARM: imx: i.mx6d/q: disable the double linefill feature of PL310 ARM: imx51.dtsi: fix PATA device clock ARM: mach-imx: clk-imx51-imx53: Fix 'spdif1_pred' clock registration ARM: imx: initialize clk_init_data.flags for clk-fixup-mux ARM: imx27.dtsi: fix CSPI PER clock id Signed-off-by: Olof Johansson <olof@lixom.net>
| * | ARM: dts: imx6q: fix the wrong offset of the Pad Mux registerHuang Shijie2013-09-171-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The patch "0b7a76a ARM: dts: imx6q{dl}: add DTE pads for uart" adds the DTE pads for uart. For PAD_EIM_D29, the offset of the Pad Mux register should be 0x0c8, not 0x0c4. This patch fixes it. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * | ARM: imx: i.mx6d/q: disable the double linefill feature of PL310Jason Liu2013-09-171-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The L2 cache controller(PL310) version on the i.MX6D/Q is r3p1-50rel0 The L2 cache controller(PL310) version on the i.MX6DL/SOLO/SL is r3p2 But according to ARM PL310 errata: 752271 ID: 752271: Double linefill feature can cause data corruption Fault Status: Present in: r3p0, r3p1, r3p1-50rel0. Fixed in r3p2 Workaround: The only workaround to this erratum is to disable the double linefill feature. This is the default behavior. without this patch, you will meet the following error when run the memtester application at: http://pyropus.ca/software/memtester/ FAILURE: 0x00100000 != 0x00200000 at offset 0x01365664. FAILURE: 0x00100000 != 0x00200000 at offset 0x01365668. FAILURE: 0x00100000 != 0x00200000 at offset 0x0136566c. FAILURE: 0x00100000 != 0x00200000 at offset 0x01365670. FAILURE: 0x00100000 != 0x00200000 at offset 0x01365674. FAILURE: 0x00100000 != 0x00200000 at offset 0x01365678. Signed-off-by: Jason Liu <r64343@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * | ARM: imx51.dtsi: fix PATA device clockArnaud Patard (Rtp)2013-09-171-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 718a350 (ARM: i.MX51: Add PATA support) adds pata support to the imx51.dtsi file and is using clock 161. The problem is that the right clock is 172, according to commit 5d530bb (ARM: i.MX5: Add PATA and SRTC clocks). Using the clock 172 makes things work again (and kills a nasty system freeze). Tested-by: Steev Klimaszewski <steev@gentoo.org> Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * | ARM: mach-imx: clk-imx51-imx53: Fix 'spdif1_pred' clock registrationFabio Estevam2013-09-171-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since commit beb2d1c1ba (ARM i.MX5: Add S/PDIF clocks), the following clock error appears on mx51: TrustZone Interrupt Controller (TZIC) initialized i.MX51 clk 180: register failed with -17 i.MX5 clk 180: register failed with -17 sched_clock: 32 bits at 24MHz, resolution 41ns, wraps every 178956ms CPU identified as i.MX51, silicon rev 3.0 ... Clock 180 corresponds to 'spdif1_podf' and this clock is getting registered twice. Fix it, by properly registering the 'spdif1_pred' clock, which should not reference 'spdif1_podf'. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * | ARM: imx: initialize clk_init_data.flags for clk-fixup-muxShawn Guo2013-09-171-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The clk_init_data.flags of clk-fixup-mux is left there without initialization. It may hold some random data and cause clock framework interpret the clock in an unexpected way. At least on imx6sl, the following division by zero error with sched_clock is seen because of it. Division by zero in kernel. CPU: 0 PID: 0 Comm: swapper/0 Not tainted 3.11.0-rc3+ #19 Backtrace: [<80011af0>] (dump_backtrace+0x0/0x10c) from [<80011c90>] (show_stack+0x18/0x1c) r6:3b9aca00 r5:00000020 r4:00000000 r3:00000000 [<80011c78>] (show_stack+0x0/0x1c) from [<8055e02c>] (dump_stack+0x78/0x94) [<8055dfb4>] (dump_stack+0x0/0x94) from [<80011924>] (__div0+0x18/0x20) r4:00000000 r3:00000000 [<8001190c>] (__div0+0x0/0x20) from [<8026c408>] (Ldiv0_64+0x8/0x18) [<8006330c>] (clocks_calc_mult_shift+0x0/0xf8) from [<8072f604>] (setup_sched_clock+0x88/0x1f0) [<8072f57c>] (setup_sched_clock+0x0/0x1f0) from [<8071ad48>] (mxc_timer_init+0xe8/0x17c) [<8071ac60>] (mxc_timer_init+0x0/0x17c) from [<807290b0>] (imx6sl_clocks_init+0x1db8/0x1dc0) r8:807a9ca4 r7:00000000 r6:80777564 r5:8100c1f4 r4:c0820000 [<807272f8>] (imx6sl_clocks_init+0x0/0x1dc0) from [<807420ac>] (of_clk_init+0x40/0x6c) [<8074206c>] (of_clk_init+0x0/0x6c) from [<807290cc>] (imx6sl_timer_init+0x14/0x18) r5:807a8e80 r4:ffffffff [<807290b8>] (imx6sl_timer_init+0x0/0x18) from [<80716e1c>] (time_init+0x24/0x34) [<80716df8>] (time_init+0x0/0x34) from [<80713738>] (start_kernel+0x1b0/0x310) [<80713588>] (start_kernel+0x0/0x310) from [<80008074>] (0x80008074) r7:80770b08 r6:80754cd4 r5:8076c8c4 r4:10c53c7d sched_clock: 32 bits at 0 Hz, resolution 0ns, wraps every 0ms Fix the bug by initializing init.flags as zero. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * | ARM: imx27.dtsi: fix CSPI PER clock idGwenhael Goavec-Merou2013-09-171-3/+3
| |/ | | | | | | | | | | | | | | CSPI PER clock is per2clk (per2_gate id 60) instead of cspiX_ipg_gate. Signed-off-by: Gwenhael Goavec-Merou <gwenhael.goavec-merou@armadeus.com> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* | ARM: multi_v7_defconfig: enable ARM_ATAG_DTB_COMPATOlof Johansson2013-09-171-0/+1
| | | | | | | | | | | | | | | | | | | | Without this, legacy platforms that can boot with a multiplatform kernel but that need the DTB to be appended, won't have a way to pass firmware-set bootargs to the kernel. This is needed to boot multi_v7_defconfig on snowball, for instance. Signed-off-by: Olof Johansson <olof@lixom.net>
* | ARM: ux500: disable outer cache debugLinus Walleij2013-09-171-0/+1
|/ | | | | | | | | | | | | | | | This fixes a multiplatform regression on the Ux500. When compiling the Ux500 platforms in multiplatform configurations both PL310_ERRATA_588369 and PL310_ERRATA_727915 would crash the platform when trying to launch the init process. The Ux500 cannot access the debug registers of the PL310, it will just crash if you try this. So disable this by setting the debug callback to NULL when initializing the l2x0 on this platform. Cc: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Olof Johansson <olof@lixom.net>
* Merge branch 'timers/core' of ↵Linus Torvalds2013-09-162-3/+4
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull timer code update from Thomas Gleixner: - armada SoC clocksource overhaul with a trivial merge conflict - Minor improvements to various SoC clocksource drivers * 'timers/core' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: clocksource: armada-370-xp: Add detailed clock requirements in devicetree binding clocksource: armada-370-xp: Get reference fixed-clock by name clocksource: armada-370-xp: Replace WARN_ON with BUG_ON clocksource: armada-370-xp: Fix device-tree binding clocksource: armada-370-xp: Introduce new compatibles clocksource: armada-370-xp: Use CLOCKSOURCE_OF_DECLARE clocksource: armada-370-xp: Simplify TIMER_CTRL register access clocksource: armada-370-xp: Use BIT() ARM: timer-sp: Set dynamic irq affinity ARM: nomadik: add dynamic irq flag to the timer clocksource: sh_cmt: 32-bit control register support clocksource: em_sti: Convert to devm_* managed helpers
| * clocksource: armada-370-xp: Use CLOCKSOURCE_OF_DECLAREEzequiel Garcia2013-09-021-2/+2
| | | | | | | | | | | | | | | | | | | | This is almost cosmetic: we achieve a bit of consistency with other clocksource drivers by using the CLOCKSOURCE_OF_DECLARE macro for the boilerplate code. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Andrew Lunn <andrew@lunn.ch>
| * ARM: timer-sp: Set dynamic irq affinityViresh Kumar2013-08-221-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When a cpu goes to a deep idle state where its local timer is shutdown, it notifies the time frame work to use the broadcast timer instead. Unfortunately, the broadcast device could wake up any CPU, including an idle one which is not concerned by the wake up at all. This implies, in the worst case, an idle CPU will wake up to send an IPI to another idle cpu. This patch fixes this for ARM platforms using timer-sp, by setting CLOCK_EVT_FEAT_DYNIRQ feature. Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
* | Remove GENERIC_HARDIRQ config optionMartin Schwidefsky2013-09-131-1/+0Star
| | | | | | | | | | | | | | | | After the last architecture switched to generic hard irqs the config options HAVE_GENERIC_HARDIRQS & GENERIC_HARDIRQS and the related code for !CONFIG_GENERIC_HARDIRQS can be removed. Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
* | Merge branch 'akpm' (patches from Andrew Morton)Linus Torvalds2013-09-131-10/+13
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Merge more patches from Andrew Morton: "The rest of MM. Plus one misc cleanup" * emailed patches from Andrew Morton <akpm@linux-foundation.org>: (35 commits) mm/Kconfig: add MMU dependency for MIGRATION. kernel: replace strict_strto*() with kstrto*() mm, thp: count thp_fault_fallback anytime thp fault fails thp: consolidate code between handle_mm_fault() and do_huge_pmd_anonymous_page() thp: do_huge_pmd_anonymous_page() cleanup thp: move maybe_pmd_mkwrite() out of mk_huge_pmd() mm: cleanup add_to_page_cache_locked() thp: account anon transparent huge pages into NR_ANON_PAGES truncate: drop 'oldsize' truncate_pagecache() parameter mm: make lru_add_drain_all() selective memcg: document cgroup dirty/writeback memory statistics memcg: add per cgroup writeback pages accounting memcg: check for proper lock held in mem_cgroup_update_page_stat memcg: remove MEMCG_NR_FILE_MAPPED memcg: reduce function dereference memcg: avoid overflow caused by PAGE_ALIGN memcg: rename RESOURCE_MAX to RES_COUNTER_MAX memcg: correct RESOURCE_MAX to ULLONG_MAX mm: memcg: do not trap chargers with full callstack on OOM mm: memcg: rework and document OOM waiting and wakeup ...
| * | arch: mm: pass userspace fault flag to generic fault handlerJohannes Weiner2013-09-131-3/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Unlike global OOM handling, memory cgroup code will invoke the OOM killer in any OOM situation because it has no way of telling faults occuring in kernel context - which could be handled more gracefully - from user-triggered faults. Pass a flag that identifies faults originating in user space from the architecture-specific fault handlers to generic code so that memcg OOM handling can be improved. Signed-off-by: Johannes Weiner <hannes@cmpxchg.org> Reviewed-by: Michal Hocko <mhocko@suse.cz> Cc: David Rientjes <rientjes@google.com> Cc: KAMEZAWA Hiroyuki <kamezawa.hiroyu@jp.fujitsu.com> Cc: azurIt <azurit@pobox.sk> Cc: KOSAKI Motohiro <kosaki.motohiro@jp.fujitsu.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
| * | arch: mm: do not invoke OOM killer on kernel fault OOMJohannes Weiner2013-09-131-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Kernel faults are expected to handle OOM conditions gracefully (gup, uaccess etc.), so they should never invoke the OOM killer. Reserve this for faults triggered in user context when it is the only option. Most architectures already do this, fix up the remaining few. Signed-off-by: Johannes Weiner <hannes@cmpxchg.org> Reviewed-by: Michal Hocko <mhocko@suse.cz> Acked-by: KOSAKI Motohiro <kosaki.motohiro@jp.fujitsu.com> Cc: David Rientjes <rientjes@google.com> Cc: KAMEZAWA Hiroyuki <kamezawa.hiroyu@jp.fujitsu.com> Cc: azurIt <azurit@pobox.sk> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* | | Merge tag 'fixes-for-linus' of ↵Linus Torvalds2013-09-1210-24/+107
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC fixes from Olof Johansson: "A small batch of fixes that have trickled in over the last week of the merge window. Also included are few small devicetree updates for sunxi, since it enables me to use one of their newer boards (cubieboard2) for additional test coverage. The support for that SoC is new for 3.12, so there's no exposure to new regressions due to it" * tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: ARM: dts: sun7i: olinuxino-micro: Enable the EMAC ARM: dts: sun7i: cubieboard2: Enable the EMAC ARM: dts: sun7i: Add the muxing options for the EMAC ARM: dts: sun7i: Enable the Ethernet in the A20 i2c: davinci: Fix bad dev_get_platdata() conversion ARM: vexpress: allow dcscb and tc2_pm in a combined ARMv6+v7 build ARM: shmobile: lager: Do not use register_type field of struct sh_eth_plat_data ARM: pxa: ssp: Check return values from phandle lookups ARM: PCI: versatile: Fix SMAP register offsets ARM: PCI: versatile: Fix PCI I/O ARM: PCI: versatile: Fix map_irq function to match hardware ARM: ep93xx: Don't use modem interface on the second UART ARM: shmobile: r8a7779: Update early timer initialisation order
| * | | ARM: dts: sun7i: olinuxino-micro: Enable the EMACMaxime Ripard2013-09-121-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The A20-olinuxino-micro has the EMAC wired in. Enable it in the DT so that we can use it. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Olof Johansson <olof@lixom.net>
| * | | ARM: dts: sun7i: cubieboard2: Enable the EMACMaxime Ripard2013-09-121-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Cubieboard2, just like its A10 counterpart, has the Ethernet wired in. Enable it in the DT. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Olof Johansson <olof@lixom.net>
| * | | ARM: dts: sun7i: Add the muxing options for the EMACMaxime Ripard2013-09-121-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The A20 has several muxing options for the EMAC. Yet, the currently supported boards only use one set of them. Add that pin set to the DTSI. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Olof Johansson <olof@lixom.net>
| * | | ARM: dts: sun7i: Enable the Ethernet in the A20Maxime Ripard2013-09-121-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Allwinner A20 SoC also have the EMAC found on the A10 and A10s. Enable the support for it in the DTSI. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Olof Johansson <olof@lixom.net>
| * | | Merge tag 'ep93xx-fixes-for-3.12' of ↵Olof Johansson2013-09-111-1/+1
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://github.com/RyanMallon/linux-ep93xx into fixes From Ryan Mallon, a fix for ep93xx. * tag 'ep93xx-fixes-for-3.12' of git://github.com/RyanMallon/linux-ep93xx: ARM: ep93xx: Don't use modem interface on the second UART Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | | ARM: ep93xx: Don't use modem interface on the second UARTPetr Štetiar2013-09-031-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Second UART doesn't have modem interface, so any attempt to use set_mctrl() it produce unwanted garbage on the line. There's no such 0x100 register offset for the second UART either. Signed-off-by: Petr Štetiar <ynezz@true.cz> Cc: Hartley Sweeten <hsweeten@visionengravers.com> Signed-off-by: Ryan Mallon <rmallon@gmail.com>
| * | | | ARM: vexpress: allow dcscb and tc2_pm in a combined ARMv6+v7 buildNicolas Pitre2013-09-101-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This fixes the following build error: /tmp/cce439dZ.s: Assembler messages: /tmp/cce439dZ.s:506: Error: selected processor does not support ARM mode `isb ' /tmp/cce439dZ.s:512: Error: selected processor does not support ARM mode `isb ' /tmp/cce439dZ.s:513: Error: selected processor does not support ARM mode `dsb ' /tmp/cce439dZ.s:583: Error: selected processor does not support ARM mode `isb ' /tmp/cce439dZ.s:589: Error: selected processor does not support ARM mode `isb ' /tmp/cce439dZ.s:590: Error: selected processor does not support ARM mode `dsb ' Tested-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Nicolas Pitre <nico@linaro.org> Tested-by: Kevin Hilman <khilman@linaro.org> Signed-off-by: Olof Johansson <olof@lixom.net>
| * | | | Merge branch 'versatile/fixes' into fixesOlof Johansson2013-09-102-17/+32
| |\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | From Peter Maydell: These patches fix a number of issues with the PCI controller code for mach-versatile: (1) The irq mapping matched neither hardware nor QEMU; we correct it to match the hardware, which means it will also work on recent (1.5 or later) QEMU. (2) The code was confused between the PCI I/O window (at 0x43000000) and the first PCI memory window (at 0x44000000), which meant that PCI devices using PCI PIO rather than MMIO didn't work. This is fixed (and some variables/labels are renamed to avoid further confusion in future). (3) The SMAP register offsets were all off-by-four, though by fluke this didn't actually have any ill effects. All these changes have been tested on real hardware (PB926 plus the PCI backplane), as well as on QEMU. I have confirmed that IRQs and PCI PIO and MMIO work OK. PCI bus-master DMA doesn't seem to work on h/w -- as far as I can tell the device is correctly managing to DMA to the right places in memory, but every other 32 bit word is corrupt (at least judging from rtl8139 debug dumps of the frames it's receiving). I'm not sure what's going on here, but since this is disjoint from the irq and I/O issues I don't think that applying the patches that fix those should be stalled on trying to debug DMA problems. (DMA works fine on QEMU, incidentally.) * versatile/fixes: ARM: PCI: versatile: Fix SMAP register offsets ARM: PCI: versatile: Fix PCI I/O ARM: PCI: versatile: Fix map_irq function to match hardware Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | | | ARM: PCI: versatile: Fix SMAP register offsetsPeter Maydell2013-09-041-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The SMAP register offsets in the versatile PCI controller code were all off by four. (This didn't have any observable bad effects because on this board PHYS_OFFSET is zero, and (a) writing zero to the flags register at offset 0x10 has no effect and (b) the reset value of the SMAP register is zero anyway, so failing to write SMAP2 didn't matter.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Cc: stable@vger.kernel.org Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Kevin Hilman <khilman@linaro.org>
| | * | | | ARM: PCI: versatile: Fix PCI I/OPeter Maydell2013-09-042-8/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The versatile PCI controller code was confused between the PCI I/O window (at 0x43000000) and the first PCI memory window (at 0x44000000). Pass the correct base address to pci_remap_io() so that PCI I/O accesses work. Since the first PCI memory window isn't used at all (it's an odd size), rename the associated variables and labels so that it's clear that it isn't related to the I/O window. This has been tested and confirmed to fix PCI I/O accesses both on physical PB926+PCI backplane hardware and on QEMU. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Cc: stable@vger.kernel.org Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Kevin Hilman <khilman@linaro.org>
| | * | | | ARM: PCI: versatile: Fix map_irq function to match hardwarePeter Maydell2013-09-041-6/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PCI controller code for the Versatile board has never had the correct IRQ mapping for hardware. For many years it had an odd mapping ("all interrupts are int 27") which aligned with the equivalent bug in QEMU. However as of commit 1bc39ac5dab265 the mapping changed and no longer matched either hardware or QEMU, with the result that any PCI card beyond the first in QEMU would not have functioning interrupts; for example a boot with a SCSI controller would time out as follows: ------------ sym0: <895a> rev 0x0 at pci 0000:00:0d.0 irq 92 sym0: SCSI BUS has been reset. scsi0 : sym-2.2.3 [...] scsi 0:0:0:0: ABORT operation started scsi 0:0:0:0: ABORT operation timed-out. scsi 0:0:0:0: DEVICE RESET operation started scsi 0:0:0:0: DEVICE RESET operation timed-out. scsi 0:0:0:0: BUS RESET operation started scsi 0:0:0:0: BUS RESET operation timed-out. scsi 0:0:0:0: HOST RESET operation started sym0: SCSI BUS has been reset ------------ Fix the mapping so that it matches real hardware (checked against the schematics for PB926 and backplane, and tested against the hardware). This allows PCI cards using interrupts to work on hardware for the first time; this change will also work with QEMU 1.5 or later, where the equivalent bugs in the modelling of the hardware have been fixed. Although QEMU will attempt to autodetect whether the kernel is expecting the long-standing "everything is int 27" mapping or the one hardware has, for certainty we force it into "definitely behave like hardware mode"; this will avoid unexpected surprises later if we implement sparse irqs. This is harmless on hardware. Thanks to Paul Gortmaker for bisecting the problem and finding an initial solution, to Russell King for providing the correct interrupt mapping, and to Guenter Roeck for providing an initial version of this patch and prodding me into relocating the hardware and retesting everything. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Cc: stable@vger.kernel.org Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Kevin Hilman <khilman@linaro.org>
| * | | | | ARM: shmobile: lager: Do not use register_type field of struct sh_eth_plat_dataSimon Horman2013-09-101-1/+0Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As of 8d3214c ("sh_eth: remove 'register_type' field from 'struct sh_eth_plat_data'") is is no longer necessary or correct to use the 'register_type' field from 'struct sh_eth_plat_data' and doing so results in a build error. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Olof Johansson <olof@lixom.net>
| * | | | | Merge tag 'renesas-fixes3-for-v3.12' of ↵Olof Johansson2013-09-101-1/+1
| |\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into fixes From Simon Horman: Third Round of Renesas ARM based SoC fixes for v3.12 * Update early timer initialisation order of r8a7779 SoC This resolves a regression introduced by a894fcc2d01a89e6fe3da0845a4d80a5312e1124 ("ARM: smp_twd: Divorce smp_twd from local timer API"). This problem was introduced in v3.10-rc2. * tag 'renesas-fixes3-for-v3.12' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: r8a7779: Update early timer initialisation order Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | | | | ARM: shmobile: r8a7779: Update early timer initialisation orderSimon Horman2013-08-301-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | a894fcc2d01a89e6fe3da0845a4d80a5312e1124 ("ARM: smp_twd: Divorce smp_twd from local timer API") altered twd_local_timer_common_register() so that it may make use of late_timer_init. This is problematic on marzen with Magnus's recent patch "ARM: shmobile: marzen: Switch to DT_MACHINE_START" which switches marzen around to enable USE_OF and thus shmobile_timer_init(), which is registered as late_time_init by shmobile_earlytimer_init() stops being a no-op. As a work-around I have updated r8a7779_earlytimer_init() so that shmobile_earlytimer_init() is called after r8a7779_register_twd(). Or in other words, the shmobile_earlytimer_init() setting of late_time_init overwrites that of twd_local_timer_common_register(). Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Magnus Damm <damm@opensource.se>
| * | | | | | ARM: pxa: ssp: Check return values from phandle lookupsOlof Johansson2013-09-101-4/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit a6e56c28a178cef5f (ARM: pxa: ssp: add DT bindings) causes warnings when built: arch/arm/plat-pxa/ssp.c: In function 'pxa_ssp_probe': arch/arm/plat-pxa/ssp.c:145:17: warning: 'dma_spec.args[0]' may be used uninitialized in this function [-Wmaybe-uninitialized] Resolve by checking return values and aborting when lookups fail. Cc: Daniel Mack <zonque@gmail.com> Cc: Mark Brown <broonie@linaro.org> Cc: Haojian Zhuang <haojian.zhuang@gmail.com> Signed-off-by: Olof Johansson <olof@lixom.net>
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