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* ARM: ux500: decomission the non-DT MTU init sequenceLinus Walleij2013-11-261-26/+2Star
| | | | | | | The MTU is now only initialized using the native clocksource device tree matching. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* ARM: ux500: Remove checking for DT during timer initLee Jones2013-11-261-20/+8Star
| | | | | | | Decomission the non-DT boot path as we are now DT only Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* ARM: ux500: Clean-up legacy extern prototypeLee Jones2013-11-261-3/+0Star
| | | | | | | | Decomission io_mapping() and device init calls from non-DT boot path. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* ARM: ux500: Remove unused call to register AMBA devicesLee Jones2013-11-263-30/+1Star
| | | | | | | Decomission the AMBA device register functions. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* ARM: ux500: Clean-up non-DT IRQ initialisationLee Jones2013-11-261-16/+6Star
| | | | | | | Decommission the non-DT boot path. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* ARM: ux500: get rid of unused headerLinus Walleij2013-11-261-1/+0Star
| | | | | | | | | | This removes the unused inclusion of <linux/platform_data/pinctrl-nomadik.h> which is the last user in the entire kernel of this platform data header. Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* ARM: ux500: delete Nomadik pinctrl AUXDATALinus Walleij2013-11-261-4/+0Star
| | | | | | | | | This deletes the AUXDATA hammering down the Nomadik pin controller name to "pinctrl-db8500". We have removed all dependencies on this name. Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* ARM: ux500: delete remnant pin config macrosLinus Walleij2013-11-261-23/+0Star
| | | | | | | | This deletes a few final pin configuration macros from the ux500. Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* ARM: ux500: move snowball pin configs to device treeLinus Walleij2013-11-262-19/+59
| | | | | | | | Move the few remaining snowball pin configurations to the device tree, reference these as hogs to the pin controller until there are real devices that can make use of them. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* ARM: ux500: move snowball LED pin control to device treeLinus Walleij2013-11-262-2/+11
| | | | | | This moves the Snowball LED pin config to the device tree. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* ARM: ux500: convert Snowball SPI pin referenceLinus Walleij2013-11-262-5/+28
| | | | | | | | | | The SPI0 block is not at all connected to the AB8500 on the Snowball: it is connected to the external header. These pins on the header may also be used for GPIO, but let's assume that SPI is a probable usecase on the Snowball and mux in the SPI block and use these for SPI. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* ARM: ux500: move snowball ethernet config to device treeLinus Walleij2013-11-262-4/+25
| | | | | | | This transfers the muxing and biasing of the ethernet-related pins on the snowball over to the device tree. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* ARM: ux500: move HREFv60plus pin configs to device treeLinus Walleij2013-11-262-55/+153
| | | | | | | | Move the few remaining HREFv60 pin configurations to the device tree, reference these as hogs to the pin controller until there are real devices that can make use of them. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* ARM: ux500: move final HREFv60 LCD pins to device treeLinus Walleij2013-11-262-7/+17
| | | | | | | | Put two extra configs into the device tree to handle the default configuration of the display reset signals on the HREFv60plus, move this over from the board file to the device tree. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* ARM: ux500: move the HREFv60plus IPGPIO pins to device treeLinus Walleij2013-11-262-16/+31
| | | | | | | | Move the control of muxing and enabling the IPGPIO (image processor GPIO) from the static set-up to the device tree. Use a hog as we have no device for the flash controller yet. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* ARM: ux500: move the WLAN GPIO pin setup to the device treeLinus Walleij2013-11-262-75/+19Star
| | | | | | | | | | | | | This moves some of the pin setup related to the CW1200 WLAN module over to the device tree. As the driver is not yet activated for the CW1200 WLAN we do not assign this pinctrl state to any device node yet. Get rid of the cmdline argument passing of a certain U9500 platform variant, as this is not supported by the kernel or any device tree. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* ARM: ux500: move GPIO key configuration to device treeLinus Walleij2013-11-266-25/+84
| | | | | | | | | | This moves over the configuration of the GPIO keys (used for proximity sensor and Hall effect sensor) from the static pin configuration file to the device tree. As part of the exercise, implement the GPIO keys properly in a per-UIB file as this setup actually differs with each UIB. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* ARM: ux500: move old HREF ipgpio to the device treeLinus Walleij2013-11-262-24/+16Star
| | | | | | | | The old HREFs (MOP500) were controlling an image-processor GPIO (IPGPIO) by using hogs. Do the same thing with device tree and get rid of the mop500_pins setting. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* ARM: ux500: drop STM pinmap settingsLinus Walleij2013-11-261-200/+0Star
| | | | | | | | | | The pin mappings for the STM (System Trace Macrocell) are not really used by anything: we have no driver for is and the settings are not connected to any device. We can recreate the different mux outputs in the device tree the day we need them. Drop these for now. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* ARM: ux500: move SKE pin config to device treeLinus Walleij2013-11-263-87/+97
| | | | | | | | | | | | This moves the SKE keypad pin control table out of the board file and into the device tree. This was previously set to be active on all MOP500 and HREF boards but after reading the schematic this seems incorrect: the HREFv60 and later uses one of these for MC5 and no reference designs have the SKE connected to any hardware so just leave the pins alone in the power-on state. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* ARM: ux500: move MCDE pin config to device treeLinus Walleij2013-11-264-19/+39
| | | | | | | | | | | | | | This moves the MCDE pin control table out of the board file and into the device tree. Some pins and configs have been marked as used by sub-devices or slaves to the MCDE, such as I2C device 0-070 which is the HDMI interface circuit AV8100, but the pins rather belong to the MCDE SOC block as they come out of the main ASIC. The touch screen GPIO is not related to MCDE so this gets deleted and need to be tied to the respective touch screen (I2C) device once that device is added instead. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* ARM: ux500: create MCDE node to collect resourcesLinus Walleij2013-11-261-0/+17
| | | | | | | | | | As we need to connect resources such as pin mappings and clocks when deleting board files, we create a MCDE node even though there is no driver for it. As it is only using standard bindings right now, this does not matter much. When a proper driver is written for the MCDE, it can augment this node with custom properties. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* ARM: ux500: move SPI pin config to device treeLinus Walleij2013-11-264-19/+114
| | | | | | | | | | This moves the SPI pin control table out of the board file and into the device tree. Move the specific setting for SSP0 on the HREFprev60 into the prev60-specific DTS file. The SPI2 configuration is not really connected to any device, as it will conflict with GPIO218 which is used on all HREFs. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* ARM: ux500: move MUSB pin config to device treeLinus Walleij2013-11-265-25/+79
| | | | | | | | This moves the MUSB pin control table out of the board file and into the device tree. Tie the config to the on-chip MUSB device rather than the ab8500-usb device which is off-chip. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* ARM: ux500: move GPIO217/218 config to device treeLinus Walleij2013-11-264-7/+28
| | | | | | | | | This moves the input-pulled-up setting for GPIO217 as used on the HREFs prior to v60 from the boardfile to the device tree. GPIO218 is only used with the TVK UIB so move it to that .dtsi file. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* ARM: ux500: move MSP pin control to the device treeLinus Walleij2013-11-264-30/+91
| | | | | | | | | | | This moves the static, device-tied pin control configuration out of the board file board-mop500-pins.c and into the device tree. Add nodes for MSP0 and MSP2 on the HREF and Snowball so we can reference the pins properly. Cc: Lee Jones <lee.jones@linaro.org> Cc: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* ARM: ux500: move MMC/SD/SDIO pin control to the device treeLinus Walleij2013-11-267-107/+314
| | | | | | | | | | | | This moves the static, device-tied pin control configuration out of the board file board-mop500-pins.c and into the device tree. Add entries for SDI1 and SDI2 on the Snowball so that the WLAN pins on SDI1 can be used further on, and the unused pins on SDI2 can be put to sleep. Cc: Lee Jones <lee.jones@linaro.org> Cc: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* ARM: ux500: move I2C pin control to the device treeLinus Walleij2013-11-264-22/+150
| | | | | | | | | | | This moves the static, device-tied pin control configuration out of the board file board-mop500-pins.c and into the device tree. Define possible states also for I2C4 even if it's not used by any board file at this time. Cc: Lee Jones <lee.jones@linaro.org> Cc: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* ARM: ux500: move UART pin control to the device treeLinus Walleij2013-11-264-52/+134
| | | | | | | | | | | | | | | This moves the static, device-tied pin control configuration out of the board file board-mop500-pins.c and into the device tree. We create a new .dtsi-file to be shared between all the MOP500-related boards, that include all HREF variants and the Snowball board. Assign pin states for HREF and Snowball boards alike. Cc: Lee Jones <lee.jones@linaro.org> Cc: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* ARM: ux500: Add DMA config bindings for MSP devicesLee Jones2013-11-261-0/+15
| | | | | Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* ARM: ux500: Consolidate [A|D]B8500 platform dataLee Jones2013-11-269-120/+17Star
| | | | | | | | Move the platform data from all these files into one, delete empty files and remove all references to them. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* ARM: ux500: Remove legacy ATAG SSP supportLee Jones2013-11-262-31/+0Star
| | | | | | | This hasn't been used since we converted the platform to DT only. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* ARM: ux500: adjust the TC3589x devices to the bindingLinus Walleij2013-11-262-10/+37
| | | | | | | | | The TC3589x devices appearing in the ST Ericsson device trees are adjusted to use the new binding so this is in a good shape, and we add the keypad on the TVK1281618 UIB so this is working again. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* Merge branch 'fixes' of git://git.linaro.org/people/rmk/linux-armLinus Torvalds2013-11-228-14/+39
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull ARM fixes from Russell King: "Some small fixes for this merge window, most of them quite self explanatory - the biggest thing here is a fix for the ARMv7 LPAE suspend/resume support" * 'fixes' of git://git.linaro.org/people/rmk/linux-arm: ARM: 7894/1: kconfig: select GENERIC_CLOCKEVENTS if HAVE_ARM_ARCH_TIMER ARM: 7893/1: bitops: only emit .arch_extension mp if CONFIG_SMP ARM: 7892/1: Fix warning for V7M builds ARM: 7888/1: seccomp: not compatible with ARM OABI ARM: 7886/1: make OABI default to off ARM: 7885/1: Save/Restore 64-bit TTBR registers on LPAE suspend/resume ARM: 7884/1: mm: Fix ECC mem policy printk ARM: 7883/1: fix mov to mvn conversion in case of 64 bit phys_addr_t and BE ARM: 7882/1: mm: fix __phys_to_virt to work with 64 bit phys_addr_t in BE case ARM: 7881/1: __fixup_smp read of SCU config should do byteswap in BE case ARM: Fix nommu.c build warning
| * ARM: 7894/1: kconfig: select GENERIC_CLOCKEVENTS if HAVE_ARM_ARCH_TIMERWill Deacon2013-11-211-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | The ARM architected timer driver doesn't compile without GENERIC_CLOCKEVENTS selected, so ensure that we select it when building for a platform that has the timer. Without this patch, mach-virt fails to build without something like mach-vexpress also selected. Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: 7893/1: bitops: only emit .arch_extension mp if CONFIG_SMPWill Deacon2013-11-211-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Uwe reported a build failure when targetting a NOMMU platform with my recent prefetch changes: arch/arm/lib/changebit.S: Assembler messages: arch/arm/lib/changebit.S:15: Error: architectural extension `mp' is not allowed for the current base architecture This is due to use of the .arch_extension mp directive immediately prior to an ALT_SMP(...) instruction. Whilst the ALT_SMP macro will expand to nothing if !CONFIG_SMP, gas will still choke on the directive. This patch fixes the issue by only emitting the sequence (including the directive) if CONFIG_SMP=y. Tested-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: 7892/1: Fix warning for V7M buildsOlof Johansson2013-11-191-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Fixes a harmless warning when building for V7M (!MMU): arch/arm/kernel/traps.c:859:123: warning: 'kuser_init' defined but not used [-Wunused-function] By making the stub static inline instead of just static. Fixes: f6f91b0d9fd9 ('ARM: allow kuser helpers to be removed from the vector page') Signed-off-by: Olof Johansson <olof@lixom.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: 7888/1: seccomp: not compatible with ARM OABIKees Cook2013-11-141-1/+6
| | | | | | | | | | | | | | | | | | | | | | Make sure that seccomp filter won't be built when ARM OABI is in use, since there is work needed to distinguish calling conventions. Until that is done (which is likely never since OABI is deprecated), make sure seccomp filter is unavailable in the OABI world. Signed-off-by: Kees Cook <keescook@chromium.org> Reviewed-by: Will Drewry <wad@chromium.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: 7886/1: make OABI default to offKees Cook2013-11-141-2/+1Star
| | | | | | | | | | | | | | | | | | | | | | Given recent discussions about the lack of OABI in the wild, switch CONFIG_OABI_COMPAT to off-by-default to encourage more system builders to avoid it. Signed-off-by: Kees Cook <keescook@chromium.org> Acked-by: Nicolas Pitre <nico@linaro.org> Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: 7885/1: Save/Restore 64-bit TTBR registers on LPAE suspend/resumeMahesh Sivasubramanian2013-11-141-5/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | LPAE enabled kernels use the 64-bit version of TTBR0 and TTBR1 registers. If we're running an LPAE kernel, fill the upper half of TTBR0 with 0 because we're setting it to the idmap here (the idmap is guaranteed to be < 4Gb) and fully restore TTBR1 instead of just restoring the lower 32 bits. Failure to do so can cause failures on resume from suspend when these registers are only half restored. Signed-off-by: Mahesh Sivasubramanian <msivasub@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: 7884/1: mm: Fix ECC mem policy printkMichal Simek2013-11-141-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ECC policy can be applied to the whole system when this bit is implemented by SoC vendor (IMP - bit 9 - in L1 page table entry format). When this bit is not implemented by SoC vendor it doesn't mean that system has no other way how to do ECC. This patch ensures to show this message only when ECC is requested via cmd line ecc=on and runs on appropriate ARM core. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: 7883/1: fix mov to mvn conversion in case of 64 bit phys_addr_t and BEVictor Kamensky2013-11-141-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | Fix patching code to convert mov instruction into mvn instruction in case of CONFIG_ARCH_PHYS_ADDR_T_64BIT and CONFIG_ARM_PATCH_PHYS_VIRT. In BE case store into r0 proper bits so byte swapped instruction could be modified correctly. Signed-off-by: Victor Kamensky <victor.kamensky@linaro.org> Reviewed-by: R Sricharan <r.sricharan@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: 7882/1: mm: fix __phys_to_virt to work with 64 bit phys_addr_t in BE caseVictor Kamensky2013-11-141-1/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make sure that inline assembler that expects 'r' operand receives 32 bit value. Before this fix in case of CONFIG_ARCH_PHYS_ADDR_T_64BIT and CONFIG_ARM_PATCH_PHYS_VIRT __phys_to_virt function passed 64 bit value to __pv_stub inline assembler where 'r' operand is expected. Compiler behavior in such case is not well specified. It worked in little endian case, but in big endian case incorrect code was generated, where compiler confused which part of 64 bit value it needed to modify. For example BE snippet looked like this: N:0x80904E08 : MOV r2,#0 N:0x80904E0C : SUB r2,r2,#0x81000000 when LE similar code looked like this N:0x808FCE2C : MOV r2,r0 N:0x808FCE30 : SUB r2,r2,#0xc0, 8 ; #0xc0000000 Note 'r0' register is va that have to be translated into phys To avoid this situation use explicit cast to 'unsigned long', which explicitly discard upper part of phys address and convert value to 32 bit. Also add comment so such cast will not be removed in the future. Signed-off-by: Victor Kamensky <victor.kamensky@linaro.org> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: 7881/1: __fixup_smp read of SCU config should do byteswap in BE caseVictor Kamensky2013-11-141-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Commit "bc41b8724f24b9a27d1dcc6c974b8f686b38d554 ARM: 7846/1: Update SMP_ON_UP code to detect A9MPCore with 1 CPU devices" added read of SCU config register into __fixup_smp function. Such read should be followed by byteswap, if kernel runs in BE mode. Signed-off-by: Victor Kamensky <victor.kamensky@linaro.org> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: Fix nommu.c build warningRussell King2013-11-141-0/+1
| | | | | | | | | | | | | | | | | | | | | | The 0-day kernel build robot found this new warning: arch/arm/mm/nommu.c:303:17: warning: 'struct proc_info_list' declared inside parameter list [enabled by default] arch/arm/mm/nommu.c:303:17: warning: its scope is only this definition or declaration, which is probably not what you want [enabled by default] Fix it by including the appropriate header. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | Merge branch 'next' of git://git.kernel.org/pub/scm/virt/kvm/kvmLinus Torvalds2013-11-221-6/+28
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | Pull KVM fixes from Gleb Natapov. * 'next' of git://git.kernel.org/pub/scm/virt/kvm/kvm: KVM: kvm_clear_guest_page(): fix empty_zero_page usage kvm: mmu: delay mmu audit activation arm/arm64: KVM: Fix hyp mappings of vmalloc regions
| * \ Merge tag 'kvm-arm-fixes-3.13-1' of ↵Gleb Natapov2013-11-191-6/+28
| |\ \ | | | | | | | | | | | | | | | | | | | | git://git.linaro.org/people/cdall/linux-kvm-arm into next Fix percpu vmalloc allocations
| | * | arm/arm64: KVM: Fix hyp mappings of vmalloc regionsChristoffer Dall2013-11-171-6/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Using virt_to_phys on percpu mappings is horribly wrong as it may be backed by vmalloc. Introduce kvm_kaddr_to_phys which translates both types of valid kernel addresses to the corresponding physical address. At the same time resolves a typing issue where we were storing the physical address as a 32 bit unsigned long (on arm), truncating the physical address for addresses above the 4GB limit. This caused breakage on Keystone. Cc: <stable@vger.kernel.org> [3.10+] Reported-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
* | | | Merge branch 'next' of git://git.infradead.org/users/vkoul/slave-dmaLinus Torvalds2013-11-204-62/+2Star
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull slave-dmaengine changes from Vinod Koul: "This brings for slave dmaengine: - Change dma notification flag to DMA_COMPLETE from DMA_SUCCESS as dmaengine can only transfer and not verify validaty of dma transfers - Bunch of fixes across drivers: - cppi41 driver fixes from Daniel - 8 channel freescale dma engine support and updated bindings from Hongbo - msx-dma fixes and cleanup by Markus - DMAengine updates from Dan: - Bartlomiej and Dan finalized a rework of the dma address unmap implementation. - In the course of testing 1/ a collection of enhancements to dmatest fell out. Notably basic performance statistics, and fixed / enhanced test control through new module parameters 'run', 'wait', 'noverify', and 'verbose'. Thanks to Andriy and Linus [Walleij] for their review. - Testing the raid related corner cases of 1/ triggered bugs in the recently added 16-source operation support in the ioatdma driver. - Some minor fixes / cleanups to mv_xor and ioatdma" * 'next' of git://git.infradead.org/users/vkoul/slave-dma: (99 commits) dma: mv_xor: Fix mis-usage of mmio 'base' and 'high_base' registers dma: mv_xor: Remove unneeded NULL address check ioat: fix ioat3_irq_reinit ioat: kill msix_single_vector support raid6test: add new corner case for ioatdma driver ioatdma: clean up sed pool kmem_cache ioatdma: fix selection of 16 vs 8 source path ioatdma: fix sed pool selection ioatdma: Fix bug in selftest after removal of DMA_MEMSET. dmatest: verbose mode dmatest: convert to dmaengine_unmap_data dmatest: add a 'wait' parameter dmatest: add basic performance metrics dmatest: add support for skipping verification and random data setup dmatest: use pseudo random numbers dmatest: support xor-only, or pq-only channels in tests dmatest: restore ability to start test at module load and init dmatest: cleanup redundant "dmatest: " prefixes dmatest: replace stored results mechanism, with uniform messages Revert "dmatest: append verify result to results" ...
| * \ \ \ Merge commit 'dmaengine-3.13-v2' of ↵Vinod Koul2013-11-163-60/+0Star
| |\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/djbw/dmaengine Pull dmaengine changes from Dan 1/ Bartlomiej and Dan finalized a rework of the dma address unmap implementation. 2/ In the course of testing 1/ a collection of enhancements to dmatest fell out. Notably basic performance statistics, and fixed / enhanced test control through new module parameters 'run', 'wait', 'noverify', and 'verbose'. Thanks to Andriy and Linus for their review. 3/ Testing the raid related corner cases of 1/ triggered bugs in the recently added 16-source operation support in the ioatdma driver. 4/ Some minor fixes / cleanups to mv_xor and ioatdma. Conflicts: drivers/dma/dmatest.c Signed-off-by: Vinod Koul <vinod.koul@intel.com>
generated by cgit v1.2.3-55-g7522 (git 2.39.0) at 2024-07-19 14:09:12 +0200